BQ71550DCKR [TI]
5V FIXED POSITIVE LDO REGULATOR, 0.75V DROPOUT, PDSO5, PLASTIC, SOT-323, SC-70, 5 PIN;![BQ71550DCKR](http://pdffile.icpdf.com/pdf2/p00299/img/icpdf/BQ71550DCKR_1805830_icpdf.jpg)
型号: | BQ71550DCKR |
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描述: | 5V FIXED POSITIVE LDO REGULATOR, 0.75V DROPOUT, PDSO5, PLASTIC, SOT-323, SC-70, 5 PIN 光电二极管 输出元件 调节器 |
文件: | 总13页 (文件大小:229K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
Actual Size
(2,15 mm x 2,3 mm)
SLVS338E – MAY 2001 – REVISED JUNE 2003
HIGH INPUT VOLTAGE, MICROPOWER
SC70/SOT-323 PACKAGED 50-mA LDO LINEAR REGULATORS
FEATURES
APPLICATIONS
D
50-mA Low-Dropout Regulator
D
D
D
Battery Management
Microcontroller
D
Available in 2.5 V, 3.0 V, 3.3 V, 5.0 V, and
Adjustable
PDAs and Notebooks
D
D
D
D
D
D
24-V Maximum Input Voltage
DCK PACKAGE
(TOP VIEW)
Low 3.2-µA Quiescent Current at 50 mA
5-Pin SC70/SOT-323 (DCK) Package
Stable With Any Capacitor (>0.47 µF)
Over Current Limitation
FB/NC
GND
NC
1
2
5
OUT
IN
3
4
–40°C to 125°C Operating Junction
Temperature Range
The usual PNP pass transistor has been replaced by a
PMOSpasselement. BecausethePMOSpasselement
behaves as a low-value resistor, the low dropout
voltage, typically 415 mV at 50 mA of load current, is
directly proportional to the load current. The low
quiescent current (3.2 µA typically) is stable over the
entire range of output load current (0 mA to 50 mA).
DESCRIPTION
The TPS715xx low-dropout (LDO) voltage regulators
offer the benefits of high input voltage, low-dropout
voltage, low-power operation, and miniaturized
packaging. The devices, which operate over an input
range of 2.5 V to 24 V, are stable with any capacitor
(>0.47 µF). The low dropout voltage and low quiescent
current allow operations at extremely low power levels.
Therefore, the devices are ideal for powering battery
management ICs. Specifically, since the devices are
enabled as soon as the applied voltage reaches the
minimum input voltage, the output is quickly available to
power continuously operating battery charging ICs.
†
AVAILABLE OPTIONS
T
J
VOLTAGE
PACKAGE
PART NUMBER
SYMBOL
TPS71525DCKR
bq71525DCKR
TPS71530DCKR
bq71530DCKR
TPS71533DCKR
bq71533DCKR
TPS71550DCKR
bq71550DCKR
TPS71501DCKR
bq71501DCKR
SC70/SOT-323
(DCK)
2.5 V
AQL
SC70/SOT-323
(DCK)
3.0 V
3.3 V
5.0 V
AQM
AQI
SC70/SOT-323
(DCK)
–40°C to 125°C
SC70/SOT-323
(DCK)
T48
(Adjustable) SC70/SOT-323
1.2 V–15 V (DCK)
ARB
†
Contact the factory for other voltage options between 1.25 V and 5.85 V.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
This document contains information on products in more than one phase
of development. The status of each device is indicated on the page(s)
specifying its electrical characteristics.
Copyright 2001 – 2003, Texas Instruments Incorporated
1
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
Ĕ
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range ꢀ ꢁ ꢂꢂ ꢃ ꢄꢅꢂ ꢆ ꢇ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 24 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
ESD rating, CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
J
Operating ambient temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING FACTOR
R
R
T
A
≤ 25°C
T
= 70°C
T = 85°C
A
θJC
θJA
A
BOARD
PACKAGE
°C/W
165.39
165.39
°C/W
396.24
314.74
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
‡
Low K
DCK
DCK
2.52 mW/°C
3.18 mW/°C
252 mW
318 mW
139 mW
175 mW
101 mW
127 mW
§
High K
‡
§
The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board.
The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
recommended operating conditions
MIN NOM
MAX
24
UNIT
I
I
= 10 mA
= 50 mA
2.5
3
O
Input voltage, V
(IN)
(see Note 2)
V
24
O
Continuous output current, I
(OUT)
0
50
mA
Operating junction temperature, T
–40
125
°C
J
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
V (min) = V (max) + V (max load)
I
O
DO
2
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (T = –40°C to 125°C), V
V typical + 1 V, I
(IN) = (OUT) (OUT)
= 1 mA, C = 1 µF unless otherwise
(OUT)
J
noted
PARAMETER
TEST CONDITIONS
1.2 V ≤ V ≤ 15 V
MIN
TYP
MAX
UNIT
T = 25°C,
J
O
TPS71501
TPS71525
TPS71530
TPS71533
TPS71550
1.2 V ≤ V ≤ 15 V
0.96 V
1.04 V
O
O
O
T = 25°C,
3.5 V < V < 24 V
2.5
3
J
I
3.5 V < V < 24 V
2.4
2.6
I
Output voltage (100 µA to
50 mA Load)
(see Note 3)
T = 25°C,
J
4 V < V < 24 V
O
V
4 V < V < 24 V
2.88
3.168
4.8
3.12
3.432
5.2
O
T = 25°C,
J
4.3 V < V < 24 V
3.3
5
I
4.3 V < V < 24 V
I
T = 25°C,
J
6 V < V < 24 V
O
6 V < V < 24 V
O
T = 25°C,
J
0 < I < 50 mA
3.2
O
T = –40°C to 85°C,
I
I
I
I
= 50 mA
= 50 mA
4.2
4.8
5.8
J
O
O
O
O
Quiescent current (GND current)
Load regulation
µA
= 50 mA, V = 24 V
I
T = 25°C,
J
= 100 µA to 50 mA
22
20
mV
mV
T = 25°C,
J
V
+ 1 V < V ≤ 24 V
I
Output voltage line regulation (∆V /V
(see Note 3)
O
O
O
O
)
V
+ 1 V < V ≤ 24 V
60
I
T = 25°C,
BW = 200 Hz to 100 kHz,
I = 50 mA
O
J
Output noise voltage
575
µVrms
C
= 10 µF,
o
Output current limit
V
= 0 V,
See Note 3
f = 100 kHz,
125
750
mA
dB
O
Power supply ripple rejection
T = 25°C,
J
C
= 10 µF
o
60
T = 25°C,
J
I
I
= 50 mA
= 50 mA
415
O
Dropout voltage (see Note 4)
mV
750
O
NOTES: 3. The maximum IN voltage is 24 V. There is no minimum output current and the maximum output current is 50 mA.
4. IN voltage equals V
(OUT)
typical –100 mV; The TPS71533 input voltage is set to 3.2 V.
3
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
functional block diagram – adjustable version
V
(IN)
V
(OUT)
Current
Sense
ILIM
R1
R2
_
+
GND
FB
V
ref
= 1.205 V
Bandgap
Reference
functional block diagram – fixed version
V
(IN)
V
(OUT)
Current
Sense
ILIM
R1
R2
_
+
GND
V
ref
= 1.205 V
Bandgap
Reference
Terminal Functions
TERMINAL
NO.
FIXED
I/O
DESCRIPTION
NAME
FB
ADJ.
1
Adjustable version. This terminal is the feedback input voltage.
Fixed voltage version. No connection
Ground
NC
1
2
3
4
5
GND
NC
2
3
4
5
No connection
IN
I
Unregulated input to the device.
Output of the regulator.
OUT
O
4
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
vs
FREE-AIR TEMPERATURE
3.32
4.5
3.320
3.315
V = 4.3 V
I
V = 4.3 V
I
V
= 3.3 V
3.31
O
C
= 1 µF
= 25°C
I
O
= 1 mA
o
J
4
C
= 1 µF
o
T
3.30
3.29
3.28
3.27
3.26
3.25
3.310
3.305
3.300
3.5
3
I
O
= 50 mA
2.5
2
V = 4.3 V
3.295
3.290
I
C
= 1 µF
o
0
10
20
30
40
50
–40 –25 –10
5
20 35 50 65 80 95 110 125
–40–25 –10 5 20 35 50 65 80 95 110 125
I
O
– Output Current – mA
T
A
– Free–Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 2
Figure 3
Figure 1
DROPOUT VOLTAGE
vs
OUTPUT SPECTRAL NOISE DENSITY
OUTPUT IMPEDANCE
vs
vs
OUTPUT CURRENT
FREQUENCY
FREQUENCY
600
500
18
16
14
8
V = 4.3 V
V = 4.3 V
I
V = 3.2 V
= 1 µF
O
I
O
I
C
V
= 3.3 V
= 1 µF
= 25°C
7
6
5
4
3
2
1
0
V
C
= 3.3 V
= 1 µF
O
o
I
= 1 mA
O
C
T
o
J
T
= 125°C
J
12
10
8
400
300
I
O
= 50 mA
T
= 25°C
J
6
4
2
0
I
O
= 1 mA
200
100
0
T
= –40°C
J
I
O
= 50 mA
10
100
1k
10k 100k
1 M 10 M
0
10
20
30
40
50
100
1 k
10 k
100 k
I – Output Current – mA
O
f – Frequency – Hz
f – Frequency – Hz
Figure 4
Figure 5
Figure 6
TPS791501
POWER SUPPLY RIPPLE REJECTION
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
vs
FREQUENCY
600
100
1
V = 3.2 V
I
V = 4.3 V
I
O
= 200 mA
I
90
80
C
= 1 µF
V
= 3.3 V
= 10 µF
= 25°C
0.9
0.8
o
O
o
500
400
C
T
I
O
= 50 mA
T
= 125°C
J
J
70
60
50
0.7
0.6
I = 1 mA
O
T
= 25°C
J
300
200
100
0
0.5
0.4
0.3
40
30
20
T
= –40°C
J
I
= 10 mA
O
I
O
= 50 mA
0.2
0.1
0
10
0
–40 –25 –10
5
20 35 50 65 80
110 125
10
100
1k
10k 100k
1 M 10 M
95
0
3
6
9
12
15
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
V – Input Voltage – V
I
Figure 8
Figure 9
Figure 7
5
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
TYPICAL CHARACTERISTICS
POWER UP / POWER DOWN
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
8
V = 4.3 V
I
V
R
= 3.3 V
= 66 Ω
O
L
V
= 3.3 V
= 50 mA
= 10 µF
O
7
100
50
400
200
0
V
= 3.3 V
O
I
O
C
= 10 µF
o
C
o
6
5
4
0
–50
-200
60
40
20
0
3
V
I
2
1
0
5.3
4.3
V
O
0
100 200 300 400 500 600 700 800 900 100
0
50 100 150 200 250 300 350 400 450 500
0
2
4
6
8
10 12 14 16 18 20
t – Time – µs
t – Time – ms
t – Time – ms
Figure 10
Figure 11
Figure 12
APPLICATION INFORMATION
The TPS715xx family of LDO regulators has been optimized for use with battery management ICs. After the
minimum input voltage requirement is met, it is always enabled. The device’s maximum input voltage is 24 V.
It has a dropout voltage of 415 mV at 50 mA, and its quiescent current is 3.2 µA typically. A typical application
circuit is shown in Figure 13.
4
5
V
I
IN
OUT
V
O
C1
3
NC
0.1 µF
1
NC/FB
0.47 µF
GND
2
Figure 13. Typical Application Circuit (Fixed Voltage Version)
external capacitor requirements
Althoughnot required, a 0.047-µF or larger input bypass capacitor, connected between IN andGNDandlocated
close to the device, is recommended to improve transient response and noise rejection. A higher-value
electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the
device is located several inches from the power source.
The TPS715xx requires an output capacitor connected between OUT and GND to stabilize the internal control
loop. Any capacitor ≥ 0.47 µF properly stabilizes this loop.
6
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; restrict the maximum junction
temperature to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max * T
J
A
P
+
D(max)
R
qJA
where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package (see the Dissipation Rating Table).
θJA
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
Power dissipation resulting from quiescent current is negligible.
regulator protection
The TPS715xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
The TPS715xx features internal current limiting. During normal operation, the TPS715xx limits output current
to approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
programming the TPS71501 adjustable LDO regulator
The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider as
shown in Figure 14. The output voltage is calculated using:
R1
R2
ǒ1 )
ref
Ǔ
(3)
V
+ V
O
where
= 1.205 V typ (the internal reference voltage)
V
ref
7
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
APPLICATION INFORMATION
programming the TPS71501 adjustable LDO regulator (continued)
Resistors R1 and R2 should be chosen for approximately 1.5-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should
be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases V . The recommended
O
design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 µA, and then calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(4)
V
ref
TPS71501
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
I
IN
0.1 µF
OUTPUT
R1
R2
VOLTAGE
OUT
V
O
0.499 MΩ 1 MΩ
1.33 MΩ 1 MΩ
3.16 MΩ 1 MΩ
1.8 V
2.8 V
5.0 V
R1
R2
0.47 µF
FB
GND
Figure 14. TPS71501 Adjustable LDO Regulator Programming
battery management application
One application for which this device is particularly suited is providing a regulated voltage from a much larger
input voltage, as is often the case of ICs used in portable battery-powered devices. Many of the battery
management ICs currently on the market monitor battery voltages above 20 V. However, the IC’s internal
circuitry and peripheral equipment, like an LED’s, generally need a lower power bus for operation. Some of the
battery management ICs have internal LDO regulator controllers that require five or more external components
in order to provide a regulated output voltage. The TPS715xx family has a maximum input voltage rating of
24 V, provides up to 50 mA of output current, and requires only one external component. Therefore, using one
of the TPS715xx regulators to power battery management ICs is a much simpler, more compact, and less
expensive solution than using onboard LDO regulator controllers. In addition, the TPS715xx family uses only
3.2 µA of quiescent current and does not significantly decrease battery life while the device is inactive.
TI’s bq2060 gas gauge IC was chosen to demonstrate the use of the TPS71533. The bq2060 battery
management IC requires a regulated 3.3 V for normal operation. The bq2060 has a regulator controller output
(REG) that, when used in conjunction with an external JFET (Q2), a bipolar transistor (Q1), two capacitors (C1
and C2), and one resistor (R1), forms a 3.3-V output linear regulator as shown in Figure 15.
8
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
APPLICATION INFORMATION
3
2
BAT+
Q1
MMBT3904
1
R1
1
2
1 kΩ
VCC
1
2
C1 0.1 µF
Q2
SST113
D
S
U1
1
28
27
26
25
24
23
22
21
HDQ16
ESCL
ESDA
SMBC
SMBD
G
2
3
4
5
VCELL4
VCELL3
VCELL2
VCELL1
SR1
R2
1
2
RBI
RBG
100 kΩ
6
7
VOUT
VCC
S1
8
VSS
SR2
31
1
24
20
19
18
17
9
DISP
LED1
LED2
LED3
SRC
TS
10
11
Device
THon
CVon
R3
2
12
13
14
10 kΩ
16
15
LED4
LED5
CFC
DFC
R4
1
2
10 kΩ
BQ2060
1
2
U2
C2 .001 µF
1
5
4
SCL
WP
2
3
R5
D1
VSS
SDA
Color
VCC
330 Ω
R6
D2
24LC01
Color
330 Ω
R7
D3
Color
330 Ω
R8
D4
Color
330 Ω
R9
D5
Color
330 Ω
BAT–
1
2
R10
0.030 W
Figure 15. bq2060 Powered With Internal LDO Controller
9
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
APPLICATION INFORMATION
However, with five external components, this regulator is more complex and costly than using a separate LDO
regulator. Figure 16 shows the TPS71533 and its external output capacitor (C1) providing the regulated 3.3 V
to the bq2060.
U2
TPS71533
1
2
3
5
4
OUT
GND
IN
BAT+
1
2
U1
C1 0.47 µF
1
28
27
26
25
24
23
22
21
HDQ16
ESCL
ESDA
SMBC
SMBD
2
3
4
5
VCELL4
VCELL3
VCELL2
VCELL1
SR1
R1
1
2
RBI
RBG
100 kΩ
6
7
VOUT
VCC
S1
8
VSS
SR2
31
1
24
20
19
18
17
9
DISP
LED1
LED2
LED3
SRC
TS
10
11
Device
THon
CVon
R2
2
12
13
14
10 kΩ
16
15
LED4
LED5
CFC
DFC
R3
1
2
10 kΩ
BQ2060
U3
1
2
3
5
SCL
WP
R4
VSS
SDA
D1
Green
4
VCC
470 Ω
R5
24LC01
D2
Green
470 Ω
R6
D3
Green
470 Ω
R7
D4
Green
470 Ω
R8
D5
Green
470 Ω
BAT–
1
2
R9
0.030 W
Figure 16. bq2060 Powered With TPS71533
10
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
APPLICATION INFORMATION
In Figure 16, the bq2060 is configured to monitor 4 Li-Ion batteries in series totaling 16.8 V. During either battery
charging or discharging, the maximum current that the bq2060 requires from the TPS71533 occurs when the
user presses the push button (S1) and potentially activates all five LEDs, indicating a fully charged battery. The
LEDs require 3 mA each and remain on for 4 seconds. Therefore, the bq2060 LED requires a total of 15 mA
with a maximun power dissipated by the TPS71533 of 203 mW [(16.8 V – 3.3 V) x 15 mA for the 4-second
interval]. The LEDs remain active for 4 seconds even if the push button remains depressed. When the LEDs
are not activated, the bq2060 only requires approximately 200-µA quiescent current.
For more information on the operation of the bq2060, refer to the data sheet (TI literature number SLUS035).
An evaluation module with a similar configuration to the one shown in Figure 16 is also available (TI literature
number SLUU063).
11
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TPS71525
TPS71530, TPS71533
TPS71501, TPS71550
SLVS338E – MAY 2001 – REVISED JUNE 2003
MECHANICAL DATA
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,30
0,15
M
0,10
0,65
5
4
0,13 NOM
1,40 2,30
1,10 1,90
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553/B 06/99
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
12
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Automotive 16-S precision battery monitor, balancer and integrated protector with ASIL-D compliance | PAP | 64 | -40 to 125
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