CSD19538Q2 [TI]

采用 2mm x 2mm SON 封装的单路、59mΩ、100V、N 沟道 NexFET™ 功率 MOSFET;
CSD19538Q2
型号: CSD19538Q2
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

采用 2mm x 2mm SON 封装的单路、59mΩ、100V、N 沟道 NexFET™ 功率 MOSFET

局域网 开关 脉冲 光电二极管 晶体管
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CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
CSD19538Q2 100V N 沟道 NexFET™ 功率 MOSFET  
1 特性  
产品概要  
1
超低 Qg Qgd  
TA=25°C  
VDS  
典型值  
单位  
V
低热阻  
漏源电压  
100  
4.3  
0.8  
雪崩额定值  
Qg  
栅极电荷总量 (10V)  
栅极电荷(栅极到漏极)  
nC  
nC  
无铅  
Qgd  
VGS = 6V  
VGS = 10V  
3.2  
58  
49  
符合 RoHS 标准  
RDS(on) 漏源导通电阻  
VGS(th) 阈值电压  
mΩ  
无卤素  
V
小外形尺寸无引线 (SON) 2mm x 2mm 塑料封装  
器件信息(1)  
2 应用  
器件  
数量  
包装介质  
封装  
运输  
以太网供电 (PoE)  
CSD19538Q2 3000  
CSD19538Q2T 250  
SON  
2.00mm x 2.00mm  
塑料封装  
卷带  
封装  
7 英寸卷带  
电源设备 (PSE)  
电机控制  
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。  
3 说明  
绝对最大额定值  
这款 100V49mΩ、采用 2mm × 2mm SON 封装的  
NexFET™功率 MOSFET 被设计成在功率转换应用中  
大大降低 损耗。  
TA = 25°C  
单位  
V
VDS  
VGS  
漏源电压  
100  
±20  
14.4  
栅源电压  
V
持续漏极电流(受封装限制)  
顶视图  
持续漏极电流(受芯片限制),TC = 25°C 时  
测得  
ID  
13.1  
A
持续漏极电流(1)  
脉冲漏极电流(2)  
功率耗散(1)  
4.6  
34.4  
2.5  
D
D
G
1
2
3
6
5
4
D
D
S
IDM  
PD  
A
D
W
功率耗散,TC = 25°C  
20.2  
TJ, 工作结温,  
-55 150  
°C  
Tstg  
储存温度  
雪崩能量,单脉冲  
ID = 12.6AL = 0.1mHRG = 25Ω  
EAS  
8
mJ  
S
(1) RθJA = 50°C/W,这是在一块厚度为 0.06 英寸环氧树脂 (FR4)  
印刷电路板 (PCB) 上的 1 英寸22 盎司铜焊盘上测得的典型  
值。  
P0108-01  
(2) 最大 RθJC = 6.2°C/W,脉冲持续时间 100μs,占空比 1%。  
.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLPS582  
 
 
 
 
 
 
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
中的测试电压 VDS 100V 更改为 50V  
栅极电荷  
RDS(on) VGS 对比  
200  
TC = 25èC, ID = 5 A  
TC = 125èC, ID = 5 A  
180  
160  
140  
120  
100  
80  
10  
9
8
7
6
5
4
3
2
1
0
ID = 5 A  
VDS = 50 V  
60  
40  
20  
0
0
2
4
6
8
10  
12  
14  
16  
18  
20  
VGS - Gate-to-Source Voltage (V)  
D007  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
Qg - Gate Charge (nC)  
D004  
2
版权 © 2016–2017, Texas Instruments Incorporated  
 
 
CSD19538Q2  
www.ti.com.cn  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
目录  
1
2
3
4
5
特性.......................................................................... 1  
6
7
器件和文档支持........................................................ 8  
6.1 接收文档更新通知 ..................................................... 8  
6.2 社区资源.................................................................... 8  
6.3 ........................................................................... 8  
6.4 静电放电警告............................................................. 8  
6.5 Glossary.................................................................... 8  
机械、封装和可订购信息 ......................................... 9  
7.1 Q2 封装尺.............................................................. 9  
7.2 Q2 卷带信............................................................ 12  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 3  
Specifications......................................................... 4  
5.1 Electrical Characteristics........................................... 4  
5.2 Thermal Information.................................................. 4  
5.3 Typical MOSFET Characteristics.............................. 5  
4 修订历史记录  
Changes from Original (July 2016) to Revision A  
Page  
已更改 将栅极电荷曲线........................................................................................................................................................... 2  
Changed test voltage VDS from 100 V : to 50 V in Figure 4 ................................................................................................... 5  
版权 © 2016–2017, Texas Instruments Incorporated  
3
 
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
5 Specifications  
5.1 Electrical Characteristics  
TA = 25°C (unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
STATIC CHARACTERISTICS  
BVDSS  
IDSS  
Drain-to-source voltage  
VGS = 0 V, ID = 250 μA  
100  
V
Drain-to-source leakage current  
Gate-to-source leakage current  
Gate-to-source threshold voltage  
VGS = 0 V, VDS = 80 V  
VDS = 0 V, VGS = 20 V  
VDS = VGS, ID = 250 μA  
VGS = 6 V, ID = 5 A  
1
100  
3.8  
72  
μA  
nA  
V
IGSS  
VGS(th)  
2.8  
3.2  
58  
49  
19  
RDS(on)  
gfs  
Drain-to-source on resistance  
Transconductance  
mΩ  
VGS = 10 V, ID = 5 A  
VDS = 10 V, ID = 5 A  
59  
S
DYNAMIC CHARACTERISTICS  
Ciss  
Coss  
Crss  
RG  
Input capacitance  
349  
69  
454  
90  
pF  
pF  
pF  
Output capacitance  
Reverse transfer capacitance  
Series gate resistance  
Gate charge total (10 V)  
Gate charge gate-to-drain  
Gate charge gate-to-source  
Gate charge at Vth  
Output charge  
VGS = 0 V, VDS = 50 V, ƒ = 1 MHz  
12.6  
4.6  
4.3  
0.8  
1.6  
1.0  
12.3  
5
16.4  
9.2  
Qg  
5.6  
nC  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgd  
Qgs  
Qg(th)  
Qoss  
td(on)  
tr  
VDS = 50 V, ID = 5 A  
VDS = 50 V, VGS = 0 V  
Turnon delay time  
Rise time  
3
VDS = 50 V, VGS = 10 V,  
IDS = 5 A, RG = 0 Ω  
td(off)  
tf  
Turnoff delay time  
Fall time  
7
2
DIODE CHARACTERISTICS  
VSD  
Qrr  
trr  
Diode forward voltage  
Reverse recovery charge  
Reverse recovery time  
ISD = 5 A, VGS = 0 V  
0.85  
94  
1.0  
V
nC  
ns  
VDS= 50 V, IF = 5 A,  
di/dt = 300 A/μs  
32  
5.2 Thermal Information  
TA = 25°C (unless otherwise stated)  
THERMAL METRIC  
Junction-to-case thermal resistance(1)  
Junction-to-ambient thermal resistance(1)(2)  
MIN  
TYP  
MAX  
UNIT  
°C/W  
°C/W  
RθJC  
RθJA  
6.2  
65  
(1)  
R
θJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-  
cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.  
(2) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.  
4
Copyright © 2016–2017, Texas Instruments Incorporated  
CSD19538Q2  
www.ti.com.cn  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
GATE  
Source  
GATE  
Source  
Max RθJA = 250°C/W  
when mounted on a  
minimum pad area of  
2-oz (0.071-mm) thick  
Cu.  
Max RθJA = 65°C/W  
when mounted on 1 in2  
(6.45 cm2) of 2-oz  
(0.071-mm) thick Cu.  
DRAIN  
DRAIN  
M0161-02  
M0161-01  
5.3 Typical MOSFET Characteristics  
TA = 25°C (unless otherwise stated)  
Figure 1. Transient Thermal Impedance  
Copyright © 2016–2017, Texas Instruments Incorporated  
5
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
Typical MOSFET Characteristics (continued)  
TA = 25°C (unless otherwise stated)  
30  
30  
27  
24  
21  
18  
15  
12  
9
TC = 125°C  
TC = 25°C  
TC = -55°C  
27  
24  
21  
18  
15  
12  
9
6
6
VGS = 6 V  
VGS = 8 V  
VGS = 10 V  
3
0
3
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
1
2
3
4
5
6
7
VDS - Drain-to-Source Voltage (V)  
VGS - Gate-to-Source Voltage (V)  
D002  
D003  
VDS = 5 V  
Figure 2. Saturation Characteristics  
Figure 3. Transfer Characteristics  
10000  
1000  
100  
10  
10  
9
8
7
6
5
4
3
2
1
0
Ciss = Cgd + Cgs  
Coss = Cds + Cgd  
Crss = Cgd  
1
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
VDS - Drain-to-Source Voltage (V)  
Qg - Gate Charge (nC)  
D005  
D004  
ID = 5 A  
VDS = 50 V  
Figure 5. Capacitance  
Figure 4. Gate Charge  
200  
180  
160  
140  
120  
100  
80  
3.8  
3.6  
3.4  
3.2  
3
TC = 25èC, ID = 5 A  
TC = 125èC, ID = 5 A  
2.8  
2.6  
2.4  
2.2  
60  
40  
20  
0
0
2
4
6
8
10  
12  
14  
16  
18  
20  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
VGS - Gate-to-Source Voltage (V)  
TC - Case Temperature (èC)  
D007  
D006  
ID = 250 µA  
Figure 7. On-State Resistance vs Gate-to-Source Voltage  
Figure 6. Threshold Voltage vs Temperature  
6
Copyright © 2016–2017, Texas Instruments Incorporated  
CSD19538Q2  
www.ti.com.cn  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
Typical MOSFET Characteristics (continued)  
TA = 25°C (unless otherwise stated)  
100  
10  
2.2  
TC = 25°C  
TC = 125°C  
VGS = 6 V  
VGS = 10 V  
2
1.8  
1.6  
1.4  
1.2  
1
1
0.1  
0.01  
0.001  
0.0001  
0.8  
0.6  
0.4  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
TC - Case Temperature (°C)  
VSD - Source-to-Drain Voltage (V)  
D008  
D009  
ID = 5 A  
Figure 8. Normalized On-State Resistance vs Temperature  
Figure 9. Typical Diode Forward Voltage  
100  
10  
1
100  
TC = 25è C  
TC = 125è C  
10  
1
0.1  
DC  
10 ms  
1 ms  
100 µs  
10 µs  
0.01  
0.1  
1
10  
100  
1000  
0.01  
0.1  
1
VDS - Drain-to-Source Voltage (V)  
TAV - Time in Avalanche (ms)  
D010  
D011  
Single pulse, max RθJC = 6.2°C/W  
Figure 10. Maximum Safe Operating Area  
Figure 11. Single Pulse Unclamped Inductive Switching  
16  
14  
12  
10  
8
6
4
2
0
-50  
-25  
0
25  
50  
75  
100 125 150 175  
TC - Case Temperature (èC)  
D012  
Figure 12. Maximum Drain Current vs Temperature  
Copyright © 2016–2017, Texas Instruments Incorporated  
7
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
6 器件和文档支持  
6.1 接收文档更新通知  
如需接收文档更新通知,请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册  
后,即可每周定期收到已更改的产品信息。有关更改的详细信息,请查阅已修订文档中包含的修订历史记录。  
6.2 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
6.3 商标  
NexFET, E2E are trademarks of Texas Instruments.  
All other trademarks are the property of their respective owners.  
6.4 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
6.5 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
8
版权 © 2016–2017, Texas Instruments Incorporated  
CSD19538Q2  
www.ti.com.cn  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
7 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。要获得这份数据表的浏览器版本,请查阅左侧的导航栏。  
7.1 Q2 封装尺寸  
2.1  
1.9  
B
A
PIN 1 INDEX AREA  
2.1  
1.9  
0.8 MAX  
C
SEATING PLANE  
0.05  
0.00  
0.75±0.1  
PKG  
(0.2)  
(0.2) TYP  
(0.47)  
0.3±0.05  
3
4
7
4X  
0.65  
(0.5)  
PKG  
2X  
1.3  
8
0.95±0.1  
6
1
(0.2)  
0.35  
0.25  
6X  
PIN 1 ID  
(45 X0.3)  
1±0.1  
0.1  
C A  
C
B
0.3  
0.2  
0.05  
6X  
1. 所有线性尺寸的单位均为毫米。括号中的任何尺寸仅供参考。尺寸和容限值遵循 ASME Y14.5M。  
2. 本图纸如有变更,恕不通知。  
3. 封装散热盘必须在印刷电路板上焊接,包装散热和机械性能。  
版权 © 2016–2017, Texas Instruments Incorporated  
9
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
Q2 封装尺寸 (接下页)  
7.1.1 建议 PCB 布局  
(1)  
PKG  
6X (0.45)  
1
6
8
6X (0.3)  
PKG  
(0.95)  
(0.325)  
(0.65)  
4X (0.65)  
7
3
4
(0.3)  
(R0.05) TYP  
(0.095)  
(0.75)  
(1.95)  
0.05 MIN  
ALL AROUND  
0.05 MAX  
ALL AROUND  
SOLDER MASK  
OPENING  
METAL  
METAL UNDER  
SOLDER MASK  
SOLDER MASK  
OPENING  
NON SOLDER MASK  
SOLDER MASK  
DEFINED  
DEFINED  
(PREFERRED)  
1. 有关针对  
PCB  
设计的建议电路布局布线,请参见《通过  
PCB  
布局布线技巧来减少振铃》(文献编  
PCB 连接》(文献编  
号:SLPA005)。  
2. 此封装设计用于焊接到电路板的散热焊盘上。更多信息,请参见QFN/SON  
号:SLUA271)。  
10  
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CSD19538Q2  
www.ti.com.cn  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
Q2 封装尺寸 (接下页)  
7.1.2 推荐的模版布局  
(0.9)  
PKG  
METAL  
ALL AROUND, TYP  
6X (0.45)  
1
6X (0.3)  
6
8
(0.86)  
(0.325)  
PKG  
4X (0.65)  
(0.65)  
7
(0.29)  
3
4
(R0.05) TYP  
(0.095)  
(0.7)  
(1.95)  
1. 所有线性尺寸的单位均为毫米。  
2. 具有漏斗形壁和圆角的激光切割窗孔将提供更佳的焊锡膏脱离。IPC-7525 可能提供其他替代性设计建议。  
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11  
CSD19538Q2  
ZHCSF65A JULY 2016REVISED JANUARY 2017  
www.ti.com.cn  
7.2 Q2 卷带信息  
4.00 0.10  
2.00 0.0ꢀ  
Ø 1.ꢀ0 0.10  
10° Max  
4.00 0.10  
Ø 1.00 0.2ꢀ  
1.00 0.0ꢀ  
0.2ꢀ4 0.02  
10° Max  
2.30 0.0ꢀ  
M0168-01  
Notes: 1. 测自链齿孔中心线到孔眼中心线。  
2. 10 个链齿孔的累积容差为 ±0.2。  
3. 提供了其他材料。  
4. 卷带的 SR 典型值最大为 109 OHM/SQ。  
5. 所有尺寸单位均为 mm,除非另有说明。  
12  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jan-2022  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
CSD19538Q2  
CSD19538Q2T  
ACTIVE  
ACTIVE  
WSON  
WSON  
DQK  
DQK  
6
6
3000 RoHS & Green  
250 RoHS & Green  
NIPDAU | SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-55 to 150  
-55 to 150  
1958  
1958  
NIPDAU | SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
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