DRV421RTJR [TI]
用于闭环应用的集成式磁通门传感器 IC | RTJ | 20 | -40 to 125;
| 型号： | DRV421RTJR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 用于闭环应用的集成式磁通门传感器 IC | RTJ | 20 | -40 to 125 传感器 |
| 文件： | 总43页 (文件大小：1707K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
DRV421 用于闭环电流感测的集成磁通门传感器
1 特性
3 说明
1
•
高精度、集成磁通门传感器
DRV421 设计用于闭环磁流传感解决方案，可实现精
密的隔离式直流和交流电流测量。该器件提供专有的集
成磁通门传感器以及所需的模拟信号调节功能，从而最
大限度减少组件数量和成本。磁通门传感器具有低偏移
和漂移，再搭配上优化的前端电路，可提供无与伦比的
测量精度。
–
偏移和漂移：±8µT（最大值），±5nT/°C（典型
值）
•
•
扩展电流测量范围
H 桥输出驱动：5V 时的典型值为 ±250mA
精密分流感测放大器
–
–
–
偏移和漂移（最大值）：±75µV，±2µV/°C
DRV421 提供驱动电流感测反馈环路所需的全部电路
模块。传感器前端电路后跟一个滤波器，经配置可与各
种磁芯搭配使用。该器件通过集成的 250mA H 桥来驱
动补偿线圈，相比传统的单端驱动方式，可使电流测量
范围扩大一倍。该器件同时提供精密基准电压和分流感
测放大器，用以生成并驱动模拟输出信号。
增益误差和漂移（最大值）：±0.3%，±5ppm/°
C
•
精密基准
–
–
–
精度和漂移（最大值）：±2%，±50ppm/°C
引脚可选电压：2.5V 或 1.65V
可选比例模式：VDD/2
器件信息(1)
•
•
•
•
磁芯消磁功能
器件型号
DRV421
封装
WQFN (20)
封装尺寸（标称值）
诊断 特性：超限和错误标志
电源电压范围：3.0V 至 5.5V
4.00mm x 4.00mm
(1) 要了解所有可用封装，请见数据表末尾的封装选项附录。
在 -40°C 至 +125°C 的扩展工业温度范围内完全额
定运行
2 应用
•
•
•
•
•
闭环直流和交流电流传感器模块
泄漏电流传感器
工业用监控和控制系统
过流检测
频率、电压和太阳能逆变器
典型应用
optional
3.3 V or 5 V
magnetic
core
RSHUNT
DRV421
Fluxgate Sensor Front-End
Shunt
Sense
H-Bridge
Driver
Amplifier
Integrator
and
Filter
Fluxgate
Sensor
compensation
coil
ADC
Device Control and Degaussing
Reference
return current
conductor
primary
current
(optional)
conductor
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBOS704
DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
Detailed Description ............................................ 16
7.1 Overview ................................................................. 16
7.2 Functional Block Diagram ....................................... 16
7.3 Feature Description................................................. 17
7.4 Device Functional Modes........................................ 26
8
9
Application and Implementation ........................ 27
8.1 Application Information............................................ 27
8.2 Typical Application ................................................. 29
Power-Supply Recommendations...................... 34
9.1 Power-Supply Decoupling....................................... 34
9.2 Power-On Start Up and Brownout .......................... 34
9.3 Power Dissipation ................................................... 34
10 Layout................................................................... 35
10.1 Layout Guidelines ................................................. 35
10.2 Layout Example .................................................... 36
11 器件和文档支持 ..................................................... 37
11.1 文档支持 ............................................................... 37
11.2 社区资源................................................................ 37
11.3 商标....................................................................... 37
11.4 静电放电警告......................................................... 37
11.5 Glossary................................................................ 37
12 机械、封装和可订购信息....................................... 37
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (July 2015) to Revision B
Page
•
•
•
•
•
已添加 TI 设计 ........................................................................................................................................................................ 1
已添加后两个应用 要点的措辞 ............................................................................................................................................... 1
Changed QFN to WQFN in pin configuration drawing .......................................................................................................... 3
Changed QFN to WQFN in Thermal Information table ......................................................................................................... 4
Changed QFN to WQFN in Power Dissipation section ....................................................................................................... 34
Changes from Original (May 2015) to Revision A
Page
•
已发布为量产数据................................................................................................................................................................... 1
2
Copyright © 2015–2016, Texas Instruments Incorporated
DRV421
www.ti.com.cn
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
5 Pin Configuration and Functions
RTJ Package
20-Pin WQFN
Top View
GSEL0
RSEL1
1
2
3
4
5
15 OR
14 AINN
13 AINP
12 ICOMP1
11 ICOMP2
RSEL0
REFOUT
REFIN
(Thermal Pad)
Pin Functions
PIN
I/O
DESCRIPTION
NAME
AINN
NO.
14
I
I
Inverting input of shunt sense amplifier
AINP
13
Noninverting input of shunt sense amplifier
Degauss control input
DEMAG
ER
18
I
19
O
—
I
Error flag; open-drain, active low output
Ground reference
GND
7, 10, 16, 17
GSEL0
GSEL1
ICOMP1
ICOMP2
OR
1
20
12
11
15
5
Gain and bandwidth selection input 0
Gain and bandwidth selection input 1
Output 1 of compensation coil driver
Output 2 of compensation coil driver
I
O
O
O
I
Shunt sense amplifier overrange indicator; open-drain, active-low output
Common-mode reference input for the shunt sense amplifier
Voltage reference output
REFIN
REFOUT
RSEL0
RSEL1
4
O
I
3
Voltage reference mode selection input 0
2
I
Voltage reference mode selection input 1
Supply voltage, 3.0 V to 5.5 V. Decouple both pins using 1-µF ceramic capacitors placed as
close as possible to the device. See the Power-Supply Decoupling and Layout sections for
further details.
VDD
8, 9
6
—
VOUT
O
Shunt sense amplifier output
Connect thermal pad to GND
PowerPAD™
—
Copyright © 2015–2016, Texas Instruments Incorporated
3
DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
–0.3
MAX
UNIT
Supply voltage (VDD to GND)
7
VDD + 0.5
VDD + 6.0
300
(2)
Voltage
Input voltage, except pins AINP and AINN
GND – 0.5
GND – 6.0
–300
V
(3)
Shunt sense amplifier inputs (pins AINP and AINN)
Pins ICOMP1 and ICOMP2 (short circuit current ISC
(4)
)
Current
pins AINP and AINN
All remaining pins
–5
5
mA
°C
Shunt sense amplifier inputs
–25
25
Junction, TJ max
Storage, Tstg
–50
150
Temperature
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must
be current limited, except for the shunt sense amplifier input pins.
(3) These inputs are not diode-clamped to the power supply rails.
(4) Power-limited; observe maximum junction temperature.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
3.0
NOM
MAX
5.5
UNIT
VDD
TA
Supply voltage
5.0
V
Specified ambient temperature range
–40
125
°C
6.4 Thermal Information
SBOS704
(1)
THERMAL METRIC
RTJ (WQFN)
20 PINS
34.1
UNITS
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
33.1
11.0
ψJT
0.3
ψJB
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
11.0
RθJC(bot)
2.1
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2015–2016, Texas Instruments Incorporated
DRV421
www.ti.com.cn
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
6.5 Electrical Characteristics
All minimum and maximum specifications at TA = +25°C, VDD = 3.0 V to 5.5 V, and ICOMP1 = ICOMP2 = 0 mA (unless otherwise
noted). Typical values are at VDD = 5.0 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FLUXGATE SENSOR FRONT-END
(1)
Offset
No magnetic field
–8
±2
±5
8
µT
nT/°C
nTrms
nT/√Hz
mT
Offset drift
No magnetic field
f = 0.1 Hz to 10 Hz
f = 1 kHz
Noise
17
Noise density
1.5
1.7
16
Saturation trip level for pin ER
AOL
DC open-loop gain
V/µT
GSEL[1:0] = 00, at 3.8 kHz,
integration-to-flatband corner frequency
8.5
38
GSEL[1:0] = 01, at 3.8 kHz,
integration-to-flatband corner frequency
AC open-loop gain
V/mT
GSEL[1:0] = 10, at 1.9 kHz,
integration-to-flatband corner frequency
25
GSEL[1:0] = 11, at 1.9 kHz,
integration-to-flatband corner frequency
70
VICOMP1 – VICOMP2 = 4.2 VPP,VDD = 5 V,
TA = –40°C to +125°C
210
125
250
150
Peak current at pins ICOMP1 and
ICOMP2
IICOMP
mA
VICOMP1 – VICOMP2 = 2.5 VPP, VDD = 3.3 V,
TA = –40°C to +125°C
20-Ω load, VDD = 5 V, TA = –40°C to +125°C
20-Ω load, VDD = 3.3 V, TA = –40°C to +125°C
4.2
2.5
Voltage swing at pins ICOMP1 and
ICOMP2
VICOMP
VPP
V
Common-mode output voltage at pins
ICOMP1 and ICOMP2
VREFOUT
SHUNT SENSE AMPLIFIER
VOO
Output offset voltage
VAINP = VAINN = VREFIN, VDD = 3.0 V
–0.075
–2
±0.01
±0.4
±50
±4
0.075
2
mV
µV/°C
µV/V
µV/V
V
Output offset voltage drift
(2)
CMRR
PSRRAMP
VIC
Common-mode rejection ratio, RTO
Power-supply rejection ratio, RTO
Common-mode input voltage range
Differential input impedance
VCM = −1 V to VDD + 1 V, VREFIN = VDD / 2
–250
–50
–1
250
VDD = 3.0 V to 5.5 V, VCM = VREFIN
50
VDD + 1
23.5
60
ZIND
ZIC
16.5
40
20
kΩ
Common-mode input impedance
50
kΩ
G
Gain, VOUT / (VAINP – VAINN
)
4
V/V
EG
Gain error
–0.3%
–5
±0.02%
0.3%
5
Gain error drift
±1
ppm/°C
ppm
Linearity error
RL = 1 kΩ
12
VDD = 5.5 V, IVOUT = 2.5 mA
VDD = 3.0 V, IVOUT = 2.5 mA
VDD = 5.5 V, IVOUT = –2.5 mA
VDD = 3.0 V, IVOUT = –2.5 mA
VOUT connected to GND
VOUT connected to VDD
48
85
Voltage output swing from negative rail
(OR pin trip level)
mV
mV
mA
56
VDD – 48
VDD – 56
–18
100
VDD – 85
Voltage output swing from positive rail
(OR pin trip level)
VDD – 100
ISC
Short-circuit current
20
Signal overrange indication delay (OR pin) VIN = 1-V step
2.5 to 3.5
2
µs
MHz
V/µs
µs
BW–3dB
SR
Bandwidth
Slew rate
6.5
Settling time, large-signal
ΔV = ± 2 V to 1% accuracy, no external filter
0.9
Settling time, small-signal
ΔV = ± 0.4 V to 0.01% accuracy
f = 1 kHz, compensation loop disabled
TA = –40°C to +125°C
8
µs
en
Output voltage noise density, RTO
Input voltage range at pin REFIN
170
nV/√Hz
V
VREFIN
GND
VDD
(1) Fluxgate sensor front-end offset can be reduced using the feature.
(2) Parameter value referred to output (RTO).
Copyright © 2015–2016, Texas Instruments Incorporated
5
DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
www.ti.com.cn
Electrical Characteristics (continued)
All minimum and maximum specifications at TA = +25°C, VDD = 3.0 V to 5.5 V, and ICOMP1 = ICOMP2 = 0 mA (unless otherwise
noted). Typical values are at VDD = 5.0 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOLTAGE REFERENCE
RSEL[1:0] = 00, no load
2.45
1.6
2.5
1.65
50
2.55
1.7
V
VREFOUT
Reference output voltage at pin REFOUT RSEL[1:0] = 01, no load
RSEL[1:0] = 1x, no load
45
55 % of VDD
Reference output voltage drift
Voltage divider gain error drift
Power-supply rejection ratio
RSEL[1:0] = 00, 01
RSEL[1:0] = 1x
–50
–50
–300
±10
±10
±15
50
50
ppm/°C
ppm/°C
µV/V
PSRRREF
RSEL[1:0] = 00, 01
300
RSEL[1:0] = 0x, load to GND or VDD,
ΔILOAD = 0 mA to 5 mA, TA = –40°C to +125°C
0.15
0.3
0.35
0.8
Load regulation
mV/mA
mA
RSEL[1:0] = 1x, load to GND or VDD,
ΔILOAD = 0 mA to 5 mA, TA = –40°C to +125°C
REFOUT connected to VDD
REFOUT connected to GND
20
ISC
Short-circuit current
–18
DIGITAL INPUTS/OUTPUTS
Logic Inputs (CMOS)
VIH
VIL
High-level input voltage
TA = –40°C to +125°C
TA = –40°C to +125°C
0.7 × VDD
–0.3
VDD + 0.3
0.3 × VDD
V
V
Low-level input voltage
Input leakage current
0.01
µA
Logic Outputs (Open-Drain)
VOH
VOL
High-level output voltage
Low-level output voltage
Set by external pull-up resistor
0.3
V
V
4-mA sink
POWER SUPPLY
IICOMP1 = IICOMP2 = 0 mA, 3.0 V ≤ VDD ≤ 3.6 V,
TA = –40°C to +125°C
6.5
9
IQ
Quiescent current
mA
V
IICOMP1 = IICOMP2 = 0 mA, 4.5 V ≤ VDD ≤ 5.5 V,
TA = –40°C to +125°C
8.1
2.4
11
VRST
Power-on reset threshold
6
版权 © 2015–2016, Texas Instruments Incorporated
DRV421
www.ti.com.cn
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
6.6 Typical Characteristics
at VDD = 5 V and TA = +25°C (unless otherwise noted)
50
40
30
20
10
0
50
40
30
20
10
0
D001
D002
Offset (mT)
Offset (mT)
VDD = 5 V
VDD = 3.3 V
图 1. Fluxgate Sensor Front-End Offset Histogram
图 2. Fluxgate Sensor Front-End Offset Histogram
4
3
4
3
Device 1
Device 2
Device 3
2
2
1
1
0
0
-1
-2
-3
-4
-1
-2
-3
-4
3
3.5
4
4.5
5
5.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Supply Voltage (V)
D003
D004
图 3. Fluxgate Sensor Front-End Offset vs
图 4. Fluxgate Sensor Front-End Offset vs
Supply Voltage
Temperature
100
10
1
50
40
30
20
10
0
0.1
0.0001
0.001
0.01
0.1
1
10
100
Noise Frequency (kHz)
D005
D006
Offset Drift (nT/èC)
图 6. Fluxgate Sensor Front-End Noise Density vs
图 5. Fluxgate Sensor Front-End Offset Drift
Noise Frequency
Histogram
版权 © 2015–2016, Texas Instruments Incorporated
7
DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
www.ti.com.cn
Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
60
60
50
40
30
20
10
0
50
40
30
20
10
0
D007
D008
Saturation Trip Level (mT)
DC Open-Loop Gain (V/mT)
图 7. Fluxgate Sensor Saturation (ER Pin) Trip Level
图 8. Fluxgate Sensor Front-End DC Open-Loop Gain
Histogram
Histogram
160
140
120
100
80
50
40
30
20
10
0
GSEL[1:0]=00
GSEL[1:0]=01
GSEL[1:0]=10
GSEL[1:0]=11
60
40
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
0.001
0.01
0.1
1
10
100
Frequency (kHz)
D009
D010
图 9. Fluxgate Sensor Front-End DC Open-Loop Gain vs
图 10. Fluxgate Sensor Front-End AC Open-Loop Gain vs
Temperature
Frequency
5
4
3
2
1
0
VDD = 5 V
VDD = 3.3 V
-1
-2
-3
-4
-5
VDD = 5 V
VDD = 3.3 V
0
-250 -225 -200 -175 -150 -125 -100 -75 -50 -25
Negative Peak Current (mA)
0
0
25
50
75 100 125 150 175 200 225 250
Positive Peak Current (mA)
D011
D012
图 11. Voltage Swing at ICOMPx Pins vs
图 12. Voltage Swing at ICOMPx Pins vs
Negative Peak Current
Positive Peak Current
8
版权 © 2015–2016, Texas Instruments Incorporated
DRV421
www.ti.com.cn
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
0
5
4
3
2
1
0
VDD = 5 V
VDD = 3.3 V
-1
-2
-3
-4
-5
VDD = 5 V
VDD = 3.3 V
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D013
D014
RLOAD = 20 Ω
RLOAD = 20 Ω
图 13. Negative Voltage Swing at ICOMPx Pins vs
图 14. Positive Voltage Swing at ICOMPx Pins vs
Temperature
Temperature
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
D015
D0165
Output Offset (mV)
Output Offset (mV)
VDD = 5 V
VDD = 3.3 V
图 15. Shunt Sense Amplifier Offset Histogram
图 16. Shunt Sense Amplifier Offset Histogram
75
50
75
50
Device 1
Device 2
Device 3
25
25
0
0
-25
-50
-75
-25
-50
-75
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
D017
D018
图 17. Shunt Sense Amplifier Offset vs Temperature
图 18. Shunt Sense Amplifier Offset vs Supply Voltage
版权 © 2015–2016, Texas Instruments Incorporated
9
DRV421
ZHCSDW9B –MAY 2015–REVISED MARCH 2016
www.ti.com.cn
Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
100
80
60
40
20
0
50
40
30
20
10
0
0.01
0.1
1
10
100
1000
Input Signal Frequency (kHz)
D019
D020
Common-Mode Rejection Ratio (mV/V)
图 20. Shunt Sense Amplifier Common-Mode Rejection
图 19. Shunt Sense Amplifier Common-Mode Rejection
Ratio vs Input Signal Frequency
Ratio Histogram
70
100
60
50
40
30
20
10
0
80
60
40
20
0
0.01
0.1
1
10
100
1000
Ripple Frequency (kHz)
D021
D022
Power-Supply Rejection Ratio (mV/V)
图 22. Shunt Sense Amplifier Power-Supply Rejection Ratio
图 21. Shunt Sense Amplifier Power-Supply Rejection Ratio
vs Ripple Frequency
Histogram
100
80
60
40
20
0
51
50.8
50.6
50.4
50.2
50
49.8
49.6
49.4
49.2
49
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D023
D024
AINP Input Impedance (kW)
图 24. Shunt Sense Amplifier AINP Input Impedance vs
图 23. Shunt Sense Amplifier AINP Input Impedance
Temperature
Histogram
10
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DRV421
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Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
50
11
10.8
10.6
10.4
10.2
10
40
30
20
10
0
9.8
9.6
9.4
9.2
9
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D025
D026
AINN Input Impedance (kW)
图 26. Shunt Sense Amplifier AINN Input Impedance vs
图 25. Shunt Sense Amplifier AINN Input Impedance
Temperature
Histogram
100
80
60
40
20
0
0.3
0.25
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.25
-0.3
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D027
D028
Gain Error (%)
图 28. Shunt Sense Amplifier Gain Error vs Temperature
图 27. Shunt Sense Amplifier Gain Error Histogram
20
15
10
5
40
35
30
25
20
15
10
5
0
0
0.01
0.1
1
10
100
1000
10000
3
3.5
4
4.5
5
5.5
Input Signal Frequency (kHz)
Supply Voltage (V)
D029
D030
图 29. Shunt Sense Amplifier Gain vs
图 30. Shunt Sense Amplifier Linearity vs
Frequency
Supply Voltage
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Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
0.5
0.5
0.4
0.3
0.2
0.1
0
VDD = 5.5 V
VDD = 3.0 V
VDD = 5.5 V
VDD = 3.0 V
0.4
0.3
0.2
0.1
0
0
1
2
3
4
5
6
7
8
9
10
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Output Current (mA)
D031
D032
图 31. OR Pin Trip Level vs Output Current
图 32. OR Pin Trip Level vs Temperature
40
30
4
VOUT to GND
VOUT to VDD
3.75
3.5
3.25
3
20
10
0
-10
-20
-30
-40
2.75
2.5
2.25
2
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D033
D034
图 33. OR Pin Trip Delay vs Temperature
图 34. Shunt Sense Amplifier Output Short-Circuit Current
vs Temperature
40
30
0.25
0.2
VOUT to GND
VOUT to VDD
0.15
0.1
20
10
0.05
0
0
-0.05
-0.1
-0.15
-10
-20
-30
-40
VOUT
VIN
-0.2
-0.25
3
3.5
4
4.5
5
5.5
-2.5
0
2.5
5
7.5
10
12.5
15
17.5
Supply Voltage (V)
Time (ms)
D035
D048
Rising Edge
图 35. Shunt Sense Amplifier Output Short-Circuit Current
图 36. Shunt Sense Amplifier Small-Signal
vs Supply Voltage
Settling Time
12
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Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
0.25
1.25
1
VOUT
VIN
0.2
0.15
0.1
0.75
0.5
0.05
0
0.25
0
-0.05
-0.1
-0.15
-0.2
-0.25
-0.25
-0.5
-0.75
-1
VOUT
VIN
-1.25
-2.5
0
2.5
5
7.5
10
12.5
15
17.5
-0.5
0
0.5
1
1.5
2
2.5
Time (ms)
Time (ms)
D049
D050
Falling Edge
Rising Edge
图 37. Shunt Sense Amplifier Small-Signal
图 38. Shunt Sense Amplifier Large-Signal
Settling Time
Settling Time
1.25
1
5
4
VOUT
VIN
VIN
VOUT
0.75
0.5
3
2
0.25
0
1
0
-0.25
-0.5
-0.75
-1
-1
-2
-3
-4
-5
-1.25
-0.5
0
0.5
1
1.5
2
2.5
-0.1 -0.075 -0.05 -0.025
0
0.025 0.05 0.075 0.1
Time (ms)
Time (ms)
D051
D036
Falling Edge
VDD = 5 V
图 39. Shunt Sense Amplifier Large-Signal
图 40. Shunt Sense Amplifier Overload Recovery Response
Settling Time
5
4
10000
VIN
VOUT
3
2
1000
100
10
1
0
-1
-2
-3
-4
-5
-0.1 -0.075 -0.05 -0.025
0
0.025 0.05 0.075 0.1
10
100
1000
10000
100000
Time (ms)
Noise Frequency (Hz)
D037
D038
VDD = 3.3 V
图 41. Shunt Sense Amplifier Overload Recovery Response
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图 42. Shunt Sense Amplifier Output Voltage Noise Density
vs Noise Frequency
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Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
50
2.55
2.54
2.53
2.52
2.51
2.5
Device 1
Device 2
Device 3
40
30
20
10
0
2.49
2.48
2.47
2.46
2.45
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D039
D040
Reference Voltge (V)
图 44. Reference Voltage vs Temperature
图 43. Reference Voltage Histogram
30
3
2.8
2.6
2.4
2.2
2
RSEL[1:0] = 00
RSEL[1:0] = 01
25
20
15
10
1.8
1.6
1.4
5
0
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
D041
D042
Reference Voltage Drift (ppm/èC)
图 46. Reference Voltage vs Supply Voltage
图 45. Reference Voltage Drift Histogram
50
40
30
20
10
0
3
RSEL[1:0] = 00
RESL[1:0] = 01
RSEL[1:0] = 1x
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
-5
-4
-3
-2
-1
0
1
2
3
4
5
Referene Current (mA)
D044
D043
Power-Supply Rejection Ratio (mV/V)
图 47. Reference Voltage vs Reference Output Current
图 48. Reference Voltage Power-Supply Rejection Ratio
Histogram
14
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Typical Characteristics (接下页)
at VDD = 5 V and TA = +25°C (unless otherwise noted)
100
10
9.5
9
VDD = 3 V
VDD = 5.5 V
80
60
40
20
0
8.5
8
7.5
7
6.5
6
5.5
5
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D045
D046
Load Regulation (mV/mA)
图 50. Quiescent Current vs Temperature
图 49. Reference Voltage Load Regulation Histogram
2.55
2.45
2.35
2.25
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
D047
图 51. Power-On Reset Threshold vs Temperature
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7 Detailed Description
7.1 Overview
The DRV421 is a fully-integrated, magnetic fluxgate sensor, with the necessary sensor conditioning and
compensation circuitry for closed-loop current sensors. The device is inserted into an air gap of an external
ferromagnetic toroid core to sense the magnetic field. A compensation coil wrapped around the magnetic core
generates a magnetic field opposite to the one generated by the current flow to be measured.
At dc and low-frequencies, the magnetic field induced by the current in the primary conductor generates a flux in
the magnetic core. The fluxgate sensor detects the flux in the DRV421. The device filters the sensor output to
provide loop stability. The filter output connects to the built-in H-bridge driver that drives an opposing current
through the external compensation coil. The compensation coil generates an opposite magnetic field that brings
the original magnetic flux in the core back to zero.
At higher frequencies, the inductive coupling between the primary conductor and compensation coil directly
drives a current through the compensation coil.
The compensation current is proportional to the primary current (IPRIMARY), with a value that is calculated using 公
式 1:
IICOMP = IPRIMARY / NWINDING
where
•
NWINDING = the number of windings of the compensation coil
(1)
This compensation current generates a voltage drop across a small external shunt resistor, RSHUNT. An
integrated difference amplifier with a fixed gain of 4 V/V measures this voltage and generates an output voltage
that is referenced to REFIN and proportional to the primary current. The Functional Block Diagram section shows
the DRV421 used as a closed-loop current sensor, for both single-ended and differential primary currents.
7.2 Functional Block Diagram
RSHUNT
compensation
coil
magnetic
core
VDD GND
ICOMP1
ICOMP2
AINP
Shunt
AINN
DRV421
Sense
Amplifier
Fluxgate Sensor Front-End
VOUT
REFIN
Fluxgate
Sensor
H-Bridge
Driver
Integrator and Filter
1.65 V or 2.5 V
Voltage Reference
REFOUT
Device Control and Degaussing
ER DEMAG GSEL0 GSEL1
return current
conductor
(optional)
primary
current
conductor
OR
RSEL0 RSEL1
16
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7.3 Feature Description
7.3.1 Fluxgate Sensor
The fluxgate sensor of the DRV421 is uniquely suited for closed-loop current sensors because of its high
sensitivity, low noise, and low offset. The fluxgate principle relies on repeatedly driving the sensor in and out of
saturation; therefore, the sensor is free of any significant magnetic hysteresis. The feedback loop accurately
drives the magnetic flux inside the core to zero.
The DRV421 package is free of any ferromagnetic materials in order to prevent magnetization by external fields
and to obtain accurate and hysteresis-free operation. Select nonmagnetizable materials for the printed circuit
board (PCB) and passive components in the direct vicinity of the DRV421; see the Layout Guidelines section for
more details.
图 52 shows the orientation of the fluxgate sensor and the direction of magnetic sensitivity inside of the package.
This orientation is marked by a straight line on top of the package.
D421
TI Date
Code
图 52. Orientation and Magnetic Sensitivity Direction of the Integrated Fluxgate Sensor
7.3.2 Integrator-Filter Function and Compensation Loop Stability
The DRV421 and the magnetic core are components of the system feedback loop that compensates the
magnetic flux generated by the primary current. Therefore, the loop properties and stability depend on both
components. Four key parameters determine the stability and effective loop gain at high frequencies:
GSEL[1:0] Filter gain setting pins of the DRV421
GCORE
Open-loop, current-to-field transfer of the magnetic core
Amount of magnetic field generated by 1 A of uncompensated primary current (unit is T/A).
NWINDING
L
Number of compensation coil windings
Compensation coil inductance
A minimum inductance of 100 mH is required for stability. Higher inductance improves
overload current robustness (see the Overload Detection and Control section).
To properly select the filter gain of the DRV421, combine these three parameters into a modified gain factor
(GMOD) using 公式 2:
GCORE ì NWINDING
GMOD
=
L
(2)
The effective loop gain is proportional to the current-to-field transfer of the magnetic core (larger field means
larger gain) and number of compensation coil windings (larger number of windings means larger compensation
field for a given input current). The compensation coil inductance adds a low-frequency pole to the system, thus
a larger inductance reduces the effective loop gain at higher frequencies. A more detailed review of system loop
stability is provided in application report SLOA224, Designing with the DRV421: Control Loop Stability.
For stable operation with a wide range of magnetic cores, the DRV421 features an adjustable loop filter
controlled with pins GSEL1 and GSEL0. 表 1 lists the different filter settings and the related core properties. For
standard closed-loop current transducer modules with medium inductance and small shunt resistor value, use
gain setting 10. Gain setting 01 features a higher integrator-filter crossover frequency of 3.8 kHz, and is
recommended for fault-current sensors with a large shunt resistor and medium inductance.
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Feature Description (接下页)
表 1. DRV421 Loop Gain Filter Settings and Relation to Magnetic Core Parameters
COMPENSATION LOOP PROPERTIES
RANGE OF COMPENSATION
COIL INDUCTANCE L
(NWINDING = 1000
RANGE OF
MODIFIED GAIN
FACTOR GMOD
GSEL1
GSEL0
INTEGRATOR CORNER
AC OPEN-LOOP GAIN
FREQUENCY
and GCORE = 0.6 mT/A)
0
0
1
1
0
1
0
1
3.8 kHz
3.8 kHz
1.9 kHz
1.9 kHz
8.5
38
25
70
3 < GMOD < 12
1 < GMOD < 3
1 < GMOD <3
100 mH < L < 200 mH
200 mH < L < 600 mH
200 mH < L < 600 mH
600 mH < L < 2 H
0.3 < GMOD < 1
表 1 gives an initial gain-setting recommendation based on a simulation model of a generic magnetic core.
Secondary magnetic effects, such as eddy current losses and core hysteresis, can lead to different optimal
settings. Therefore, make sure to verify the correct gain setting by measuring the response of the current sensor
to an input current step at compensation driver output pins ICOMP1 and ICOMP2. Examples of measurement
results with a magnetic core of 300 mH, 1000 compensation coil windings, and different DRV421 gain settings
are shown in 图 53 to 图 56.
ICOMP1
ICOMP2
ICOMP1
ICOMP2
VOUT
ER
VOUT
ER
图 53. Settling of ICOMP1 and ICOMP2
图 54. Settling of ICOMP1 and ICOMP2
with GSEL[1:0] = 00
with GSEL[1:0] = 01
ICOMP1
ICOMP2
ICOMP1
ICOMP2
VOUT
ER
VOUT
ER
图 55. Settling of ICOMP1 and ICOMP2
图 56. Settling of ICOMP1 and ICOMP2
with GSEL[1:0] = 10
with GSEL[1:0] = 11
These measurement examples show a stable response for both GSEL[1:0] = 10 and 11 settings. However,
inductive coupling between the primary current and compensation coil makes it difficult to measure high-
frequency instability. Therefore, use the lowest gain setting that yields a stable response; in this case, use gain
setting 10.
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7.3.3 H-Bridge Driver for Compensation Coil
The H-bridge compensation coil driver provides the current for the compensation coil at pins ICOMP1 and
ICOMP2. A fully-differential driver stage maximizes the driving voltage that is needed to overcome the wire
resistance and inductance of the coil with a single 3.3-V or 5-V supply. The low impedance of the H-bridge driver
outputs over a wide frequency range provides a smooth transition between the compensation frequency range of
the integrator-filter stage and the high-frequency range of the primary current that directly couples into the
compensation coil according to the winding ratio (transformer effect).
The common-mode voltage of the H-bridge driver outputs is set by the RSEL pins (see the Voltage Reference
section). Thus, the common-mode voltage of the shunt sense amplifier is matched if the internal reference is
used.
The two compensation driver outputs are protected and accept inductive energy. However, for high-current
sensors, add external protection diodes (see the Protection Recommendations section).
Consider the polarity of the compensation coil connection to the output of the H-bridge driver. If the polarity is
incorrect, the H-bridge output drives to the power supply rails, even at low primary-current levels. In this case,
interchange the connection of pins ICOMP1 and ICOMP2 to the compensation coil.
7.3.4 Shunt Sense Amplifier
The compensation coil current creates a voltage drop across the external shunt resistor, RSHUNT. The internal
differential amplifier senses this voltage drop. This differential amplifier offers wide bandwidth and a high slew
rate for fast current sensors. Excellent dc stability and accuracy result from an autozero technique. The voltage
gain is 4 V/V, set by precisely-matched and thermally-stable internal resistors.
Both AINN and AINP differential amplifier inputs are connected to the shunt resistor. This resistor, in series with
the internal 10-kΩ resistor, affects the overall gain and causes an additional gain error; this gain error is often
negligible. However, if a common-mode rejection of 70 dB is desired, the match of both divider ratios must be
higher than 1/3000. Therefore, for best common-mode rejection performance, place a dummy shunt resistor (R5)
with a value higher than the shunt resistor in series with the REFIN pin to restore matching of both resistor
dividers, as shown in 图 57.
DRV421
R1
R2
10 kꢀ
40 kꢀ
AINN
_
optional
RF
500 ꢀ
VOUT
REFIN
RSHUNT
Shunt Sense
Amplifier
ADC
CF
+
10 nF
Compensation
Coil
R4
40 kꢀ
R3
10 kꢀ
AINP
REFIN (compensated)
R5
(Dummy Shunt)
ICOMP2
ICOMP1
图 57. Internal Difference Amplifier with Example of a Decoupling Filter
For an overall gain of 4 V/V, calculate the value of R5 using 公式 3:
R2
R1
R4 + R5
4 =
=
RSHUNT + R3
where:
•
•
R2 / R1 = R4 / R3 = 4
R5 = RSHUNT × 4
(3)
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If the input signal is large, the amplifier output drives close to the supply rails. The amplifier output is able to drive
the input of a successive approximation register (SAR) analog-to-digital converter (ADC). For best performance,
add an RC low-pass filter stage between the shunt sense amplifier output and the ADC input. This filter limits the
noise bandwidth and decouples the high-frequency sampling noise of the ADC input from the amplifier output.
For filter resistor RF and filter capacitor CF values, refer to the specific converter recommendations in the
respective product data sheet.
The shunt sense amplifier output drives 100 pF directly and shows 50% overshoot with a 1-nF capacitance. Filter
resistor RF extends the capacitive load range. Note that with an RF of only 20 Ω, the load capacitor must be
either less than 1 nF or more than 33 nF to avoid overshoot; with an RF of 50 Ω, this transient area is avoided.
Reference input REFIN is the common-mode voltage node for output signal VOUT. Use the internal voltage
reference of the DRV421 by connecting the REFIN pin to reference output REFOUT. To avoid mismatch errors,
use the same reference voltage for REFIN and the ADC. Alternatively, use an ADC with a pseudodifferential
input, with the positive input of the ADC connected to the VOUT and the negative input connected to REFIN of
the DRV421.
7.3.5 Overrange Comparator
High peak current across the shunt resistor can generate a voltage drop that overloads the shunt sense amplifier
input. The open-drain, active-low output overrange pin (OR) indicates an overvoltage condition of the amplifier.
The output of this flag is suppressed for 3 μs, preventing unwanted triggering from transients and noise. This pin
returns to high as soon as the overload condition is removed; an external pull-up resistor is required to return the
OR pin to high.
This OR output can be used as a window comparator to actively shut off circuits in the system. The value of the
shunt resistor defines the operating window for the current, and sets the ratio between the nominal signal and the
trip level of the overrange comparator. The trip level (IMAX) of this window comparator is calculated using 公式 4:
IMAX = Input Voltage Swing / RSHUNT
where
•
Input Voltage Swing = Output Voltage Swing / Gain
(4)
For example, with a 5-V supply, the output voltage swing is approximately ±2.45 V (load and supply voltage-
dependent).
The gain of 4 V/V enables an input voltage swing of ±0.6125 V.
The resulting trip level is IMAX = 0.6125 V / RSHUNT
.
See 图 32 and 图 33 in the Typical Characteristics section for details.
Common window comparators use a preset level to detect an overrange condition. The DRV421 internally
detects an overrange condition as soon as the amplifier exceeds the linear operating range, not just at a preset
voltage level. Therefore, the error is reliably indicated in faults such as output-short, low-load, or low-supply
conditions. This configuration is a safety improvement if compared to a standard voltage-level comparator.
The internal resistance of the compensation coil may prevent high compensation current flow because of H-
bridge driver overload; therefore, the shunt sense amplifier might not overload. However, a fast rate of change of
the primary current transmitted through transformer effect safely triggers the overload flag.
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7.3.6 Voltage Reference
The internal precision voltage reference circuit offers low drift performance at the REFOUT output pin and is
used for internal biasing. The reference output is intended to be the common-mode voltage of the output (VOUT
pin) to provide a bipolar signal swing. This low-impedance output tolerates sink and source currents of ±5 mA.
However, fast load transients can generate ringing on this line. A small series resistor of a few ohms improves
the response, particularly for capacitive loads equal to or greater than 1 μF.
Adjust the value of the voltage reference output to the power supply of the DRV421 using mode selection pins
RSEL0 and RSEL1, as shown in 表 2.
表 2. Reference Output Voltage Selection
MODE
RSEL1
RSEL0
DESCRIPTION
Use with sensor module supply of 5 V
VREFOUT = 2.5 V
VREFOUT = 1.65 V
Ratiometric output
0
0
1
0
1
x
Use with sensor module supply of 3.3 V
Provides output centered on VDD / 2
In ratiometric output mode, an internal resistor divider divides the power supply voltage by a factor of two.
For current sensor modules with a reference input pin, the DRV421 also allows overwriting the internal reference
with an external reference voltage, VEXT, as shown in 图 58. If there is a significant difference between the
external and the internal voltage, resistor R5 limits the current flow from the internal reference. In this case, the
internal reference sources current IREFOUT shown in 公式 5:
VREFOUT - VEXT
IREFOUT
=
600 ꢀ
(5)
Current Sense Module
DRV421
AINN
VDD
VDD
_
VOUT
VOUT
REFIN
RSHUNT
Shunt Sense
Amplifier
+
Compensation
Coil
R5
(Dummy Shunt)
External
Voltage
REFIN
GND
AINP
Reference
R6
600 ꢀ
Internal
Voltage
Reference
REFOUT
GND
ICOMP2
ICOMP1
图 58. DRV421 with External Reference
The example of 600 Ω for R6 was chosen for illustration purposes; different values are possible. If no external
reference is connected, R6 has little impact on the common-mode rejection of the shunt sense amplifier;
therefore, use a resistor value that is as small as possible.
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7.3.7 Overload Detection and Control
Magnetic fluxgate sensors have a very high sensitivity and allow detection of small magnetic fields. These
sensors are ideally suited for use in closed-loop current modules appllications because the high sensitivity makes
sure that the field inside the core gap is accurately driven to zero. However, for large fields, the fluxgate
saturates and causes the output to return to zero, as shown in 图 59.
V
Fluxgate
sensor
Fluxgate
sensor
saturated
saturated
B
1 mT
-1 mT
Normal
operation
area
图 59. Typical Fluxgate Sensor Response to Magnetic Fields
In normal operation, the feedback loop keeps the magnetic field close to zero. However, large overload currents
that exceed the measurement range (for example, short-circuit currents) saturates the fluxgate. The behavior is
shown in 图 60, where the compensation current, magnetic field in the core, and fluxgate output are shown for
the case of a 1000-A primary current step.
Primary Current
Compensation Current
1000 A
1 A
0 A
0 A
t
t
Magnetic Field in the Core
Fluxgate Sensor Output
Saturation Detection Level
1.7 mT
0 mT
t
t
图 60. Closed-Loop Current Sensor Response to an Overloaded Step Current
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Use the inverse of 公式 1 to calculate the current measurement range. For example, if the compensation coil has
1000 windings, the maximum measurement range is 210 A at a 5-V supply (210-mA minimum compensation
driver capability × 1000 windings). The inductive coupling between primary current and compensation coil initially
provides a correct compensation current. However, over time, the compensation current drops to 210 mA and
the field inside the core increases beyond the measurement range of the fluxgate. Thus, the sensor output
returns to zero because of saturation.
This zero output causes unpredictable behavior in the analog control loop. For example, as a result of an invalid
fluxgate output, the H-bridge drives the wrong compensation current and generates a large magnetic field
through the compensation coil. This magnetic field keeps the fluxgate in saturation and leads to system lockup.
This unpredicatable behavior exists for any fluxgate-based current sensor.
For proper handling of overload currents, the DRV421 features a two-step overload detection and control
function. Firstly, the polarity of the last four fluxgate sensor outputs exceeding a threshold value of approximately
13 µT are internally stored. Secondly, the DRV421 features an additional circuitry that verifies every 4 µs whether
the fluxgate is saturated. If saturation is detected, digital circuitry overrides the fluxgate output and provides a
high output according to the polarity detected during the last valid sensor output. As a result, the H-brigde drives
the outputs to the supply rails, making sure that the magnetic field returns to within the fluxgate range as soon as
the current returns to within the measurement range. After this happens, the fluxgate is no longer saturated, and
normal analog feedback loop operation resumes. During fluxgate saturation, the error pin is pulled low to signal
that the current exceeds the measurement range (see the Error Flag section).
For correct operation of this overload control feature, at least 10 µs are required between the time the field
exceeds the polarity detection threshold (13 µT) and the saturation trip level (1.7 mT). Initially, fast primary
current steps are inductively coupled to the compensation coil (transformer effect); therefore, the primary current
rise time is not limited. Instead, the rise time is determined by the compensation coil inductance; a larger
inductance leads to a slower compensation current decrease. The minimum required inductance is 100 mH; for
optimal robustness, use 300 mH (see the Magnetic Core Design section for detailed requirements).
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7.3.8 Magnetic Core Demagnetization
Ferromagnetic cores can have a significant remanence (residual magnetism in the absence of any currents).
This core magnetization is caused by strong external magnetic fields, overcurrent conditions in the system, or if a
significant primary current flows when the sensor is not powered. This remaining magnetic field is
indistinguishable from an actual primary current, and creates a magnetic offset error. This magnetic offset error
limits the precision and the dynamic range of the current sensor, and is independent of the fluxgate sensor front-
end offset specified in this data sheet.
To reduce errors caused by core magnetization, the DRV421 features a unique closed-loop demagnetization
feature. Conventional open-loop demagnetization techniques rely on driving a fixed ac waveform through the
compensation coil. Instead, the DRV421 demagnetization feature first measures the magnetic offset using its
integrated fluxgate sensor, and then drives a controlled ac waveform to reduce the measured magnetization.
This method results in significantly better results. Moreover, any fluxgate offset is part of the closed-loop
demagnetization measurement, and therefore removed along with core magnetization, leaving only fluxgate
offset drift over temperature as an error source.
Start the demagnetization feature on demand by pulling the DEMAG pin high for at least 25 µs. This process
starts a 500-ms demagnetization cycle. During this time, the error pin (ER) is pulled low to indicate that the
output is not valid. When DEMAG is high during power up, the demagnetization cycle initiates immediately after
the supply voltage crosses the power-up threshold. Hold DEMAG low to avoid this cycle during start up. To abort
the demagnetization cycle, pull DEMAG low for longer than 25 µs. 图 61 shows the ICOMPx output behavior
during a demagnetization sequence. 图 62 shows the reduced error resulting from core demagnetization.
1000 mA
100 mA
10 mA
1 mA
6
5
4
3
2
1
VDD
VOUT
VICOMP1
VICOMP2
Error Current Level
before Demagnetization
Repeatable Error Current
Level after Demagnetization
0
-0.1
0
0.1
0.2
0.3
0.4
0-.85
0.6
Time (ms)
D052
图 61. Demagnetization Sequence
图 62. Impact of Demagnetization on Error Current
During a demagnetization cycle, the primary current must be zero because the resulting magnetic field cannot be
distinguished from the remanence of the core. A demagnetization cycle in the presence of primary current (or
any other sources of magnetic field) leads to residual errors because the demagnetization feature attempts to
reduce the primary-generated field to zero, but significantly magnetizes the core instead of demagnetizing the
core. If a primary current is present that is large enough to saturate the fluxgate sensor during start up, the
DRV421 skips demagnetization (regardless of the level on the DEMAG pin), and the search function starts
instead (see the Search Function section for more details).
To reduce effects from the earth's magnetic field, degauss in the same orientation as nominal operation of the
system.
24
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ZHCSDW9B –MAY 2015–REVISED MARCH 2016
7.3.9 Search Function
Closed-loop current sensors usually require primary current to be applied only after the sensor is powered up.
This requirement allows the feedback loop to start from zero current operation; the magnetic core is maintained
at zero flux at all times, thus preventing magnetization. Moreover, the DRV421 integrated fluxgate has a limited
measurement range of 1.7 mT. As a result, the presence of a significant primary current at power up saturates
the fluxgate, and the system feedback loop does not work; similar to the presence of an overload current (see
the Overload Detection and Control section).
The DRV421 search function allows for a power up in presence of primary dc current. If the fluxgate is saturated
at power up, the digital logic of the DRV421 connects ICOMP1 to VDD and COMP2 to GND for 30 ms. Because
of the compensation coil inductance, the compensation current slowly increases during this time, and depending
on the primary current polarity, may at some point compensate the primary current. In this case, the fluxgate
sensor desaturates and normal operation initiates. If the fluxgate sensor is still saturated after 30 ms, the voltage
polarity on ICOMPx pins is inverted (ICOMP1 = GND, ICOMP2 = VDD) and the process repeats for opposite
primary current polarity. If the fluxgate remains saturated after 60 ms, the error state persists and the error pin
ER remains active low. 图 63 shows a search sequence starting with the wrong polarity.
VDD
Inverted
Search Function
Polarity
with Wrong Polarity
VICOMP1
Normal
Operation
VICOMP2
VER
图 63. Search Sequence Starting with Wrong Polarity
The search funciton cannot be used for primary ac currents. Moreover, the presence of primary current before
the sensor is powered up may lead to core magnetization, and thus offset shift. Therefore, for robust operation,
do not power up in the presence of primary currents.
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7.3.10 Error Flag
The DRV421 features an error output (ER pin) that is activated under multiple conditions. The error flag is active
when the output voltage is not proportional to the primary current; during a power fail or brownout; during a
demagnetization cycle; or when the magnetic field on the fluxgate is greater than 1.7 mT (saturation of the
fluxgate). Saturation is usually caused by either the consequence of an overload current (see the Overload
Detection and Control section) or results from a power-up in the presence of a primary current (see the Search
Function section).
The error flag resets as soon as the error condition is no longer present and the circuit has returned to normal
operation. The error flag is an open-drain logic output. Connect the error flag to the overrange flag for a wired-
OR; for proper operation, use an external pull-up resistor. The following conditions result in error flag activation
(ER asserts low):
1. For 80 µs after power-up
2. If a supply-voltage brownout condition (VDD < 2.4 V) lasts for more than 20 µs
3. If the sensed magnetic field is > 1.7 mT because:
–
–
Overload control is active
Search function is active
4. Demagnetization cycle is active (see the Magnetic Core Demagnetization section)
7.4 Device Functional Modes
The DRV421 has a single functional mode and is operational when the power-supply voltage is greater than 3 V.
The maximum power supply voltage for the DRV421 is 5.5 V.
26
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Magnetic Core Design
The high sensitivity, low offset, and low noise of the DRV421 fluxgate sensor enable a high-performance closed-
loop current sensor module. For good module performance, an appropriate magnetic core design is required.
表 3 lists the DRV421 and magnetic core specifications with relation to the overall current module specifications.
表 3. Current-Sensor Module Performance versus
DRV421 Specifications and Magnetic Core Performance
CURRENT SENSOR MODULE
PARAMETER
PERFORMANCE DETERMINED BY:
DRV421 fluxgate sensor front-end: offset and offset drift
Offset and offset drift
Offset on start-up and after
overload condition
Magnetic core: magnetization (see the Magnetic Core Demagnetization section)
Noise
DRV421 fluxgate sensor front-end: noise
Linearity error
Gain error
DRV421 fluxgate sensor front-end: AC open-loop gain
Magnetic core: Permeability, geometry, and actual number of compensation coil windings
1) DRV421 fluxgate sensor front-end: H-bridge peak current
2) Compensation coil: number of windings and resistance
3) Value of the external shunt resistor
Measurement range
Neighbor-current rejection
(crosstalk)
Magnetic core: permeability, sensor gap design, and magnetic shielding
1) DRV421 fluxgate sensor front-end: AC open-loop gain setting
2) Magnetic core: high-frequency behavior of the core and inductance of the compensation coil
3) Value of the external shunt resistor
Bandwidth and gain flatness
Common-mode current rejection
(for fault current sensors)
Magnetic core: permeability, actual position of the primary current conductors, and magnetic shielding
For further details, see application report SLOA223, Designing with the DRV421: Closed Loop Current Sensor
Specifications.
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Application Information (接下页)
8.1.2 Protection Recommendations
Inputs AINP and AINN require external protection to limit the voltage swing to within 6 V beyond both supply
rails. Driver outputs ICOMP1 and ICOMP2 handle high-current pulses protected by internal clamp circuits to the
supply voltage. If large magnitude overcurrents are expected, connect external Schottky diodes to the supply
rails to protect the DRV421 from damage.
CAUTION
Large overcurrents may drive the power supply above the normal operating voltage.
Route large overcurrent pulses away from the device using diodes connected to the
supply, as shown in the typical application on the front page. To prevent these pulses
from driving up the supply voltage, and prevent damage to the DRV421 and other
components in the circuit, use an additional supply clamp, as shown in 图 64. All other
pins offer standard protection; see the Absolute Maximum Ratings.
VDD
图 64. Additonal Supply Clamp for the DRV421
28
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8.2 Typical Application
8.2.1 Closed-Loop Current Sensing Module
Closed-loop current sensor modules (图 65) measure currents over a wide frequency range, including dc
currents. These sensor modules offer a contact-free sensing method and excellent galvanic isolation
performance, combined with high resolution, accuracy, and reliability. The DRV421 is designed for use in this
kind of application.
At dc and in low-frequency range, the magnetic field induced by the primary current is sensed by the DRV421
fluxgate sensor. The sensed signal is filtered by the DRV421 and the internal H-bridge driver generates a
proportional compensation current. The compensation current flows through the compensation coil, and
generates a magnetic field. This magnetic field drives the original magnetic flux in the core back to zero. The
value of this magnetic field is increased by the number of compensation coil windings. Therefore, use 公式 1 to
calculate the required compensation current for a given primary current.
At higher frequencies, the magnetic field induced by the primary current directly couples into the compensation
coil and generates a current. The low impedance of the H-bridge driver does not influence the value of this
current. Also in this case, the value of the compensation current is the value of the primary current divided by the
number of compensation coil windings.
Closed-Loop Current Module
optional
VDD
magnetic
core
RSHUNT
MCU
VOUT
REFIN
REFOUT
DEMAG
OR
GSEL0
ADC
GSEL1
RSEL0
RSEL1
DRV421
GPIO0
GPIO1
GPIO2
ER
compensation
coil
R1
R2
VDD
primary
current
C1
C2
conductor
图 65. Closed-Loop Current Sensing Module
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Typical Application (接下页)
8.2.1.1 Design Requirements
A closed-loop current sensing module contains the DRV421, the magnetic core with a compensation coil, and a
shunt resistor. To increase the robustness of the module to high primary current peaks, use additional protection
diodes. See application report SLOA223, Designing with the DRV421: Closed Loop Current Sensor
Specifications, for additional information on the magnetic core and compensation coil design. The DRV421
output voltage is calculated as described in 公式 6:
≈
∆
«
’
÷
◊
NPRIM
VOUT = IPRIM
ì
ì R
ì G
SHUNT
NWINDING
where:
•
•
•
•
•
IPRIM = primary current value
NPRIM = the number of windings of the primary current conductor
NWINDING = the number of windings of the compensation coil
RSHUNT = shunt resistor value
G = shunt sense amplifier gain; default value is 4
(6)
8.2.1.2 Detailed Design Procedure
The compensation current creates a voltage drop across the shunt resistor. The maximum shunt resistor value is
limited by supply voltage VDD, the compensation current range, and the resistance of the compensation coil, as
described in 公式 7:
V
ICOMP(MIN)
RSHUNT + RCOIL
Ç
I
ICOMP
(7)
The voltage drop across the shunt resistor is sensed by the DRV421 shunt sense amplifier with a gain of four.
For proper operation, keep the resulting output voltage at VOUT pin within the voltage output swing range
specified in the Electrical Characteristics.
8.2.1.3 Application Curves
1.06
1.04
1.02
1
0.03
0.02
0.01
0
0.98
0.96
0.94
-0.01
-0.02
-0.03
1
10
100
1000
10000
100000
0.0001
0.001
0.01
0.1
1
10
100
Frequency (Hz)
Primary Current (A)
D053
D054
图 66. Gain Flatness of a DRV421-Based Closed-Loop
图 67. Current Error of a DRV421-Based Closed-Loop
Current Sensing Module
Current Sensing Module
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Typical Application (接下页)
8.2.2 Differential Closed-Loop Current Sensing Module
The differential closed-loop current sensing module (图 68) measures the difference between two or more
currents. Typical end-applications for such modules are leakage or residual current sensors. The high sensitivity
of the fluxgate sensor and the low temperature drift make the DRV421 a suitable choice for this type of modules.
The principle operation is the same as that of the closed-loop current module described in the Closed-Loop
Current Sensing Module section. The compensation current corresponds to the current difference between the
primary conductors.
Differential Closed-Loop Current Module
optional
VDD
magnetic
core
RSHUNT
MCU
VOUT
REFIN
REFOUT
DEMAG
OR
GSEL0
GSEL1
RSEL0
RSEL1
ADC
DRV421
GPIO0
GPIO1
GPIO2
ER
compensation
coil
R1
R2
VDD
return
current
primary
current
C1
C2
conductor
conductor
图 68. Differential Closed-Loop Current Sensing Module
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Typical Application (接下页)
8.2.2.1 Design Requirements
As with the previous application, the compensation current creates a voltage drop across the shunt resistor. The
maximum shunt resistor value is limited by supply voltage VDD, the compensation current range, and the
resistance of the compensation coil; see 公式 7.
However, in applications that sense leakage or residual currents, the difference between the primary currents is
zero in normal operation. In fault condition only, there is a small difference current that is sensed in order to shut
down the system to prevent damage to the device or the user. In this case, the compensation current is also very
low, usually only in the range of few mA. Therefore, use a higher shunt resistor value in this case to support high
sensitivity on system level. Consider the impact of shunt resistor value on gain and gain flatness as decribed in
application report SLOA223, Designing with the DRV421: Closed Loop Current Sensor Specifications.
8.2.2.2 Detailed Design Procedure
For differential current sensing modules with a large shunt resistor and medium compensation coil inductance,
use the gain setting that features the higher cross-over frequency of 3.8 kHz: GSEL[1:0] = 01.
8.2.2.3 Application Curve
0.03
0.02
0.01
0
-0.01
-0.02
-0.03
0.0001
0.001
0.01
0.1
1
Primary Current (A)
D055
图 69. Current Error of a DRV421-Based
Differential Closed-Loop Current Sensing Module
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Typical Application (接下页)
8.2.3 Using the DRV421 in ±15-V Sensor Applications
The DRV421 is designed for 3.3-V or 5-V nominal operation. To support a wider module current range, the
device is also used in ±15-V application, as shown in 图 70. In this application, an external regulator generates
the 5-V supply for the DRV421. An additional external ±15-V power driver stage drives the compensation coil.
These techniques allow the design of exceptionally precise and stable ±15-V current-sense modules.
+15 V
5 V
LDO
VDD
ICOMP1
External
Driver
Fluxgate
Sensor
H-Bridge
Driver
ICOMP2
Compensation
Coil
DRV421
GND
RSHUNT
-15 V
图 70. ±15-V Current-Sense Modules
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9 Power-Supply Recommendations
9.1 Power-Supply Decoupling
Decouple both VDD pins of the DRV421 with 1-uF X7R-type ceramic capacitors to the adjacent GND pin as
illustrated in 图 71. For best performance, place both decoupling capacitors as close to the related power-supply
pins as possible. Connect these capacitors to the power-supply source in a way that allows the current to flow
through the pads of the decoupling capacitors.
9.2 Power-On Start Up and Brownout
Power-on is detected when the supply voltage exceeds 2.4 V at VDD pin. At this point, DRV421 initiates
following start-up sequence:
1. Digital logic starts up and waits for 26 μs for the supply to settle.
2. Fluxgate sensor powers up.
3. If fluxgate sensor saturation is detected, search function starts as described in the Search Function section.
4. If DEMAG pin is set high, demagnetization cycle starts as described in the Magnetic Core Demagnetization
section.
5. The compensation loop is active after the demagnetization cycle, or 80 μs after the supply voltage exceeds
2.4 V.
During this startup sequence, the ICOMP1 and ICOMP2 outputs are pulled low to prevent undesired signals on
the compensation coil, and the ER pin is asserted low.
The DRV421 tests for low supply voltages with a brownout voltage level of 2.4 V. Use a power-supply source
capable of supporting large current pulses driven by the DRV421, and low ESR bypass capacitors for stable
supply voltage in the system. A supply drop below 2.4-V that lasts longer than 20 μs generates a power-on reset;
the device ignores shorter voltage drops. A voltage drop on the VDD pin to below 1.8 V immediately initiates a
power-on reset. After the power supply returns to 2.4 V, the device initiates a start-up cycle, as described at the
beginning of this section.
9.3 Power Dissipation
The thermally-enhanced, PowerPAD, WQFN package reduces the thermal impedance from junction to case.
This package has a downset lead frame on which the die is mounted. The lead frame has an exposed thermal
pad (PowerPAD) on the underside of the package, and provides a good thermal path for the heat dissipation.
The power dissipation on both linear outputs ICOMP1 and ICOMP2 is calculated with 公式 8:
PD(ICOMP) = IICOMP × (VICOMP – VSUPPLY
)
where
•
VSUPPLY = voltage potential closer to VICOMP, VDD, or GND
(8)
CAUTION
Output short-circuit conditions are particularly critical for the H-bridge driver output pins
ICOMP1 and ICOMP2. The full supply voltage occurs across the conducting transistor
and the current is only limited by the current density limitation of the FET; permanent
damage can occur. The DRV421 does not feature temperature protection or thermal
shut-down.
9.3.1 Thermal Pad
Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but
board layout greatly influences the overall heat dissipation. Technical details are described in application report
SLMA002, PowerPad Thermally Enhanced Package, available for download at www.ti.com.
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10 Layout
10.1 Layout Guidelines
The DRV421 unique, integrated fluxgate has a very high sensitivity to magnetic fields in order to enable design of
a closed-loop current sensor with best-in-class precision and linearity. Observe proper PCB layout techniques
because any current-conducting wire in the direct vicinity of the DRV421 generates a magnetic field that may
distort measurements. Common passive components and some PCB plating materials contain ferromagnetic
materials that are magnetizable. For best performance, use the following layout guidelines:
•
Route current conducting wires in pairs: route a wire with an incoming supply current next to, or on top of its
return current path. The opposite magnetic field polarity of these connection cancel each other. To facilitate
this layout approach, the DRV421 positive and negative supply pins are located next to each other.
•
•
Route the compensation coil connections close to each other as a pair to reduce coupling effects.
Route currents parallel to the fluxgate sensor sensitivity axis as shown in 图 71. As a result, magnetic fields
are perpendicular to the fluxgate sensitivity, and have limited impact.
•
•
Vertical current flow (for example, through vias) generates a field in the fluxgate-sensitive direction. Minimize
the number of vias in vincinity of the DRV421.
Place all passive components (for example, decoupling capacitors and the shunt resistor) outside of the
portion of the PCB that is inserted into the magnetic core gap. Use nonmagnetic components to prevent
magnetizing effects.
•
•
Do not use PCB trace finishes using nickel-gold plating because of the potential for magnetization.
Connect all GND pins to a local ground plane.
Ferrite beads in series to the power-supply connection reduce interaction with other circuits powered from the
same supply voltage source. However, to prevent influence of the magnetic fields if ferrite beads are used, do
not place them next to the DRV421.
The reference output (REFOUT pin) refers to GND. Use a low-impedance and star-type connection to reduce the
driver current and the fluxgate sensor current modulating the voltage drop on the ground track. The REFOUT
and VOUT outputs are able to drive some capacitive load, but avoid large direct capacitive loading because of
increased internal pulse currents. Given the wide bandwidth of the shunt sense amplifier, isolate large capacitive
loads with a small series resistor.
Solder the exposed PowerPAD, on the bottom of the package to the ground layer because the PowerPAD is
internally connected to the substrate that must be connected to the most-negative potential.
图 71 illustrates a generic layout example that highlights the placement of components that are critical to the
DRV421 performance. For specific layout examples, see SLOU409, DRV421EVM Users Guide, and TIDUA92,
TIPD196 Design Guide.
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10.2 Layout Example
Keep this area free of components
creating magnetic fields.
Fluxgate sensor sensitivity axis
GSEL0
OR
RSEL1
RSEL0
REFOUT
REFIN
AINN
AINP
ICOMP1
ICOMP2
To
Compensation
Coil
LEGEND
Top Layer:
Copper Pour and Traces
Via to Ground Plane
To ADC
Via to Supply Plane
图 71. Generic Layout Example (Top View)
36
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11 器件和文档支持
11.1 文档支持
11.1.1 相关文档ꢀ
•
•
•
•
《DRV421EVM 用户指南》，SLOU409
《TIPD196 设计指南》，TIDUA92
《基于 DRV421 的设计：闭环电流传感器规范》，SLOA223
《基于 DRV421 的设计：控制环路稳定性》，SLOA224
11.2 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2015–2016, Texas Instruments Incorporated
37
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV421RTJR
DRV421RTJT
ACTIVE
QFN
QFN
RTJ
20
20
3000 RoHS & Green
250 RoHS & Green
Call TI
Level-3-260C-168 HR
Level-3-260C-168 HR
-40 to 125
-40 to 125
----->
DRV421
ACTIVE
RTJ
Call TI
----->
DRV421
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
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Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
GENERIC PACKAGE VIEW
RTJ 20
4 x 4, 0.5 mm pitch
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224842/A
www.ti.com
MECHANICAL DATA
RTJ (S-PWQFN-ꢀ20)
ꢁLASꢂIC ꢃUAD ꢄLAꢂPACK NO-ꢅEAꢆ
3,85
ꢃ
5
ꢀ1
ꢀ
ꢀ
10
I
16
I
I
4ꢀ5
-ꢄ-ꢄ
3:85
�
Pin 1 Index Area
Top ꢀnd Bꢁtꢂom
ꢁ
5
0,20 Nominꢀl
Leꢀd Fraꢆꢇ
ꢀ
0ꢅ80
ꢂ
�
ꢁ
0ꢅ70
-_ꢀꢁ
_L d
ꢈ
jꢁꢂ ꢃꢄIꢅ Seꢀting Plꢀne
ꢍ0ꢅ0
ꢉ ꢋꢌ ꢎ ꢎꢏꢐꢎcꢑꢒ-f
- f
�ꢀ
ꢊ
ꢊ
o,o5
Seating Heighꢂ
ꢀ
0,00
I
6
1"+ꢀꢁ7
SIZE JD SHAPE
-ꢀꢁ-ꢀꢁ+ꢀꢁ-ꢀꢁ-
SꢀOWN ON
S
ARATE SHEET
r
ꢀ
10
L ꢀ
0,50
-ꢂ
15
1
ꢀ1
0,3ꢀ
0,18
ꢓ
20X
ꢔ
Cꢕꢖ
0,10 @
0,0 ꢗ@ C
Bottom View
4205505/ꢆ 07/1ꢃ
NOTES:
A. All linear dimensꢀons are ꢀn miꢁꢁꢀmeters. Dꢀmeꢂsioꢂꢀꢂg and toꢁeranciꢂg per ASME Y14.5-ꢃ994.
Bꢄ ꢅhꢀs drawing ꢀs subject to change without noticeꢄ
C. QFN (Quad ꢆꢁatpack No-Lead) package coꢂfꢀguratioꢂ.
D. ꢅhe package thermaꢁ pad must be soldered to the board for thermal and mechaꢂꢀcaꢁ perꢇormance.
E. See the additional fꢀgure in the Product Data Sheet ꢇor details regardꢀꢂg the exposed thermaꢁ pad features and dimensꢀons.
�
Check thermal pad mechanical drawiꢂg ꢀn the product datasheet ꢇor nomꢀnaꢁ ꢁead ꢁeꢂgth dimeꢂsionsꢄ
ꢀTꢁS
INSꢀUMEꢁTꢂ
ꢃ.ti.com
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