DRV8829PWPR [TI]

H-BRIDGE MOTOR DRIVER IC; H-桥式电动机驱动器IC


型号：	DRV8829PWPR
厂家：	TEXAS INSTRUMENTS
描述：	H-BRIDGE MOTOR DRIVER IC H-桥式电动机驱动器IC 驱动器
文件：	总17页 (文件大小：712K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DRV8829

www.ti.com

SLVSA74B –MAY 2010–REVISED MAY 2011

H-BRIDGE MOTOR DRIVER IC

Check for Samples: DRV8829

FEATURES

APPLICATIONS

•

Single H-Bridge Current-Control Motor Driver

•

Automatic Teller Machines

Money Handling Machines

–

Capable of Driving One Winding of a

Bipolar Stepper or One DC Motor

Video Security Cameras

Printers

Five-Bit Winding Current Control Allows Up

to 32 Current Levels

Scanners

Low MOSFET On-Resistance

Office Automation Machines

Gaming Machines

Factory Automation

Robotics

•

5-A Maximum Drive Current at 24 V, 25°C

Built-In 3.3-V Reference Output

Industry-Standard Parallel Digital Control

Interface

•

8.2-V to 45-V Operating Supply Voltage Range

Thermally Enhanced Surface Mount Package

DESCRIPTION

The DRV8829 provides an integrated motor driver solution for DC and stepper motors used in cash handling

machines and other automated equipment applications. The device has one H-bridge driver, and can drive one

winding of a bipolar stepper motor or one DC motor. The output driver block consists of N-channel power

MOSFET’s configured as a single full H-bridge to drive the motor winding. The DRV8829 can supply up to 5-A

peak or 3.5-A RMS output current (with proper heatsinking at 24 V and 25°C).

A simple parallel digital control interface is compatible with industry-standard devices. Decay mode is

programmable.

Internal shutdown functions are provided for overcurrent protection, short circuit protection, undervoltage lockout

and overtemperature.

The DRV8829 is available in a 28-pin HTSSOP package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).

ORDERING INFORMATION⁽¹⁾

ORDERABLE PART

NUMBER

TOP-SIDE

MARKING

T_A

PACKAGE⁽²⁾

–40°C to 85°C

PowerPAD™ (HTSSOP) - PWP

Reel of 2000

DRV8829PWPR

8829

(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

DRV8829

SLVSA74B –MAY 2010–REVISED MAY 2011

www.ti.com

DEVICE INFORMATION

Functional Block Diagram

Int. VCC

Internal

Reference &

Regs

CP1

CP2

LS Gate

Drive

0.01 mF

Charge

Pump

V3P3OUT

3.3 V

VCP

Thermal

Shut down

0.1 mF

HS Gate

Drive

VREF

PHASE

ENBL

OUT1

Step

Motor

DCM

Motor

Driver

Control

Logic

OUT2

DECAY

nRESET

nSLEEP

nFAULT

ISEN

GND

DRV8829

www.ti.com

NAME

SLVSA74B –MAY 2010–REVISED MAY 2011

Table 1. TERMINAL FUNCTIONS

EXTERNAL COMPONENTS

OR CONNECTIONS

I/O⁽¹⁾

DESCRIPTION

POWER AND GROUND

GND

14, 28

Device ground

Connect to motor supply (8.2 - 45 V). Both pins

must be connected to same supply.

4, 11

Bridge power supply

Bypass to GND with a 0.47-μF 6.3-V ceramic

capacitor. Can be used to supply VREF.

V3P3OUT

3.3-V regulator output

CP1

Charge pump flying capacitor

High-side gate drive voltage

Connect a 0.01-μF 50-V capacitor between CP1

and CP2.

CP2

VCP

Connect a 0.1-μF 16-V ceramic capacitor to VM.

CONTROL

ENBL

Bridge enable

Logic high to enable H-bridge. Internal pulldown.

Logic high sets OUT1 high, OUT2 low. Internal

pulldown.

PHASE

Bridge phase (direction)

Sets winding current as a percentage of full-scale.

Internal pulldown.

Current set inputs

Low = slow decay, open = mixed decay,

high = fast decay

DECAY

Decay mode

Internal pulldown and pullup.

Active-low reset input initializes internal logic and

disables the H-bridge outputs. Internal pulldown.

nRESET

nSLEEP

Reset input

Logic high to enable device, logic low to enter

low-power sleep mode. Internal pulldown.

Sleep mode input

Current set reference input

Reference voltage for winding current set. Both

pins must be connected together on the PCB.

VREF

12, 13

STATUS

nFAULT

OUTPUT

ISEN

Logic low when in fault condition (overtemp,

overcurrent)

Fault

Connect to current sense resistor. Both pins must

be connected together on the PCB.

6, 9

Bridge ground / Isense

OUT1

OUT2

5, 10

7, 8

Bridge output 1

Bridge output 2

Connect to motor winding. Both pins must be

connected together on the PCB.

(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output

PWP (HTSSOP) PACKAGE

DRV8829

SLVSA74B –MAY 2010–REVISED MAY 2011

www.ti.com

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

(1) (2)

VALUE

–0.3 to 47

–0.5 to 7

–0.3 to 4

–0.3 to 0.8

Internally limited

UNIT

Power supply voltage range

Digital pin voltage range

VREF

Input voltage

ISENSE pin voltage

Peak motor drive output current, t < 1 μS

Continuous motor drive output current⁽³⁾

Continuous total power dissipation

Operating virtual junction temperature range

Operating ambient temperature range

Storage temperature range

See Dissipation Ratings table

T_J

–40 to 150

–40 to 85

–60 to 150

°C

T_A

°C

T_stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) Power dissipation and thermal limits must be observed.

THERMAL INFORMATION

DRV8829

THERMAL METRIC⁽¹⁾

PWP

28 PINS

31.6

15.9

5.6

UNITS

θ_JA

Junction-to-ambient thermal resistance⁽²⁾

Junction-to-case (top) thermal resistance⁽³⁾

Junction-to-board thermal resistance⁽⁴⁾

Junction-to-top characterization parameter⁽⁵⁾

Junction-to-board characterization parameter⁽⁶⁾

Junction-to-case (bottom) thermal resistance⁽⁷⁾

θ_JCtop

θ_JB

°C/W

ψ_JT

0.2

ψ_JB

5.5

θ_JCbot

1.4

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific

JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).

(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).

(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

8.2

NOM

MAX

UNIT

V_M

Motor power supply voltage range⁽¹⁾

VREF input voltage⁽²⁾

V_REF

I_V3P3

f_PWM

3.5

V3P3OUT load current

kHz

Externally applied PWM frequency

100

(1) All V_Mpins must be connected to the same supply voltage.

(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.

DRV8829

www.ti.com

SLVSA74B –MAY 2010–REVISED MAY 2011

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range (unless otherwise noted)

PARAMETER

POWER SUPPLIES

TEST CONDITIONS

MIN

TYP

MAX

UNIT

I_VM

VM operating supply current

VM sleep mode supply current

V_M= 24 V, f_PWM< 50 kHz

μA

I_VMQ

V_UVLO

V3P3OUT REGULATOR

V_M= 24 V

VM undervoltage lockout voltage V_Mrising

7.8

8.2

V_3P3

V3P3OUT voltage

IOUT = 0 to 1 mA

3.2

3.3

0.6

3.4

LOGIC-LEVEL INPUTS

V_IL

Input low voltage

0.7

5.25

0.6

V_IH

V_HYS

I_IL

Input high voltage

Input hysteresis

2.2

0.3

0.45

Input low current

VIN = 0

–20

μA

kΩ

I_IH

Input high current

Internal pulldown resistance

VIN = 3.3 V

100

R_PD

100

nFAULT OUTPUT (OPEN-DRAIN OUTPUT)

V_OL

I_OH

Output low voltage

I_O= 5 mA

V_O= 3.3 V

0.5

Output high leakage current

μA

DECAY INPUT

V_IL

Input low threshold voltage

For slow decay mode

For fast decay mode

0.8

V_IH

I_IN

Input high threshold voltage

Input current

±40

μA

kΩ

R_PU

R_PD

Internal pullup resistance

Internal pulldown resistance

130

H-BRIDGE FETS

V_M= 24 V, I_O= 1 A, T_J= 25°C

V_M= 24 V, I_O= 1 A, T_J= 85°C

V_M= 24 V, I_O= 1 A, T_J= 25°C

V_M= 24 V, I_O= 1 A, T_J= 85°C

0.1

0.13

0.1

R_DS(ON)

HS FET on resistance

Ω

0.16

R_DS(ON)

I_OFF

LS FET on resistance

Ω

0.13

0.16

Off-state leakage current

–40

μA

MOTOR DRIVER

Internal current control PWM

frequency

f_PWM

kHz

t_BLANK

t_R

Current sense blanking time

Rise time

3.75

μs

200

t_F

Fall time

PROTECTION CIRCUITS

I_OCPOvercurrent protection trip level

t_TSDThermal shutdown temperature

CURRENT CONTROL

Die temperature

150

160

660

180

°C

I_REF

VREF input current

VREF = 3.3 V

–3

635

–15

685

μA

V_TRIP

ISENSE trip voltage

VREF = 3.3 V, 100% current setting

VREF = 3.3V , 5% - 34% current setting

VREF = 3.3 V, 38% - 67% current

setting

Current trip accuracy

(relative to programmed value)

–10

–5

ΔI_TRIP

VREF = 3.3 V, 71% - 100% current

setting

A_ISENSE

Current sense amplifier gain

Reference only

V/V

DRV8829

SLVSA74B –MAY 2010–REVISED MAY 2011

www.ti.com

FUNCTIONAL DESCRIPTION

PWM Motor Drivers

The DRV8829 contains one H-bridge motor driver with current-control PWM circuitry. A block diagram of the

motor control circuitry is shown in Figure 1. A bipolar stepper motor is shown, but the driver can also drive a DC

motor.

Figure 1. Motor Control Circuitry

Note that there are multiple VM, ISEN, OUT, and VREF pins. All like-named pins must be connected together on

the PCB.

Bridge Control

The PHASE input pin controls the direction of current flow through the H-bridge. The ENBL input pin enables the

H-bridge outputs when active high. Table 2 shows the logic.

Table 2. H-Bridge Logic

ENBL

PHASE

OUT1

OUT2

The control inputs have internal pulldown resistors of approximately 100 kΩ.

Current Regulation

The current through the motor winding is regulated by a fixed-frequency PWM current regulation, or current

chopping. When the H-bridge is enabled, current rises through the winding at a rate dependent on the DC

voltage and inductance of the winding. Once the current hits the current chopping threshold, the bridge disables

the current until the beginning of the next PWM cycle.

For stepping motors, current regulation is normally used at all times, and can changing the current can be used

to microstep the motor. For DC motors, current regulation is used to limit the start-up and stall current of the

motor.

If the current regulation feature is not needed, it can be disabled by connecting the ISENSE pins directly to

ground and the VREF pins to V3P3.

DRV8829

www.ti.com

SLVSA74B –MAY 2010–REVISED MAY 2011

The PWM chopping current in each bridge is set by a comparator which compares the voltage across a current

sense resistor connected to the ISEN pin, multiplied by a factor of 5, with a reference voltage. The reference

voltage is input from the xVREF pins, and is scaled by a 5-bit DAC that allows current settings of zero to 100% in

an approximately sinusoidal sequence.

The full-scale (100%) chopping current is calculated in Equation 1.

V_REFX

I_CHOP=

5 · R_ISENSE

(1)

Example:

If a 0.25-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current will be

2.5 V / (5 x 0.25 Ω) = 2 A.

Five input pins (I0 - I4) are used to scale the current in the bridge as a percentage of the full-scale current set by

the VREF input pin and sense resistance. The I0 - I4 pins have internal pulldown resistors of approximately 100

kΩ. The function of the pins is shown in Table 3.

Table 3. H-Bridge Pin Functions

RELATIVE CURRENT

I[4..0]

(% FULL-SCALE CHOPPING CURRENT)

0x00h

0x01h

0x02h

0x03h

0x04h

0x05h

0x06h

0x07h

0x08h

0x09h

0x0Ah

0x0Bh

0x0Ch

0x0Dh

0x0Eh

0x0Fh

0x10h

0x11h

0x12h

0x13h

0x14h

0x15h

0x16h

0x17h

0x18h

0x19h

0x1Ah

0x1Bh

0x1Ch

0x1Dh

0x1Eh

0x1Fh

10%

15%

20%

24%

29%

34%

38%

43%

47%

51%

56%

60%

63%

67%

71%

74%

77%

80%

83%

86%

88%

90%

92%

94%

96%

97%

98%

99%

100%

DRV8829

SLVSA74B –MAY 2010–REVISED MAY 2011

www.ti.com

Decay Mode

During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until the PWM

current chopping threshold is reached. This is shown in Figure 2 as case 1. The current flow direction shown

indicates the state when the PHASE pin is high.

Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or

slow decay.

In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to

allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is

disabled to prevent any reverse current flow. Fast decay mode is shown in Figure 2 as case 2.

In slow decay mode, winding current is re-circulated by enabling both of the low-side FETs in the bridge. This is

shown in Figure 2 as case 3.

Figure 2. Decay Mode

The DRV8829 supports fast decay, slow decay and a mixed decay mode. Slow, fast, or mixed decay mode is

selected by the state of the DECAY pin - logic low selects slow decay, open selects mixed decay operation, and

logic high sets fast decay mode. The DECAY pin has both an internal pullup resistor of approximately 130 kΩ

and an internal pulldown resistor of approximately 80 kΩ. This sets the mixed decay mode if the pin is left open

or undriven.

Mixed decay mode begins as fast decay, but at a fixed period of time (75% of the PWM cycle) switches to slow

decay mode for the remainder of the fixed PWM period.

Blanking Time

After the current is enabled in the H-bridge, the voltage on the ISEN pin is ignored for a fixed period of time

before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also

sets the minimum on time of the PWM.

DRV8829

www.ti.com

SLVSA74B –MAY 2010–REVISED MAY 2011

nRESET and nSLEEP Operation

The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs

are ignored while nRESET is active.

Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridge is disabled, the

gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In

this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time

(approximately 1 ms) needs to pass before the motor driver becomes fully operational. Note that nRESET and

nSLEEP have internal pulldown resistors of approximately 100 kΩ. These signals need to be driven to logic high

for device operation.

Protection Circuits

The DRV8829 is fully protected against undervoltage, overcurrent and overtemperature events.

Overcurrent Protection (OCP)

An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this

analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled and the

nFAULT pin will be driven low. The device will remain disabled until either nRESET pin is applied, or VM is

removed and re-applied.

Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor

winding will all result in an overcurrent shutdown. Note that overcurrent protection does not use the current sense

circuitry used for PWM current control, and is independent of the I_SENSEresistor value or VREF voltage.

Thermal Shutdown (TSD)

If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be

driven low. Once the die temperature has fallen to a safe level operation will automatically resume.

Undervoltage Lockout (UVLO)

If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the

device will be disabled and internal logic will be reset. Operation will resume when V_Mrises above the UVLO

threshold.

DRV8829

SLVSA74B –MAY 2010–REVISED MAY 2011

www.ti.com

THERMAL INFORMATION

Thermal Protection

The DRV8829 has thermal shutdown (TSD) as described above. If the die temperature exceeds approximately

150°C, the device will be disabled until the temperature drops to a safe level.

Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient

heatsinking, or too high an ambient temperature.

Power Dissipation

Power dissipation in the DRV8829 is dominated by the power dissipated in the output FET resistance, or R_DS(ON)

Average power dissipation when running a stepper motor can be roughly estimated by Equation 2.

· ·

P_TOT= 4 R_DS(ON)(I_OUT(RMS)

)

(2)

where P_TOTis the total power dissipation, R_DS(ON)is the resistance of each FET, and I_OUT(RMS)is the RMS output

current being applied to each winding. I_OUT(RMS)is equal to the approximately 0.7x the full-scale output current

setting. The factor of 4 comes from the fact that there are two motor windings, and at any instant two FETs are

conducting winding current for each winding (one high-side and one low-side).

The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and

heatsinking.

Note that R_DS(ON)increases with temperature, so as the device heats, the power dissipation increases. This must

be taken into consideration when sizing the heatsink.

Heatsinking

The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad

must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,

this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs

without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area

is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and

bottom layers.

For details about how to design the PCB, refer to TI application report SLMA002, " PowerPAD™ Thermally

Enhanced Package" and TI application brief SLMA004, " PowerPAD™ Made Easy", available at www.ti.com.

In general, the more copper area that can be provided, the more power can be dissipated.

PACKAGE OPTION ADDENDUM

www.ti.com

13-Jun-2011

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

DRV8829PWP

ACTIVE

HTSSOP

PWP

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR

DRV8829PWPR

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

DRV8829PWPR

HTSSOP PWP

2000

330.0

16.4

6.9

10.2

1.8

12.0

16.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

HTSSOP PWP 28

SPQ

Length (mm) Width (mm) Height (mm)

367.0 367.0 38.0

DRV8829PWPR

2000

Pack Materials-Page 2

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Products

Audio

Applications

www.ti.com/audio

amplifier.ti.com

dataconverter.ti.com

www.dlp.com

Automotive and Transportation www.ti.com/automotive

Communications and Telecom www.ti.com/communications

Amplifiers

Data Converters

DLP® Products

DSP

Computers and Peripherals

Consumer Electronics

Energy and Lighting

Industrial

www.ti.com/computers

www.ti.com/consumer-apps

www.ti.com/energy

dsp.ti.com

Clocks and Timers

Interface

www.ti.com/clocks

interface.ti.com

logic.ti.com

www.ti.com/industrial

www.ti.com/medical

www.ti.com/security

Medical

Logic

Security

Power Mgmt

Microcontrollers

RFID

power.ti.com

Space, Avionics and Defense www.ti.com/space-avionics-defense

microcontroller.ti.com

www.ti-rfid.com

Video and Imaging

www.ti.com/video

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community

e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

DRV8829PWPR [TI]

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