INA163UAE4 [TI]

低噪声、低失真仪表放大器 | D | 14 | -40 to 85;
INA163UAE4
型号: INA163UAE4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

低噪声、低失真仪表放大器 | D | 14 | -40 to 85

放大器 PC 仪表 光电二极管 仪表放大器
文件: 总16页 (文件大小:403K)
中文:  中文翻译
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INA163  
SBOS177D NOVEMBER 2000 REVISED MAY 2005  
Low-Noise, Low-Distortion  
INSTRUMENTATION AMPLIFIER  
FEATURES  
DESCRIPTION  
LOW NOISE: 1nV/Hz at 1kHz  
The INA163 is a very low-noise, low-distortion, mon-  
olithic instrumentation amplifier. Its current-feedback  
circuitry achieves very wide bandwidth and excellent  
dynamic response over a wide range of gain. It is ideal  
for low-level audio signals such as balanced low-  
impedance microphones. Many industrial, instrumen-  
tation, and medical applications also benefit from its  
low noise and wide bandwidth.  
LOW THD+N: 0.002% at 1kHz, G = 100  
WIDE BANDWIDTH: 800kHz at G = 100  
WIDE SUPPLY RANGE: ±4.5V to ±18V  
HIGH CMR: > 100dB  
GAIN SET WITH EXTERNAL RESISTOR  
SO-14 SURFACE-MOUNT PACKAGE  
Unique distortion cancellation circuitry reduces distor-  
tion to extremely low levels, even in high gain. The  
INA163 provides near-theoretical noise performance  
for 200source impedance. Its differential input, low  
noise, and low distortion provide superior performance  
in professional microphone amplifier applications.  
APPLICATIONS  
PROFESSIONAL MICROPHONE PREAMPS  
MOVING-COIL TRANSDUCER AMPLIFIERS  
DIFFERENTIAL RECEIVERS  
BRIDGE TRANSDUCER AMPLIFIERS  
The INA163’s wide supply voltage, excellent output  
voltage swing, and high output current drive allow its  
use in high-level audio stages as well.  
The INA163 is available in a space-saving SO-14  
surface-mount package, specified for operation over  
the –40°C to +85°C temperature range.  
VO1  
1
INA163  
4
VIN−  
6kΩ  
6kΩ  
Sense  
A1  
3
8
3kΩ  
RG  
A3  
VO  
6000  
9
3kΩ  
G = 1 +  
RG  
6kΩ  
6kΩ  
Ref  
10  
12  
5
A2  
VIN+  
14  
VO2  
11  
6
V+ V−  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 20002005, Texas Instruments Incorporated  
www.ti.com  
PIN CONFIGURATION  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
Top View  
This integrated circuit can be damaged by ESD. Texas  
Instruments recommends that all integrated circuits be  
handled with appropriate precautions. Failure to ob-  
serve proper handling and installation procedures can  
cause damage.  
ESD damage can range from subtle performance deg-  
radation to complete device failure. Precision integrated  
circuits may be more susceptible to damage because  
very small parametric changes could cause the device  
not to meet its published specifications.  
VO1  
NC  
1
2
3
4
5
6
7
14 VO2  
13 NC  
12 GS2  
11 V+  
GS1  
VIN−  
VIN+  
V−  
ABSOLUTE MAXIMUM RATINGS(1)  
10 Ref  
9
8
VO  
Power Supply Voltage ....................................................................... ±18V  
Signal Input Terminals, Voltage(2) .................. (V) 0.5V to (V+) + 0.5V  
Current(2) .................................................... 10mA  
NC  
Sense  
Output Short-Circuit to Ground ............................................... Continuous  
Operating Temperature ..................................................55°C to +125°C  
Storage Temperature .....................................................55°C to +125°C  
Junction Temperature .................................................................... +150°C  
Lead Temperature (soldering, 10s)............................................... +300°C  
NC = No Internal Connection  
NOTES: (1) Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods may degrade  
device reliability. These are stress ratings only, and functional operation of the  
device at these or any other conditions beyond those specified is not implied.  
(2) Input terminals are diode-clamped to the power-supply rails. Input signals  
that can swing more than 0.5V beyond the supply rails should be current  
limited to 10mA or less.  
PACKAGE/ORDERING INFORMATION(1)  
PRODUCT  
PACKAGE-LEAD  
SO-14 Surface Mount  
DESIGNATOR  
MARKING  
INA163UA  
D
INA163UA  
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this document, or see the TI web site  
at www.ti.com.  
INA163  
SBOS177D  
2
www.ti.com  
ELECTRICAL CHARACTERISTICS: VS = ±15V  
TA = +25°C and at rated supplies, VS = ±15V, RL = 2kconnected to ground, unless otherwise noted.  
INA163UA  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
GAIN  
Range  
1 to 10000  
G = 1 + 6k/RG  
±0.1  
V/V  
Gain Equation(1)  
Gain Error, G = 1  
G = 10  
±0.25  
±0.7  
%
%
±0.2  
G = 100  
±0.2  
%
G = 1000  
±0.5  
%
Gain Temp Drift Coefficient, G = 1  
G > 10  
Nonlinearity, G = 1  
G = 100  
±1  
±25  
±0.0003  
±0.0006  
±10  
±100  
ppm/°C  
ppm/°C  
% of FS  
% of FS  
INPUT STAGE NOISE  
Voltage Noise  
fO = 1kHz  
fO = 100Hz  
fO = 10Hz  
RSOURCE = 0Ω  
1
1.2  
2
nV/Hz  
nV/Hz  
nV/Hz  
Current Noise  
fO = 1kHz  
0.8  
60  
pA/Hz  
nV/Hz  
OUTPUT STAGE NOISE  
Voltage Noise, fO = 1kHz  
INPUT OFFSET VOLTAGE  
Input Offset Voltage  
vs Temperature  
VCM = VOUT = 0V  
A = TMIN to TMAX  
VS = ±4.5V to ±18V  
50 + 2000/G  
1 + 20/G  
1 + 50/G  
250 + 5000/G  
3 + 200/G  
µV  
µV/°C  
µV/V  
T
vs Power Supply  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
VIN+ VIN= 0V  
VIN+ VIN= 0V  
VCM = ±11V, RSRC = 0Ω  
(V+) 4  
(V) + 4  
70  
(V+) 3  
(V) + 3  
80  
V
V
dB  
dB  
Common-Mode Rejection, G = 1  
G = 100  
100  
116  
INPUT BIAS CURRENT  
Initial Bias Current  
vs Temperature  
Initial Offset Current  
vs Temperature  
2
12  
1
µA  
nA/°C  
µA  
10  
0.1  
0.5  
nA/°C  
INPUT IMPEDANCE  
Differential  
Common-Mode  
60  
60  
2
2
MpF  
MpF  
DYNAMIC RESPONSE  
Bandwidth, Small Signal, 3dB, G = 1  
3.4  
G = 100  
800  
15  
0.002  
2
3.5  
1
kHz  
V/µs  
%
µs  
µs  
Slew Rate  
THD+Noise, f = 1kHz  
Settling Time, 0.1%  
0.01%  
G = 100  
G = 100, 10V Step  
G = 100, 10V Step  
50% Overdrive  
Overload Recovery  
µs  
OUTPUT  
Voltage  
RL = 2kto Gnd  
(V+) 2  
(V) + 2  
(V+) 1.8  
(V) + 1.8  
1000  
V
V
pF  
mA  
Load Capacitance Stability  
Short-Circuit Current  
Continuous-to-Common  
±60  
POWER SUPPLY  
Rated Voltage  
Voltage Range  
±15  
±10  
V
V
mA  
±4.5  
±18  
±12  
Current, Quiescent  
IO = 0mA  
TEMPERATURE RANGE  
Specification  
Operating  
40  
40  
+85  
+125  
°C  
°C  
θJA  
100  
°C/W  
NOTE: (1) Gain accuracy is a function of external RG.  
INA163  
SBOS177D  
3
www.ti.com  
TYPICAL CHARACTERISTICS  
At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25k, CL = 50pF, unless otherwise noted.  
GAIN vs FREQUENCY  
70  
THD+N vs FREQUENCY  
G = 1000  
0.1  
0.01  
VO = 5Vrms  
RL = 10kΩ  
60  
G = 1000  
50  
40  
G = 100  
30  
G = 100  
20  
G = 10  
10  
0.001  
0.0001  
G = 10  
G = 1  
0
G = 1  
10  
20  
10k  
100k  
Frequency (Hz)  
1M  
10M  
20  
100  
1k  
10k 20k  
Frequency (Hz)  
NOISE VOLTAGE (RTI) vs FREQUENCY  
CURRENT NOISE SPECTRAL DENSITY  
10  
1k  
100  
10  
G = 1  
1
G = 10  
G = 500  
G = 1000  
G = 100  
0.1  
1
1
10  
100  
1k  
10k  
10  
100  
1k  
10k  
Frequency (Hz)  
Frequency (Hz)  
COMMON- MODE REJECTION vs FREQUENCY  
G = 1000  
POWER-SUPPLY REJECTION vs FREQUENCY  
G = 100, 1000  
140  
120  
100  
80  
140  
120  
100  
80  
G = 10  
G = 1  
G = 100  
G = 10  
G = 1  
60  
60  
40  
40  
20  
20  
0
0
10  
100  
1k  
10k  
100k  
1M  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Frequency (Hz)  
INA163  
SBOS177D  
4
www.ti.com  
TYPICAL CHARACTERISTICS (Cont.)  
At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25k, CL = 50pF, unless otherwise noted.  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
V+  
SETTLING TIME vs GAIN  
10  
8
20V Step  
(V+) 2  
(V+) 4  
0.01%  
6
(V+) 6  
(V) + 6  
4
(V) + 4  
(V) + 2  
V−  
2
0.1%  
0
0
10  
20  
30  
40  
50  
60  
1
10  
100  
1000  
Output Current (mA)  
Gain  
SMALL-SIGNAL TRANSIENT RESPONSE  
(G = 1)  
SMALL-SIGNAL TRANSIENT RESPONSE  
(G = 100)  
2.5µs/div  
10µs/div  
LARGE-SIGNAL TRANSIENT RESPONSE  
(G = 1)  
LARGE-SIGNAL TRANSIENT RESPONSE  
(G = 100)  
2.5µs/div  
2.5µs/div  
INA163  
SBOS177D  
5
www.ti.com  
temperature drift. These effects can be inferred from  
the gain equation. Make a short, direct connection to  
the gain set resistor, RG. Avoid running output signals  
near these sensitive input nodes.  
APPLICATIONS INFORMATION  
Figure 1 shows the basic connections required for  
operation. Power supplies should be bypassed with  
0.1µF tantalum capacitors near the device pins. The  
output Sense (pin 8) and output Reference (pin 10)  
should be low-impedance connections. Resistance of  
a few ohms in series with these connections will  
degrade the common-mode rejection of the INA163.  
NOISE PERFORMANCE  
The INA163 provides very low-noise with low-source  
impedance. Its 1nV/Hz voltage noise delivers near-  
theoretical noise performance with a source imped-  
ance of 200. The input stage design used to achieve  
this low noise, results in relatively high input bias  
current and input bias current noise. As a result, the  
INA163 may not provide the best noise performance  
with a source impedance greater than 10k. For source  
impedance greater than 10k, other instrumentation  
amplifiers may provide improved noise performance.  
GAIN-SET RESISTOR  
Gain is set with an external resistor, RG, as shown in  
Figure 1. The two internal 3kfeedback resistors are  
laser-trimmed to 3kwithin approximately ±0.2%. Gain  
is:  
6000  
G = 1+  
RG  
The temperature coefficient of the internal 3kresis-  
tors is approximately ±25ppm/°C. Accuracy and TCR  
of the external RG will also contribute to gain error and  
V+  
0.1µF  
1
11  
INA163  
6kΩ  
4
3
VIN−  
6kΩ  
A1  
Sense  
8
3kΩ  
3kΩ  
GAIN  
(V/V)  
RG  
( )  
NC(1)  
6000  
1500  
667  
316  
122  
61  
30  
12  
6
3
A3  
(dB)  
0
6
VO  
G = 1 +  
RG  
9
1
2
5
10  
20  
6000  
RG  
14  
20  
26  
34  
40  
46  
54  
60  
66  
6kΩ  
6kΩ  
Ref  
10  
12  
5
A2  
VIN+  
50  
100  
200  
500  
1000  
2000  
14  
6
0.1µF  
V−  
NOTE: (1) NC = No Connection.  
V+  
Sometimes Shown in  
Simplified Form:  
RG  
INA163  
VO  
V−  
FIGURE 1. Basic Circuit Connections.  
INA163  
SBOS177D  
6
www.ti.com  
INPUT CONSIDERATIONS  
OFFSET VOLTAGE TRIM  
Very low source impedance (less than 10) can cause  
the INA163 to oscillate. This depends on circuit layout,  
signal source, and input cable characteristics. An input  
network consisting of a small inductor and resistor, as  
shown in Figure 2, can greatly reduce any tendency to  
oscillate. This is especially useful if a variety of input  
sources are to be connected to the INA163. Although  
not shown in other figures, this network can be used as  
needed with all applications shown.  
A variable voltage applied to pin 10, as shown in  
Figure 3, can be used to adjust the output offset voltage.  
A voltage applied to pin 10 is summed with the output  
signal. An op amp connected as a buffer is used to  
provide a low impedance at pin 10 to assure good  
common-mode rejection.  
OUTPUT SENSE  
An output sense terminal allows greater gain accuracy  
in driving the load. By connecting the sense connection  
at the load, I R voltage loss to the load is included  
inside the feedback loop. Current drive can be in-  
creased by connecting a buffer amp inside the feed-  
back loop, as shown in Figure 4.  
V+  
47Ω  
11  
6
4
3
VIN−  
8
1.2µH  
1.2µH  
INA163  
VO  
9
12  
5
10  
+15V  
VIN+  
47Ω  
V−  
Sense  
4
5
11  
INA163  
6
±250mA  
Output Drive  
8
FIGURE 2. Input Stabilization Network.  
VO  
BUF634  
9
10  
BW  
V+  
BUF634 connected  
for wide bandwidth.  
4
3
11  
15V  
8
RG  
INA163  
VO  
9
V+  
12  
5
10  
6
FIGURE 4. Buffer for Increase Output Current.  
100µA  
V−  
150Ω  
150Ω  
100µA  
OPA237  
10kΩ  
V−  
FIGURE 3. Offset Voltage Adjustment Circuit.  
INA163  
SBOS177D  
7
www.ti.com  
Phantom Power  
+48V  
+
47 F  
R3  
47k  
+15V  
0.1 F  
R1  
6.8k  
R2  
6.8k  
1N4148  
(1)  
C1  
1
(2)  
R6  
5
47 F 60V  
+
Female XLR  
Connector  
3
8
A1  
INA163  
9
2
VO  
(1)  
C2  
47 F 60V  
+
10  
(3)  
1M  
R7  
1k  
0.1 F  
R4  
2.2k  
R5  
2.2k  
0.1 F  
1N4148  
A2  
OPA134  
NOTES: (1) Use non-polar capacitors if phantom  
power is to be turned off. (2) R6 sets maximum gain.  
(3) R7 sets minimum gain.  
15V  
Optional DC  
15V  
Output Control Loop  
FIGURE 5. Phantom-Powered Microphone Preamplifier.  
offset voltage. This is generally the dominant source of  
output offset voltage in this application. With a maxi-  
mum gain of 1000 (60dB), the output offset voltage can  
be several volts. This may be entirely acceptable if the  
output is AC-coupled into the subsequent stage. An  
alternate technique is shown in Figure 5. An inexpen-  
sive FET-input op amp in a feedback loop drives the  
DC output voltage to 0V. A2 is not in the audio signal  
path and does not affect signal quality.  
MICROPHONE AMPLIFIER  
Figure 5 shows a typical circuit for a professional  
microphone input amplifier. R1 and R2 provide a cur-  
rent path for conventional 48V phantom power source  
for a remotely located microphone. An optional switch  
allows phantom power to be disabled. C1 and C2 block  
the phantom power voltage from the INA163 input  
circuitry. Non-polarized capacitors should be used for  
C1 and C2 if phantom power is to be disabled. For  
additional input protection against ESD and hot-plug-  
ging, four INA4148 diodes may be connected from the  
input to supply lines.  
Gain is set with a variable resistor, R7, in series with  
R6. R6 determines the maximum gain. The total resis-  
tance, R6 + R7, determines the lowest gain. A special  
reverse-log taper potentiometer for R7 can be used to  
create a linear change (in dB) with rotation.  
R4 and R5 provide a path for input bias current of the  
INA163. Input offset current (typically 100nA) creates a  
DC differential input voltage that will produce an output  
INA163  
SBOS177D  
8
www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jun-2023  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
INA163UA  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
D
14  
14  
50  
RoHS & Green  
NIPDAU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-40 to 85  
-40 to 85  
INA163UA  
Samples  
Samples  
INA163UA/2K5  
2500 RoHS & Green  
2500 RoHS & Green  
NIPDAU  
INA163UA  
INA163UA/2K5E4  
INA163UAE4  
LIFEBUY  
LIFEBUY  
SOIC  
SOIC  
D
D
14  
14  
NIPDAU  
NIPDAU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-40 to 85  
-40 to 85  
INA163UA  
INA163UA  
50  
RoHS & Green  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jun-2023  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA163UA/2K5  
SOIC  
D
14  
2500  
330.0  
16.4  
6.5  
9.0  
2.1  
8.0  
16.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC 14  
SPQ  
Length (mm) Width (mm) Height (mm)  
356.0 356.0 35.0  
INA163UA/2K5  
D
2500  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TUBE  
T - Tube  
height  
L - Tube length  
W - Tube  
width  
B - Alignment groove width  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
INA163UA  
D
D
SOIC  
SOIC  
14  
14  
50  
50  
506.6  
506.6  
8
8
3940  
3940  
4.32  
4.32  
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