LME49726 [TI]
具有 350mA 输出电流的 2 通道 6.25MHz RRO 低失真音频运算放大器;
| 型号： | LME49726 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 350mA 输出电流的 2 通道 6.25MHz RRO 低失真音频运算放大器 放大器 运算放大器 |
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LME49726
www.ti.com
SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
LME49726 High Current, Low Distortion, Rail-to-Rail Output
Audio Operational Amplifier
Check for Samples: LME49726
1
FEATURES
APPLICATIONS
2
•
•
Rail-to-Rail Output
•
•
•
•
•
•
•
Portable Audio Amplification
Easily Drives 2kΩ Loads to within 4mV of Each
Power Supply Voltage Rail
Preamplifiers and Multimedia
Equalization and Crossover Networks
Line Drivers and Receivers
Active Filters
•
•
•
•
Optimized for Superior Audio Signal Fidelity
Output Short Circuit Protection
High Output Drive (>300mA)
DAC I–V Converter Gain Stage
ADC Front-End Signal Conditioning
Available in VSSOP Exposed-DAP Package
KEY SPECIFICATIONS
DESCRIPTION
The LME49726 is a low distortion, low noise rail-to-
rail output audio operational amplifier optimized and
fully specified for high performance, high fidelity
applications. The LME49726 delivers superior audio
•
•
Power Supply Voltage Range: 2.5 to 5.5 V
Quiescent Current per Amplifier
mA (Typ)
at 5V: 0.7
•
THD+N, AV = 1, fIN = 1kHz, RL = 10kΩ:
signal
amplification
for
outstanding
audio
performance. The LME49726 has a very low THD+N
to easily satisfy demanding audio applications. To
ensure that the most challenging loads are driven
without compromise, the LME49726 provides output
current greater than 300mA at 5V. Further, dynamic
range is maximized by an output that drives 2kΩ
loads to within 4mV of either power supply voltage.
–
–
(VOUT = 3.5VP-P, VDD = 5.0V): 0.00008 % (Typ)
(VOUT = 1.5VP-P, VDD = 2.5V): 0.00002 % (Typ)
•
Equivalent Input Noise (f = 10k): 8.3 nV/√Hz
(Typ)
•
•
•
•
•
•
Slew Rate: ±3.7 V/μs (Typ)
Gain Bandwidth Product: 6.25 MHz (Typ)
Open Loop Gain (RL = 10kΩ): 120 dB (Typ)
Input Bias Current: 0.2 pA (Typ)
Input Offset Voltage: 0.5 mV (Typ)
PSRR (DC): 104 dB (Typ)
The LME49726 has a supply range of 2.5V to 5.5V.
Over this supply range the LME49726’s input circuitry
maintains excellent common-mode and power supply
rejection, as well as maintaining its low input bias
current. The LME49726 is unity gain stable.
160.0
140.0
120.0
100.0
80.0
0.80
0.75
0.70
0.65
0.60
60.0
40.0
0.55
0.50
20.0
0.0
10
100
1000
10000
100000
1.25 1.50 1.75
2.25 2.50 2.75
2.00
FREQUENCY (Hz)
POWER SUPPLY (Vs)
Figure 1. Input Voltage Noise vs Frequency
VDD = 3V
Figure 2. Supply Current vs Supply Voltage
per Amplifier, RL = No Load, AV = –1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LME49726
SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
www.ti.com
Typical Connections
R
V
IN
R
1
2
R
2
R
1
V
IN
V
DD
V
DD
V
R
-
OUT
V
OUT
-
V
DD
/2
+
+
L
V
DD
/2
V
EE
Figure 3. Inverting Configuration Split Supplies
Connection Diagram
Figure 4. Inverting Configuration Single Supplies
1
8
OUTPUTA
V
DD
2
7
6
5
OUTPUTB
INVERTING INPUT A
3
NON-INVERTING INPUT A
INVERTING INPUT B
4
V
SS
NON-INVERTING INPUT B
Figure 5. See Package Number DGN0008A
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)
Power Supply Voltage
Storage Temperature
Input Voltage
Output Short Circuit(4)
Power Dissipation
ESD Rating(5)
VS = VSS-VDD
6V
−65°C to 150°C
(VSS) – 0.7V to (VDD) + 0.7V
Continuous
Internally Limited
2000V
ESD Rating(6)
200V
Junction Temperature
Thermal Resistance
150°C
θJA (DGN0008A)
72°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
(2) The Electrical Characteristics tables list specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
ensured.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower.
(5) Human body model, applicable std. JESD22-A114C.
(6) Machine model, applicable std. JESD22-A115-A.
OPERATING RATINGS(1)
Temperature Range
TMIN
≤
TA ≤ TMAX
−40°C ≤ TA ≤ 125°C
2.5V ≤ VS ≤ 5.5V
Supply Voltage Range
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
Copyright © 2008–2013, Texas Instruments Incorporated
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ELECTRICAL CHARACTERISTICS (VDD = 5.0V and VDD = 2.5V)
The following specifications apply for the circuit shown in Figure 1. VDD = 5.0V and VDD = 2.5V, VSS = 0.0V, VCM = VDD/2, RL =
10kΩ, CLOAD = 20pF, fIN = 1kHz, BW = 20–20kHz, and TA = 25°C, unless otherwise specified.
LME49726
Units
(Limits)
Symbol
Parameter
Conditions
Typical(1)
Limit(2)
AV = –1, VOUT = 3.5Vp-p, VDD = 5V
RL = 600Ω
RL = 2kΩ
0.0008
0.0002
0.00008
%
%
%
RL = 10kΩ
THD+N
Total Harmonic Distortion + Noise
AV = –1, VOUT = 1.5Vp-p, VDD = 2.5V
RL = 600Ω
RL = 2kΩ
RL = 10kΩ
0.001
0.0008
0.0002
%
%
%
GBWP
SR
Gain Bandwidth Product
Slew Rate
6.25
3.7
5.0
2.5
MHz (min)
AV = +1, RL = 10kΩ
V/μs (min)
AV = 1V step
ts
Settling time
0.1% error range
0.001% error range
800
1.2
ns
μs
μVRMS
(max)
eN
Equivalent Input Noise Voltage
fBW = 20Hz to 20kHz (A-weighted)
0.7
1.25
f = 10kHz
8.3
10
nV/√Hz
nV/√Hz
eN
Equivalent Input Noise Density
f = 1kHz
f = 100Hz
24
nV/√Hz
IN
Current Noise Density
Input Offset Voltage
f = 1kHz
0.75
0.5
pA/√Hz
VOS
VIN = VDD/2, VO = VDD/2, AV = 1
2.25
85
mV (max)
Average Input Offset Voltage Drift vs
Temperature
ΔVOS/ΔTemp
40°C ≤ TA ≤ 85°C
1.2
μV/°C
PSRR
ISOCH-CH
IB
Power Supply Rejection Ratio
Channel-to-Channel Isolation
Input Bias Current
2.5 to 5.5V, VCM = 0, VDD/2
fIN = 1kHz
104
94
dB (min)
dB
VCM = VDD/2
±0.2
pA
Input Bias Current Drift vs
Temperature
ΔIOS/ΔTemp
IOS
–40°C ≤ TA ≤ 85°C
35
nA/°C
pA
Input Offset Current
VCM = VDD/2
±0.2
VDD–1.6
VSS+0.1
VIN-CM
Common-Mode Input Voltage Range
V (min)
CMRR
1/f
Common Mode Rejection Ratio
1/f Corner Frequency
0.1V < VDD – 1.6V
95
2
80
dB (min)
kHz
AVOL
Open-Loop Voltage Gain
VOUT = VDD/2
120
100
dB (min)
VDD–0.004
VSS +0.004
V (min)
V (max)
RL = 2kΩ to VDD/2
VOUTSWING
Maximum Output Voltage Swing
VDD –0.33
VSS+0.33
V (min)
V (max)
RL = 16Ω to VDD/2
VOUT = 5V, VDD = 5V
VOUT = 2.5V, VDD = 2.5V
IOUT = 0mA, VDD = 5V
IOUT = 0mA, VDD = 2.5V
350
160
0.7
mA
mA
IOUT
Output Current
1.1
1.0
mA (max)
mA (max)
IS
Quiescent Current per Amplifier
0.64
(1) Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
(2) Datasheet min/max specification limits are specified by test or statistical analysis.
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TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Output Voltage
VDD = 1.25V, VSS = –1.25V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 1.25V, VSS = –1.25V, RL = 600Ω
VO = 1.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
0.01
0.1
1
10
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 6.
Figure 7.
THD+N vs Output Voltage
THD+N vs Frequency
VDD = 1.25V, VSS = –1.25V, RL = 10kΩ
VDD = 1.25V, VSS = –1.25V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
VO = 1VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
10
100
1k
10k
100k
0.1
1
10
0.01
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 8.
Figure 9.
THD+N vs Output Voltage
THD+N vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 600Ω
VDD = 2.50V, VSS = –2.50V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
0.01
0.1
1
10
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 10.
Figure 11.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Output Voltage
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
VO = 1VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.001
0.01
0.001
0.0001
0.0001
0.00001
10
100
1k
10k
100k
10
1
0.01
0.1
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 12.
Figure 13.
THD+N vs Output Voltage
THD+N vs Frequency
VDD = 2.75V, VSS = –2.75V, RL = 600Ω
VDD = 2.75V, VSS = –2.75V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
0.01
0.1
1
10
10
100
1k
10k
100k
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 14.
Figure 15.
THD+N vs Output Voltage
THD+N vs Frequency
VDD = 2.75V, VSS = –2.75V, RL = 10kΩ
VDD = 2.75V, VSS = –2.75V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
0.001
0.01
0.001
0.0001
0.0001
0.00001
10
100
1k
10k
100k
10
1
0.01
0.1
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 16.
Figure 17.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR+ vs Frequency
VDD = 1.25V, VSS = –1.25V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
PSRR– vs Frequency
VDD = 1.25V, VSS = –1.25V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
0
-10
-20
-30
-40
-50
0
-10
-20
-30
-40
-50
-60
-70
-60
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18.
Figure 19.
PSRR+ vs Frequency
PSRR– vs Frequency
VDD = 2.50V, VEE = –2.50V, VRIPPLE = 200mVP-P
VDD = 2.50V, VSS = –2.50V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
Input terminated, BW = 22–80kHz
0
0
-10
-20
-30
-40
-50
-10
-20
-30
-40
-50
-60
-70
-60
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20.
Figure 21.
PSRR+ vs Frequency
PSRR– vs Frequency
VDD = 2.75V, VSS = –2.75V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
VDD = 2.75V, VSS = –2.75V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
0
0
-10
-20
-30
-40
-50
-10
-20
-30
-40
-50
-60
-70
-60
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22.
Figure 23.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Output Voltage vs Supply Voltage
RL = 600Ω, AV = –1
f = 1kHz, THD+N = 1%, BW = 22–80kHz
Output Voltage vs Supply Voltage
RL = 10kΩ, AV = –1
f = 1kHz, THD+N = 1%, BW = 22–80kHz
2.5
2.5
2.0
1.5
1.0
0.5
2.0
1.5
1.0
0.5
0.0
0.0
2.5
3.0
3.5
4.5
5.0
5.5
4.0
2.5
3.0
3.5
4.5
5.0
5.5
4.0
POWER SUPPLY (Vs)
POWER SUPPLY (Vs)
Figure 24.
Figure 25.
Crosstalk vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
CMRR vs Frequency
AV = –1, f = 1kHz, BW = 80kHz
VDD = 2.5V, VSS = –2.5V, VRIPPLE = 200mVP-P
0
0
-10
-20
-30
-40
-50
-10
-20
-30
-40
-50
-60
-70
-60
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26.
Figure 27.
Input Voltage Noise vs Frequency
VDD = 5V
160.0
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
10
100
1000
10000
100000
FREQUENCY (Hz)
Figure 28.
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APPLICATION INFORMATION
DISTORTION MEASUREMENTS
The vanishingly low residual distortion produced by LME49726 is below the capabilities of all commercially
available equipment. This makes distortion measurements just slightly more difficult than simply connecting a
distortion meter to the amplifier's inputs and outputs. The solution. however, is quite simple: an additional
resistor. Adding this resistor extends the resolution of the distortion measurement equipment.
The LME49726's low residual is an input referred internal error. As shown in Figure 29, adding the 10Ω resistor
connected between athe amplifier's inverting and non-inverting inputs changes the amplifier's noise gain. The
result is that the error signal (distortion) is amplified by a factor of 101. Although the amplifier's closed-loop gain
is unaltered, the feedback available to correct distortion errors is reduced by 101. To ensure minimum effects on
distortion measurements, keep the value of R1 low as shown in Figure 29.
This technique is verified by duplicating the measurements with high closed loop gain and/or making the
measurements at high frequencies. Doing so, produces distortion components that are within measurement
equipment capabilities. This datasheet's THD+N and IMD values were generated using the above described
circuit connected to an Audio Precision System Two Cascade.
R
2
R
1
1 k
1 k
-
R
3
LME49726
+
10
Distortion Signal Gain = 1 + (R2/R3)
Analyzer Input
Generator Output
Audio Precision
System Two
Cascade
Figure 29. THD+N and IMD Distortion Test Circuit
OPERATING RATINGS AND BASIC DESIGN GUIDELINES
The LME49726 has a supply voltage range from +2.5V to +5.5V single supply or ±1.25 to ±2.75V dual supply.
Bypassed capacitors for the supplies should be placed as close to the amplifier as possible. This will help
minimize any inductance between the power supply and the supply pins. In addition to a 10μF capacitor, a 0.1μF
capacitor is also recommended in CMOS amplifiers.
The amplifier's inputs lead lengths should also be as short as possible. If the op amp does not have a bypass
capacitor, it may oscillate.
BASIC AMPLIFIER CONFIGURATIONS
The LME49726 may be operated with either a single supply or dual supplies. Figure 2 shows the typical
connection for a single supply inverting amplifier. The output voltage for a single supply amplifier will be centered
around the common-mode voltage, VCM. Note, the voltage applied to the VCM insures the output stays above
ground. Typically, the VCM should be equal to VDD/2. This is done by putting a resistor divider circuit at this node,
see Figure 30.
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R
1
R
2
V
DD
V
DD
-
V
OUT
R
3
V
CM
+
R
4
Figure 30. Single Supply Inverting Op Amp
Figure 31 shows the typical connection for a dual supply inverting amplifier. The output voltage is centered on
zero.
R
R
2
1
V
IN
V
DD
-
V
OUT
+
V
SS
Figure 31. Dual Supply Inverting Configuration
Figure 32 shows the typical connection for the Buffer Amplifier or also called a Voltage Follower. The Buffer is a
unity gain stable amplifier.
V
DD
V
OUT
-
V
IN
+
Figure 32. Unity-Gain Buffer Configuration
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Typical Applications
AV = 34.5
F = 1 kHz
En = 0.38 μV
A Weighted
Figure 33. NAB Preamp
AV = 34.5
F = 1 kHz
En = 0.38 μV
A Weighted
Figure 34. NAB Preamp Voltage Gain vs Frequency
R
R
V2
-
1/2 LME49726
V0
R
V1
+
R
VO = V1–V2
Figure 35. Balanced to Single Ended Converter
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R
V1
+
V2
1/2 LME49726
V0
R
R
R
-
V3
V4
R
R
VO = V1 + V2 − V3 − V4
Figure 36. Adder/Subtracter
Figure 37. Sine Wave Oscillator
R1
11k
C1
C2
0.01 mF 0.01 mF
V1
+
1/2 LME49726
V0
R2
22k
-
Illustration is f0 = 1 kHz
Figure 38. Second Order High Pass Filter
(Butterworth)
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
C1
0.022 mF
R1
R2
10k
10k
V1
+
1/2 LME49726
V0
C2
0.011 mF
-
Illustration is f0 = 1 kHz
Figure 39. Second Order Low Pass Filter
(Butterworth)
R2
10k
C1
R1
C1
R2
R1
10k
16k
0.01 mF
16k
0.01 mF
-
-
-
R
G
1/2 LME49726
V
BP
1/2 LME49726
V
LP
1/2 LME49726
V
HP
10k
V
+
+
IN
+
R0
R2
556
10k
Illustration is f0 = 1 kHz, Q = 10, ABP = 1
Figure 40. State Variable Filter
R5
C1
20k
10 mF
R2
R3
R4
20k
10k
20k
R1
20k
D1
1S1588
V
IN
-
-
1/2 LME49726
1/2 LME49726
V0 = V
IN
+
+
D2
1S1588
R6
15k
R7
6.2k
Figure 41. AC/DC Converter
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3.41R1
51k
R1
15k
R1
15k
-
V01
1/2 LME49726
+
0.707R1
10k
V
I
-
1/2 LME49726
V02
+
R1
R1
15k
15k
3.41R1
51k
Figure 42. 2 Channel Panning Circuit (Pan Pot)
R2
V
CC
R1
R3
V1
-
10k
1/2 LME49726
Q1
+
R7
33
R9
10k
V0
R5
10k
BIAS
R8
33
Q2
R6
10k
-V
EE
Figure 43. Line Driver
14
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LME49726
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
BOOST-BASS-CUT
R1
R2
R1
11k
100k
11k
V1
C1
C1
0.05 mF
0.05 mF
R3
11k
-
1/2 LME49726
V0
C2
0.005 mF
R5
+
R5
3.6k
3.6k
R4
500k
BOOST-TREBLE-CUT
Illustration is:
fL = 32 Hz, fLB = 320 Hz
fH =11 kHz, fHB = 1.1 kHz
Figure 44. Tone Control
Figure 45.
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Av = 35 dB
En = 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 46.
R4
10k
R3
10k
V1
R
+
1/2 LME49726
-
R2
-
1/2 LME49726
V0
10k
R5
R1
200
+
10k
-
R6
R7
1/2 LME49726
10k
10k
V2
R
+
Illustration is:
V0 = 101(V2 − V1)
Figure 47. Balanced Input Mic Amp
16
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
Figure 48.
fo (Hz)
C1
C2
R1
R2
32
0.12μF
0.056μF
0.033μF
0.015μF
8200pF
3900pF
2000pF
1100pF
510pF
4.7μF
3.3μF
75kΩ
68kΩ
62kΩ
68kΩ
62kΩ
68kΩ
68kΩ
62kΩ
68kΩ
51kΩ
500Ω
510Ω
510Ω
470Ω
470Ω
470Ω
470Ω
470Ω
510Ω
510Ω
64
125
1.5μF
250
0.82μF
0.39μF
0.22μF
0.1μF
500
1k
2k
4k
0.056μF
0.022μF
0.012μF
8k
16k
330pF
At volume of change = ±12 dB Q = 1.
LME49726 Bill of Materials
Description
Designator
Part Number
Manufacturer
Quantity/Brd
Ceramic Capacitor 0.1uF, 10%,
50V 0805 SMD
AVX
C1, C2, C5–C8
C9, C11
08055C104KAT2A
T491A225K020AT
T491B106K020AT
CRCW08050000Z0EA
2
Tantalum Capacitor 2.2uF,10%,
20V, A-size
Kemet
Kemet
Vishay
Not Stuff
Tantalum Capacitor 10uF,10%,
20V, B-size
C3, C4
2
6
R1, R4, R6, R9, R13,
R14
Resistor 0Ω, 1/8W 1% 0805 SMD
Header, 2-Pin
JP1, JP2, JP3, JP4
JP5
HDR1X2
Header 2
Header 3
Vishay
4
1
4
Header, 3-Pin
HDR1X3
Resistor 10kΩ, 1/8W 1% 0805 SMD
R2, R3, R7, R8
CRCW080510K0FKEA
Texas
Instruments
Dual Rail-to-Rail Op Amp
U1
LME49726
OPEN N/A
1
0
Resistor 100meg/open
1/8W 0805 SMD
R5, R10, R11, R12
N/A
Copyright © 2008–2013, Texas Instruments Incorporated
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
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LME49726 Board Circuit
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
LME49726 Demo Board Views
Figure 49. Top Silkscreen
Figure 50. Top Layer
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Figure 51. Bottom Layer
20
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LME49726
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SNAS432C –NOVEMBER 2008–REVISED APRIL 2013
REVISION HISTORY
Rev
Date
Description
1.0
11/05/08
05/25/10
07/14/11
Initial release.
1.01
1.02
Increased Operating Temperature Range.
Added curves 30038602 and 03 and input text edits.
Re-released the D/S to the WEB after adding curves 30038602 and
03 .
1.03
C
07/19/11
04/04/13
Changed layout of National Data Sheet to TI format.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LME49726MY/NOPB
LME49726MYX/NOPB
ACTIVE
ACTIVE
HVSSOP
HVSSOP
DGN
DGN
8
8
1000 RoHS & Green
3500 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
ZA3
ZA3
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Oct-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LME49726MY/NOPB
HVSSOP DGN
8
8
1000
3500
178.0
330.0
12.4
12.4
5.3
5.3
3.4
3.4
1.4
1.4
8.0
8.0
12.0
12.0
Q1
Q1
LME49726MYX/NOPB HVSSOP DGN
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Oct-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LME49726MY/NOPB
LME49726MYX/NOPB
HVSSOP
HVSSOP
DGN
DGN
8
8
1000
3500
208.0
367.0
191.0
367.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DGN0008A
PowerPADTM VSSOP - 1.1 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE PACKAGE
C
5.05
4.75
TYP
A
0.1 C
SEATING
PLANE
PIN 1 INDEX AREA
6X 0.65
8
1
2X
3.1
2.9
1.95
NOTE 3
4
5
0.38
8X
0.25
3.1
2.9
0.13
C A B
B
NOTE 4
0.23
0.13
SEE DETAIL A
EXPOSED THERMAL PAD
4
5
0.25
GAGE PLANE
2.0
1.7
9
1.1 MAX
8
0.15
0.05
1
0.7
0.4
0 -8
A
20
DETAIL A
TYPICAL
1.88
1.58
4218836/A 11/2019
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187.
www.ti.com
EXAMPLE BOARD LAYOUT
DGN0008A
PowerPADTM VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
(2)
NOTE 9
METAL COVERED
BY SOLDER MASK
(1.88)
SOLDER MASK
DEFINED PAD
SYMM
8X (1.4)
(R0.05) TYP
8
8X (0.45)
1
(3)
NOTE 9
SYMM
9
(2)
(1.22)
6X (0.65)
5
4
(
0.2) TYP
VIA
SEE DETAILS
(0.55)
(4.4)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 15X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4218836/A 11/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
9. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
DGN0008A
PowerPADTM VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
(1.88)
BASED ON
0.125 THICK
STENCIL
SYMM
(R0.05) TYP
8X (1.4)
8
1
8X (0.45)
(2)
BASED ON
SYMM
0.125 THICK
STENCIL
6X (0.65)
5
4
METAL COVERED
BY SOLDER MASK
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
(4.4)
SOLDER PASTE EXAMPLE
EXPOSED PAD 9:
100% PRINTED SOLDER COVERAGE BY AREA
SCALE: 15X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
2.10 X 2.24
1.88 X 2.00 (SHOWN)
1.72 X 1.83
0.125
0.15
0.175
1.59 X 1.69
4218836/A 11/2019
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
www.ti.com
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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated
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