LPV321IDCKRE4 [TI]
GENERAL-PURPOSE, LOW-VOLTAGE, LOW-POWER,RAIL TO RAIL OUTPUT OPERATIONAL AMPLIFIERS; 通用型，低电压，低功耗，轨至轨输出运算放大器
| 型号： | LPV321IDCKRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | GENERAL-PURPOSE, LOW-VOLTAGE, LOW-POWER,RAIL TO RAIL OUTPUT OPERATIONAL AMPLIFIERS |
| 文件： | 总23页 (文件大小：685K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢀ ꢊꢋ ꢀ ꢁꢂꢃ ꢌ ꢍ ꢎꢏꢐ ꢀꢋ ꢀ ꢁꢂꢃ ꢄꢑ ꢒ ꢏꢐ ꢎ
ꢉ ꢊꢈ ꢊꢓ ꢐꢀꢔꢁ ꢏꢓ ꢁꢕ ꢆ ꢊꢋ ꢀ ꢕ ꢖꢔꢂꢕ ꢀꢗꢐꢉ ꢊꢋ ꢀ ꢕ ꢖꢔꢁꢕ ꢖ ꢊꢓꢋ ꢓꢐꢇ ꢀ ꢔꢗꢕ ꢔꢓꢐꢇ ꢀ ꢕ ꢏꢗ ꢁ ꢏꢗ
ꢕ ꢁꢊꢓ ꢐꢗ ꢇꢕ ꢈꢐꢀ ꢐꢘꢁ ꢀꢇ ꢙ ꢇꢊ ꢓꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
LPV321 . . . DBV OR DCK PACKAGE
(TOP VIEW)
D
D
D
D
D
2.7-V and 5-V Performance
−40°C to 125°C Specification at 5 V
No Crossover Distortion
1
2
3
5
4
IN+
V
CC+
Gain Bandwith of 152 kHz
V
CC−
IN−
OUTPUT
Low Supply Current
− LPV321 . . . 9 µA
− LPV358 . . . 15 µA
− LPV324 . . . 28 µA
LPV358 . . . D, DDU, OR DGK PACKAGE
(TOP VIEW)
D
Rail-to-Rail Output Swing at 100-kΩ Load
1OUT
1IN−
1IN+
V
CC+
1
2
3
4
8
7
6
5
− V
− V
− 3.5 mV
+ 90 mV
CC+
CC−
2OUT
2IN−
2IN+
D
D
D
V
. . . −0.2 V to V
− 0.8 V
ICR
CC+
V
CC−
Stable With Capacitive Load of 1000 pF
Applications
− Active Filters
− General-Purpose, Low-Voltage
Applications
− Low-Power and/or Portable Applications
LPV324 . . . D OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN−
1IN+
4OUT
4IN−
4IN+
D
D
Latch-Up Performance Exceeds 100 mA per
JESD 78, Class II
V
V
CC+
CC−
2IN+
2IN−
2OUT
3IN+
3IN−
3OUT
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
8
− 1000-V Charged-Device Model (C101)
description/ordering information
The LPV321/358/324 devices are low-power (9 µA per channel at 5 V) versions of the LMV321/358/324
operational amplifiers. These are additions to the LMV321/358/324 family of commodity operational amplifiers.
The LPV321/358/324 devices are the most cost-effective solutions for applications where low voltage,
low-power operation, space saving, and low price are needed. These devices have rail-to-rail output-swing
capability, and the input common-mode voltage range includes ground. They all exhibit excellent speed-power
ratios, achieving 152 kHz of bandwidth, with a supply current of only 9 µA typical.
The LPV321, LPV358, and LPV324 are characterized for operation from −40°C to 85°C. The LPV321I,
LPV358I, and LPV324I are characterized for operation from −40°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2005, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢀ ꢊꢋ ꢀꢁ ꢂ ꢃ ꢌ ꢍ ꢎꢏ ꢐꢀ ꢋ ꢀꢁ ꢂ ꢃ ꢄ ꢑ ꢒ ꢏꢐꢎ
ꢉꢊ ꢈꢊꢓ ꢐ ꢀ ꢔꢁꢏ ꢓ ꢁꢕ ꢆ ꢊꢋ ꢀꢕ ꢖꢔꢂ ꢕꢀꢗꢐꢉ ꢊ ꢋ ꢀ ꢕ ꢖꢔꢁꢕ ꢖ ꢊꢓꢋ ꢓꢐꢇ ꢀ ꢔꢗꢕ ꢔꢓꢐꢇ ꢀ ꢕ ꢏꢗ ꢁꢏꢗ
ꢕꢁ ꢊ ꢓꢐꢗ ꢇ ꢕꢈ ꢐ ꢀ ꢐꢘ ꢁꢀ ꢇ ꢙꢇ ꢊꢓ ꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
description/ordering information (continued)
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Reel of 3000 LPV321DBVR
Reel of 250 LPV321DBVT
Reel of 3000 LPV321DCKR
5C7_
SOT23-5 (DBV)
SC-70 (DCK)
PREVIEW
52_
Single
Dual
Reel of 250
Tube of 75
LPV321DCKT
LPV358D
PREVIEW
SOIC-8 (D)
PV358
Reel of 2500 LPV358DR
Reel of 3000 LPV358DDUR
Reel of 2500 LPV358DGKR
−40°C to 85°C
VSSOP-8 (DDU)
5A56
546
VSSOP-8 (DGK)
SOIC-14 (D)
Reel of 250
Tube of 50
LPV358DGKT
LPV324D
PREVIEW
LPV324
PV324
Reel of 2500 LPV324DR
Tube of 90 LPV324PW
Quad
TSSOP-14 (PW)
Reel of 2000 LPV324PWR
Reel of 3000 LPV321IDBVR
5C1_
SOT23-5 (DBV)
SC-70 (DCK)
Reel of 250
LPV321IDBVT
PREVIEW
53_
Single
Reel of 3000 LPV321IDCKR
Reel of 250
Tube of 75
LPV321IDCKT
LPV358ID
PREVIEW
SOIC-8 (D)
PV358I
Reel of 2500 LPV358IDR
Reel of 3000 LPV358IDDUR
Reel of 2500 LPV358IDGKR
−40°C to 125°C
VSSOP-8 (DDU)
5AE6
Dual
556
VSSOP-8 (DGK)
SOIC-14 (D)
Reel of 250
Tube of 50
LPV358IDGKT
LPV324ID
PREVIEW
LPV324I
PV324I
Reel of 2500 LPV324IDR
Tube of 90 LPV324IPW
Reel of 2000 LPV324IPWR
Quad
TSSOP-14 (PW)
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
symbol (each amplifier)
−
+
IN−
IN+
OUT
2
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SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
LPV324 simplified schematic
V
CC
V
BIAS1
V
CC
+
−
V
BIAS2
+
Output
−
V
V
CC CC
V
BIAS3
+
IN−
IN+
−
V
BIAS4
+
−
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
− V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
CC+
CC−
ID
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V (either input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
V
CC
− 1 V
to V
I
CC−
CC+
Package thermal impedance, θ (see Notes 3 and 4): 5-pin DBV package . . . . . . . . . . . . . . . . . . . 206°C/W
JA
5-pin DCK package . . . . . . . . . . . . . . . . . . . 252°C/W
8-pin D package . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
8-pin DDU package . . . . . . . . . . . . . . . . . . TBD°C/W
8-pin DGK package . . . . . . . . . . . . . . . . . . . 172°C/W
14-pin D package . . . . . . . . . . . . . . . . . . . . . . 86°C/W
14-pin PW package . . . . . . . . . . . . . . . . . . . 113°C/W
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages and V
2. Differential voltages are at IN+ with respect to IN−.
specified for the measurement of I , are with respect to the network GND.
CC
OS
3. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
JA
J
A
ambient temperature is P = (T (max) − T )/θ . Selecting the maximum of 150°C can affect reliability.
D
J
A
JA
4. The package thermal impedance is calculated in accordance with JESD 51-7.
3
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ꢕꢁ ꢊ ꢓꢐꢗ ꢇ ꢕꢈ ꢐ ꢀ ꢐꢘ ꢁꢀ ꢇ ꢙꢇ ꢊꢓ ꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
recommended operating conditions
MIN
MAX
5
UNIT
V
CC
Supply voltage
2.7
V
LPV3xx
LPV3xxI
−40
85
T
A
Operating free-air temperature
°C
−40
125
ESD protection
TEST CONDITIONS
TYP
2
UNIT
kV
Human-Body Model
Machine model
200
1
V
Charged-Device Model
kV
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢉ ꢊꢈ ꢊꢓ ꢐꢀꢔꢁ ꢏꢓ ꢁꢕ ꢆ ꢊꢋ ꢀ ꢕ ꢖꢔꢂꢕ ꢀꢗꢐꢉ ꢊꢋ ꢀ ꢕ ꢖꢔꢁꢕ ꢖ ꢊꢓꢋ ꢓꢐꢇ ꢀ ꢔꢗꢕ ꢔꢓꢐꢇ ꢀ ꢕ ꢏꢗ ꢁꢏ ꢗ
ꢕ ꢁꢊꢓ ꢐꢗ ꢇꢕ ꢈꢐꢀ ꢐꢘꢁ ꢀꢇ ꢙ ꢇꢊ ꢓꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
2.7-V electrical characteristics
T = 25°C, V
= 2.7 V, V
= 0 V, V = 1 V, V = V
/2, and R > 1 MΩ (unless otherwise
A
CC+
CC−
IC
O
CC+
L
noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
IO
Input offset voltage
1.2
7
mV
Average temperature
coefficient of
input offset voltage
α
VIO
4
mV/°C
I
I
Input bias current
Input offset current
1.7
0.6
50
40
nA
nA
IB
IO
Common-mode
rejection ratio
CMRR
0 ≤ V ≤ 1.7 V
50
50
70
65
dB
dB
V
IC
Supply-voltage
rejection ratio
k
2.7 V ≤ V
≤ 5 V, V = 1 V, V = 1 V
IC
SVR
CC+
O
Common-mode
input voltage range
V
CMRR ≥ 50 dB
= 100 kΩ to 1.35 V
0 to 1.7
−0.2 to 1.9
ICR
O
High level
Low level
V
− 0.100
V
− 0.003
CC+
0.080
CC+
V
Output swing
R
V
L
0.180
8
LPV321
4
8
LPV358 (both amplifiers)
LPV324 (all four amplifiers)
16
I
Supply current
mA
CC
16
24
‡
SR
Slew rate
0.1
205
71
V/ms
kHz
deg
dB
GBW
Gain bandwidth product
Phase margin
C
C
C
= 22 pF (see Note 5)
= 22 pF (see Note 5)
= 22 pF (see Note 5)
L
L
L
F
m
Gain margin
11
Equivalent input
noise voltage
V
f = 1 kHz
f = 1 kHz
178
0.5
nV/√Hz
pA/√Hz
n
Equivalent input
noise current
I
n
†
All typical values are at V
CC
= 2.7 V, T = 25°C.
A
‡
Number specified is the slower of the positive and negative slew rates.
NOTE 5: Closed-loop gain = 18 dB, V = V /2
IC CC+
5
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SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
5-V electrical characteristics
T = 25°C, V
= 5 V, V
= 0 V, V = 2 V, V = V
/2, and R > 1 MΩ (unless otherwise noted)
A
CC+
CC−
IC
O
CC+
L
†
TYP
PARAMETER
TEST CONDITIONS
T
A
MIN
MAX
UNIT
25°C
1.5
7
−40°C to 85°C
−40°C to 125°C
10
V
IO
Input offset voltage
mV
11
Average temperature
coefficient of
input offset voltage
α
25°C
4
2
mV/°C
VIO
25°C
50
60
65
−40°C to 85°C
−40°C to 125°C
I
IB
Input bias current
nA
Common-mode
rejection ratio
CMRR
0 ≤ V ≤ 4 V
IC
25°C
25°C
25°C
50
50
71
65
dB
dB
V
Supply-voltage
rejection ratio
2.7 V ≤ V
≤ 5 V,
= 1 V, V = 1 V
CC+
k
SVR
V
IC
O
Common-mode
input voltage range
V
ICR
CMRR ≥ 50 dB
0 to 4
−0.2 to 4.2
0.6
25°C
40
50
55
−40°C to 85°C
−40°C to 125°C
25°C
I
IO
Input offset current
Output swing
nA
V
V
V
− 0.100
V
CC+
−0.0035
CC+
CC+
CC+
High
level
−40°C to 85°C
−40°C to 125°C
25°C
− 0.200
− 0.225
V
O
R
= 100 kΩ to 2.5 V
L
V
0.090
0.180
0.220
0.240
Low
level
−40°C to 85°C
−40°C to 125°C
Sourcing, V = 0 V
2
17
72
9
Output short-circuit
current
O
I
25°C
mA
OS
Sinking, V = 5 V
O
20
25°C
12
15
−40°C to 85°C
−40°C to 125°C
25°C
LPV321
40
15
28
20
−40°C to 85°C
−40°C to 125°C
25°C
24
I
Supply current
LPV358 (both amplifiers)
mA
CC
80
42
−40°C to 85°C
−40°C to 125°C
25°C
46
LPV324 (all four amplifiers)
125
15
10
10
100
0.1
Large-signal
voltage gain
‡
A
V
−40°C to 85°C
−40°C to 125°C
25°C
R
= 100 kΩ
L
V/mV
§
SR
Slew rate
V/ms
†
‡
§
All typical values are at V
CC
= 5 V, T = 25°C.
A
R
is connected to V
. The output voltage is 0.5 V ≤ V ≤ 4.5 V.
L
CC−
O
Number specified is the slower of the positive and negative slew rates. Connected as a voltage follower with 3-V step input.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢀ ꢊꢋ ꢀ ꢁꢂꢃ ꢌ ꢍ ꢎꢏꢐ ꢀꢋ ꢀ ꢁꢂꢃ ꢄꢑ ꢒ ꢏꢐ ꢎ
ꢕ
ꢉ
ꢊꢈ
ꢊꢓ
ꢐ
ꢀꢔ
ꢁ
ꢏ
ꢓ
ꢁꢕ
ꢆ
ꢊ
ꢋ
ꢀ
ꢕ
ꢖꢔ
ꢂ
ꢕ
ꢀ
ꢗ
ꢐ
ꢉ
ꢊ
ꢋ
ꢀ
ꢖꢔ
ꢁ
ꢕ
ꢖ
ꢊ
ꢓ
ꢋ
ꢕ ꢁꢊꢓ ꢐꢗ ꢇꢕ ꢈꢐꢀ ꢐꢘꢁ ꢀꢇ ꢙ ꢇꢊ ꢓꢆ
ꢓ
ꢐ
ꢇ
ꢀ
ꢔ
ꢗ
ꢕ
ꢔ
ꢓ
ꢐ
ꢇ
ꢀ
ꢕ
ꢏ
ꢗ
ꢁ
ꢏ
ꢗ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
5-V electrical characteristics
T = 25°C, V
= 5 V, V
= 0 V, V = 2 V, V = V
/2, and R > 1 MΩ (unless otherwise noted)
A
CC+
CC−
IC
O
CC+
L
(continued)
†
PARAMETER
TEST CONDITIONS
= 22 pF (see Note 5)
= 22 pF (see Note 5)
= 22 pF (see Note 5)
T
MIN TYP
MAX
UNIT
kHz
A
GBW
Gain bandwidth product
Phase margin
C
C
C
25°C
25°C
25°C
25°C
237
L
L
L
F
m
74
12
deg
Gain margin
dB
V
n
Equivalent input noise voltage
Equivalent input noise current
f = 1 kHz
f = 1 kHz
146
nV/√Hz
I
n
25°C
0.3
pA/√Hz
†
All typical values are at V
CC
= 5 V, T = 25°C.
A
NOTE 5: Closed-loop gain = 18 dB, V = V
/2
IC CC+
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢀ ꢊꢋ ꢀꢁ ꢂ ꢃ ꢌ ꢍ ꢎꢏ ꢐꢀ ꢋ ꢀꢁ ꢂ ꢃ ꢄ ꢑ ꢒ ꢏꢐꢎ
ꢕ
ꢉ
ꢊ
ꢈ
ꢊ
ꢓ
ꢐ
ꢀ
ꢔ
ꢁ
ꢏ
ꢕꢁ ꢊ ꢓꢐꢗ ꢇ ꢕꢈ ꢐ ꢀ ꢐꢘ ꢁꢀ ꢇ ꢙꢇ ꢊꢓ ꢆ
ꢓ
ꢁ
ꢕ
ꢆ
ꢊ
ꢋ
ꢀ
ꢕ
ꢖ
ꢔ
ꢂ
ꢕ
ꢀ
ꢗ
ꢐ
ꢉ
ꢊ
ꢋ
ꢀ
ꢖ
ꢔ
ꢁ
ꢕ
ꢖ
ꢊ
ꢓ
ꢋ
ꢓ
ꢐ
ꢇ
ꢀ
ꢔ
ꢗꢕ
ꢔ
ꢓ
ꢐ
ꢇ
ꢀ
ꢕ
ꢏ
ꢗ
ꢁ
ꢏ
ꢗ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
INPUT BIAS CURRENT
vs
TEMPERATURE
(LPV324 − All Channels)
30
25
20
15
10
5
6
5
4
3
2
1
0
T
T
A
T
A
= 85ꢀC
= 40ꢀC
= 25ꢀC
A
V
= 5 V
CC+
V
IN
= V /2
CC+
0
−40
−20
0
20
40
60
80
100
0
1
2
3
4
5
6
T
A
− Temperature − ꢀC
V
− Supply Voltage − V
CC+
Figure 2
Figure 1
SOURCING CURRENT
vs
OUTPUT VOLTAGE
SOURCING CURRENT
vs
OUTPUT VOLTAGE
1K
1K
100
V
CC+
= 5 V
100
10
V
CC+
= 2.7 V
10
1
1
0.1
0.1
0.01
0.01
0.001
0.001
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Output Voltage Referenced to V+ − V
Output Voltage Referenced to V+ − V
Figure 4
Figure 3
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢀ ꢊꢋ ꢀ ꢁꢂꢃ ꢌ ꢍ ꢎꢏꢐ ꢀꢋ ꢀ ꢁꢂꢃ ꢄꢑ ꢒ ꢏꢐ ꢎ
ꢕ
ꢉ
ꢊꢈ
ꢊꢓ
ꢐ
ꢀꢔ
ꢁ
ꢏ
ꢓ
ꢁꢕ
ꢆ
ꢊ
ꢋ
ꢀ
ꢕ
ꢖ
ꢔ
ꢂ
ꢕ
ꢀ
ꢗ
ꢐ
ꢉ
ꢊ
ꢋ
ꢀ
ꢖꢔ
ꢁ
ꢕ
ꢖ
ꢊ
ꢓ
ꢋ
ꢕ ꢁꢊꢓ ꢐꢗ ꢇꢕ ꢈꢐꢀ ꢐꢘꢁ ꢀꢇ ꢙ ꢇꢊ ꢓꢆ
ꢓ
ꢐ
ꢇ
ꢀ
ꢔ
ꢗ
ꢕ
ꢔ
ꢓ
ꢐ
ꢇ
ꢀ
ꢕ
ꢏ
ꢗ
ꢁ
ꢏ
ꢗ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
SINKING CURRENT
vs
OUTPUT VOLTAGE
SINKING CURRENT
vs
OUTPUT VOLTAGE
1k
100
10
1k
V
CC+
= 5 V
100
10
1
V
CC+
= 2.7 V
1
0.1
0.1
0.01
0.01
0.001
0.001
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Output Voltage Referenced to GND − V
Output Voltage Referenced to GND − V
Figure 5
Figure 6
OUTPUT VOLTAGE SWING
vs
INPUT VOLTAGE NOISE
vs
SUPPLY VOLTAGE
FREQUENCY
240
220
200
180
220
R Terminated to Opposing Supply Rail
R
= 10 kΩ
l
L
200
180
160
140
120
100
V
CC+
= 2.7 V
160 Negative Swing
R
= 100 kΩ
140
120
100
80
L
V
CC+
= 5 V
Positive Swing
60
R
= 10 kΩ
L
40
20
0
R
= 100 kΩ
L
2.5
3
3.5
4
4.5
5
5.5
100
1k
10
V
CC+
− Supply Voltage − V
Frequency − Hz
Figure 7
Figure 8
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢀ ꢊꢋ ꢀꢁ ꢂ ꢃ ꢌ ꢍ ꢎꢏ ꢐꢀ ꢋ ꢀꢁ ꢂ ꢃ ꢄ ꢑ ꢒ ꢏꢐꢎ
ꢉꢊ ꢈꢊꢓ ꢐ ꢀ ꢔꢁꢏ ꢓ ꢁꢕ ꢆ ꢊꢋ ꢀꢕ ꢖꢔꢂ ꢕꢀꢗꢐꢉ ꢊ ꢋ ꢀ ꢕ ꢖꢔꢁꢕ ꢖ ꢊꢓꢋ ꢓꢐꢇ ꢀ ꢔꢗꢕ ꢔꢓꢐꢇ ꢀ ꢕ ꢏꢗ ꢁꢏꢗ
ꢕꢁ ꢊ ꢓꢐꢗ ꢇ ꢕꢈ ꢐ ꢀ ꢐꢘ ꢁꢀ ꢇ ꢙꢇ ꢊꢓ ꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
INPUT CURRENT NOISE
CROSSTALK REJECTION
vs
vs
FREQUENCY
FREQUENCY
140
130
120
110
100
90
0.40
0.35
0.30
V
CC+
= 2.7 V
0.25
0.20
V
CC+
= 5 V
80
0.15
0.10
70
60
50
40
V
R
= 5 V
= 100 k
= 1
CC+
L
0.05
0.00
A
V
V = 3 V
I
PP
10
100
1k
10k
100
1k
10k
Frequency − Hz
100k
Frequency − Hz
Figure 9
Figure 10
PSRR
vs
FREQUENCY
FREQUENCY
vs
R
L
85
75
65
55
45
180
160
140
120
100
80
40
30
V
= 5 V,
CC+
+PSRR
R
= 10 kΩ
L
V
R
R
= 2.7 V
= 10 kΩ
= 100 kΩ
CC+
L
L
Phase
Gain
V
= −5 V,
CC+
−PSRR
20
10
0
V
CC+
= 2.7 V,
+PSRR
35
25
15
5
60
40
V
CC+
= −2.7 V,
−PSRR
20
−5
0
−15
−20
10M
−10
100
1k
10k
Frequency − Hz
100k
1M
1k
10k
100k
1M
Frequency − Hz
Figure 11
Figure 12
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆꢇ ꢈꢉ ꢀ ꢊꢋ ꢀ ꢁꢂꢃ ꢌ ꢍ ꢎꢏꢐ ꢀꢋ ꢀ ꢁꢂꢃ ꢄꢑ ꢒ ꢏꢐ ꢎ
ꢕ
ꢉ
ꢊꢈ
ꢊꢓ
ꢐ
ꢀꢔ
ꢁ
ꢏ
ꢓ
ꢁꢕ
ꢆ
ꢊ
ꢋ
ꢀ
ꢕ
ꢖꢔ
ꢂ
ꢕ
ꢀ
ꢗ
ꢐ
ꢉ
ꢊ
ꢋ
ꢀ
ꢖꢔ
ꢁ
ꢕ
ꢖ
ꢊ
ꢓ
ꢋ
ꢕ ꢁꢊꢓ ꢐꢗ ꢇꢕ ꢈꢐꢀ ꢐꢘꢁ ꢀꢇ ꢙ ꢇꢊ ꢓꢆ
ꢓ
ꢐ
ꢇ
ꢀ
ꢔ
ꢗ
ꢕ
ꢔ
ꢓ
ꢐ
ꢇ
ꢀ
ꢕ
ꢏ
ꢗ
ꢁ
ꢏ
ꢗ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
FREQUENCY
vs
FREQUENCY RESPONSE
vs
R
L
C
L
140
180
160
140
120
100
80
40
40
30
V
CC+
= 2.7 V
Phase
120
100
Phase
Gain
C
C
C
= 22 pF
= 200 pF
= 1000 pF
L
L
L
30
20
80
60
20
10
40
Gain
V
R
R
= 5 V
= 10 kΩ
CC+
L
L
60
20
10
0
= 100 kΩ
40
0
C
C
C
= 22 pF
= 200 pF
= 1,000 pF
−20
−40
0
20
L
L
L
0
−20
−10
−10
−60
10k
1k
100k
1M
1k
10k
100k
1M
10M
Frequency − Hz
Frequency − Hz
Figure 13
Figure 14
SLEW RATE
vs
SUPPLY VOLTAGE
FREQUENCY RESPONSE
vs
C
L
40
120
100
80
0.13
0.12
0.11
0.1
Phase
30
20
10
Positive Edge
60
40
20
Gain
0.09
0.08
0.07
0.06
0.05
0.04
Falling Edge
0
−20
V
C
C
C
= 5.0 V
= 22 pF
= 200 pF
= 1,000 pF
CC+
Open Loop
L
L
L
−40
−60
V
V
= ꢂ100 mV
ID
CC+
0
= 5 V
0.03
−80
−10
2.5
3
3.5
4
4.5
5
5.5
1k
10k
100k
1M
V
CC
− Supply Voltage − V
Frequency − Hz
Figure 16
Figure 15
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢀ ꢊꢋ ꢀꢁ ꢂ ꢃ ꢌ ꢍ ꢎꢏ ꢐꢀ ꢋ ꢀꢁ ꢂ ꢃ ꢄ ꢑ ꢒ ꢏꢐꢎ
ꢉꢊ ꢈꢊꢓ ꢐ ꢀ ꢔꢁꢏ ꢓ ꢁꢕ ꢆ ꢊꢋ ꢀꢕ ꢖꢔꢂ ꢕꢀꢗꢐꢉ ꢊ ꢋ ꢀ ꢕ ꢖꢔꢁꢕ ꢖ ꢊꢓꢋ ꢓꢐꢇ ꢀ ꢔꢗꢕ ꢔꢓꢐꢇ ꢀ ꢕ ꢏꢗ ꢁꢏꢗ
ꢕꢁ ꢊ ꢓꢐꢗ ꢇ ꢕꢈ ꢐ ꢀ ꢐꢘ ꢁꢀ ꢇ ꢙꢇ ꢊꢓ ꢆ
SLOS433I − FEBRUARY 2004 − REVISED MARCH 2005
NONINVERTING SMALL-SIGNAL PULSE RESPONSE
NONINVERTING LARGE-SIGNAL PULSE RESPONSE
0.16
0.12
0.08
0.04
0
4
3
2
T
R
V
A
= 25°C
= 10 kΩ
A
L
= 5 V/0 V
= 1
CC
1
0
V
V = 100 mV/0 V
I
−1
−0.04
100 ꢀs/Div
100 ꢀs/Div
4
3
2
1
0.16
0.12
0.08
0.04
0
T
R
V
A
= 25°C
A
L
T
V
R
A
= 25°C
A
= 10 kΩ
= 5 V/0 V
= 5 V/0 V
= 10 kΩ
CC+
CC
L
V
= 1
0
V
= 1
−1
100 ꢀs/Div
100 ꢀs/Div
Figure 18
Figure 17
INVERTING LARGE-SIGNAL PULSE RESPONSE
INVERTING SMALL-SIGNAL PULSE RESPONSE
6
4
2
0
0.08
0.04
0
−0.04
−0.08
T
= 25ꢀ C
A
T
A
= 25°C
−2
−4
100 ꢀs/Div
100 ꢀs/Div
0.20
6
0.16
0.12
0.08
0.04
0
4
2
T
R
V
= 25°C
A
= −5
A
V
T
R
V
= 25°C
A = −5
V
= 10 kΩ R = 10 kΩ
A
L
L
f
= 10 kΩ
R = 10 kΩ
f
= 5 V R = 2 kΩ
CC+
i
= 5 V
R = 2 kΩ
i
CC+
0
−2
−4
100 ꢀs/Div
100 ꢀs/Div
Figure 20
Figure 19
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
LPV321DBVR
LPV321DBVRE4
LPV321DCKR
LPV321DCKRE4
LPV321IDBVR
LPV321IDBVRE4
LPV321IDCKR
LPV321IDCKRE4
LPV324D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SC70
DBV
DCK
DCK
DBV
DBV
DCK
DCK
D
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SC70
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324DE4
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324DR
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324DRE4
LPV324ID
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324IDE4
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324IDR
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324IDRE4
LPV324IPW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
PW
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324IPWE4
LPV324IPWG4
LPV324IPWR
LPV324IPWRE4
LPV324IPWRG4
LPV324PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV324PWE4
LPV324PWR
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
Orderable Device
LPV324PWRE4
LPV358D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
14
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
VSSOP
VSSOP
SOIC
D
DDU
DDU
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358DDUR
LPV358DDURE4
LPV358DE4
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358DGKR
LPV358DGKRG4
LPV358DR
MSOP
MSOP
SOIC
DGK
DGK
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358DRE4
LPV358ID
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358IDDUR
LPV358IDDURE4
LPV358IDE4
VSSOP
VSSOP
SOIC
DDU
DDU
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358IDGKR
LPV358IDGKRG4
LPV358IDR
MSOP
MSOP
SOIC
DGK
DGK
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LPV358IDRE4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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