PTPS22950CQDDCRQ1 [TI]
Automotive, 5.5-V 2.7-A 34-mΩ load switch with adjustable current limit | DDC | 6 | -40 to 125;
| 型号： | PTPS22950CQDDCRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Automotive, 5.5-V 2.7-A 34-mΩ load switch with adjustable current limit | DDC | 6 | -40 to 125 |
| 文件： | 总25页 (文件大小：1251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS22950-Q1
ZHCSPO5A –SEPTEMBER 2022 –REVISED DECEMBER 2022
TPS22950-Q1 具有可调节电流
限值的5V、2.7A、34mΩ 汽车负载开关
1 特性
3 说明
• 符合汽车应用要求
• 符合AEC-Q100 标准：
– 器件温度等级1：-40°C 至125°C 的环境工作温
度范围
• 输入电压范围(VIN)：1.8V 至5.5V
• 输出电流限制(ILIMIT)：0.05A 至3.5A（典型值）
• 热关断(TSD)
TPS22950-Q1 是一款小型单通道负载开关，能够通过
可调输出电流限制、反向电流阻断和热关断提供强大的
故障保护功能。
开关导通状态由数字输入控制，此输入可与低压控制信
号直接连接。首次加电时，此器件使用智能下拉电阻来
保持 ON 引脚不悬空，直到系统时序控制完成。故意
将引脚驱动为高电平 (>VIH) 后，智能下拉电阻会断
开，以防止不必要的功率损耗。
• 导通电阻(RON)：
– VIN = 5V 时，RON：34mΩ（典型值）
– VIN = 3.3V 时，RON：41mΩ（典型值）
• 可限制浪涌电流的慢速导通时间（典型值）：
TPS22950-Q1 采用标准 SOT 封装，工作环境温度范
围为–40°C 至125°C。
– VIN = 5V 时，tON：832µs
– VIN = 3.3V 时，tON：695µs
• 常开的真反向电流阻断(RCB)
• 故障指示(FLT)
• 快速输出放电(QOD)：130 Ω
• ON 引脚智能下拉电阻(RPD,ON)：
– ON ≥VIH (ION)：50nA（最大值）
– ON ≤VIL (RPD,ON)：500kΩ（典型值）
• 低功耗：
封装信息
器件型号(1)
封装尺寸（标称值）
封装
TPS22950-Q1
DDC（SOT，6）
2.90mm x 2.80mm
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
– 导通状态(IQ)：40µA（典型值）
– 关闭状态(ISD)：0.2µA（典型值）
• UL 2367 认证文件编号E169910
– 已通过ILIM = 66mA 至2.46A 认证
2 应用
• 信息娱乐系统、仪表组和音响主机
• 汽车仪表组显示器
• ADAS 环视系统ECU
• 车身控制模块和网关
VOUT
VIN
CIN
RL
CL
RFLT
Fault
+
-
H
VIN
FLT
ON
L
ILIM
GND
RILIM
典型应用
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSGP6
TPS22950-Q1
ZHCSPO5A –SEPTEMBER 2022 –REVISED DECEMBER 2022
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Table of Contents
8.2 Functional Block Diagram.........................................10
8.3 Feature Description...................................................10
8.4 Device Functional Modes..........................................12
9 Application and Implementation..................................13
9.1 Application Information............................................. 13
9.2 Typical Application.................................................... 13
9.3 Power Supply Recommendations.............................14
9.4 Layout....................................................................... 14
10 Device and Documentation Support..........................16
10.1 接收文档更新通知................................................... 16
10.2 支持资源..................................................................16
10.3 Trademarks.............................................................16
10.4 Electrostatic Discharge Caution..............................16
10.5 术语表..................................................................... 16
11 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Switching Characteristics............................................6
6.7 Typical Characteristics................................................7
7 Parameter Measurement Information............................9
8 Detailed Description......................................................10
8.1 Overview...................................................................10
Information.................................................................... 17
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (September 2022) to Revision A (December 2022)
Page
• 将器件状态从预告信息更改为量产数据.............................................................................................................1
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5 Pin Configuration and Functions
ON
1
6
5
4
FLT
VOUT
ILIM
VIN
2
3
GND
图5-1. TPS22950-Q1, DDC Package 6-Pin SOT (Top View)
表5-1. Pin Functions
PIN
I/O(1)
DESCRIPTION
NAME
NO.
ON
1
I
I
Active high switch control input. Do not leave floating
Switch Input
VIN
2
GND
ILIM
3
4
5
GND
O
Device Ground
Adjusts device current limit through a resistor to ground
Switch Output
VOUT
O
FLT
6
O
Open-drain output, pulled low during thermal shutdown or reverse current-conditions
(1) Signal Types: I = Input, O = Output, GND = Ground.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
–0.3
MAX
6
UNIT
V
VIN
Maximum Input Voltage Range
VOUT
VON
Maximum Output Voltage Range
6
V
Maximum ON Pin Voltage Range
6
V
VFLT
Maximum FLT Pin Voltage
6
V
IMAX
Maximum Continuous Output Current
Maximum Pulsed Output Current (TJ = 85°C, duty cycle = 2%)
Storage temperature
2.7
4.1
150
300
A
IMAX,PLS
TSTG
TLEAD
A
°C
°C
–65
Maximum Lead Temperature (10 s soldering time)
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per AEC Q100-002(1)
HBM ESD classification level 1C
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per AEC
Q100-011
±500
CDM ESD classification level C4A
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.8
0
TYP
MAX
5.5
UNIT
V
VIN
VOUT
VIH
VIL
Input Voltage Range
Output Voltage Range
ON Pin High Voltage Range
ON Pin Low Voltage Range
Output Current Limit
5.5
V
1
5.5
V
0
0.35
3.5
V
ILIM
TA
0.05
–40
–40
A
Ambient temperature
Junction temperature
125
150
°C
°C
TJ
6.4 Thermal Information
TPS22950-Q1
DDC(SOT)
6 PINS
104.8
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
57.6
36.3
12.8
ΨJT
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6.4 Thermal Information (continued)
TPS22950-Q1
THERMAL METRIC(1)
DDC(SOT)
6 PINS
36.0
UNIT
Junction-to-board characterization parameter
°C/W
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
Unless otherwise noted, the characteristics in the following table apply across the recommended operating input voltage
range with a load of CL = 0.1 µF, RL = 100 Ω. Typical Values are at 5V and TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
Input Supply (VIN)
40
60 µA
60 µA
0.4 µA
–40 °C to 85 °C
–40 °C to 125 °C
25 °C
IQ, VIN
VIN Quiescent Current
VIN Shutdown Current
V
V
ON ≥VIH, VOUT = Open
0.2
9
µA
ISD, VIN
–40 °C to 85 °C
–40 °C to 125 °C
ON ≤VIL, VOUT = GND
46 µA
ON-Resistance (RON)
25 °C
34
41
65
41
49
mΩ
mΩ
mΩ
RON
RON
RON
ON-State Resistance
VIN = 5V, IOUT = -200 mA
VIN = 3.3V, IOUT = -200 mA
VIN = 1.8V, IOUT = -200 mA
–40 °C to 85 °C
–40 °C to 125 °C
25 °C
54
51
62
ON-State Resistance
ON-State Resistance
–40 °C to 85 °C
–40 °C to 125 °C
25 °C
mΩ
68
90
mΩ
mΩ
mΩ
105
116
–40 °C to 85 °C
–40 °C to 125 °C
Output Current Limit (ILIM)
RILIM = 610Ω
VOUT - VIN = 0.3V
1.54
0.75
0.38
2
1
2.46
1.25
A
A
–40 °C to 125 °C
–40 °C to 125 °C
–40 °C to 125 °C
–40 °C to 125 °C
–40 °C to 125 °C
RILIM = 1.15kΩ
VOUT - VIN = 0.3V
ILIM
Output Current Limit
RILIM = 2.21kΩ
VOUT - VIN = 0.3V
0.5 0.62
A
RILIM = 19.2kΩ
VOUT - VIN = 0.3V
0.034 0.05 0.066
5
A
Current Limit Response
Time
tLIM
Output hard short (IOUT > ILIM
)
µs
Reverse Current Blocking (RCB)
Activation Threshold
VRCB
VOUT Rising; VOUT > VIN
VOUT Falling; VOUT > VIN
VOUT = VIN + 1V
44
16
3
mV
mV
µs
–40 °C to 125 °C
–40 °C to 125 °C
–40 °C to 125 °C
Release Threshold
tRCB
Response Time
Reverse Leakage Current
into VOUT
V
ON ≤VIL
IOUT,RCB
38 µA
–40 °C to 125 °C
VIN = 0V, VOUT = 5V
Fault Indication (FLT)
VOL, FLT Output Low Voltage
tD,FLT Fault Delay Time
IFLT = 1 mA
0.1
V
–40 °C to 125 °C
–40 °C to 125 °C
10
µs
V
ON ≥VIH
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6.5 Electrical Characteristics (continued)
Unless otherwise noted, the characteristics in the following table apply across the recommended operating input voltage
range with a load of CL = 0.1 µF, RL = 100 Ω. Typical Values are at 5V and TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
IFLT
Off State Leakage
50 nA
V
ON ≤VIL
–40 °C to 125 °C
Enable Pin (ON)
Smart Pull Down
RPD, ON
500 650
50 nA
V
V
ON ≤VIL
ON ≥VIH
–40 °C to 125 °C
–40 °C to 125 °C
–40 °C to 125 °C
kΩ
Resistance
ION
ON Pin Leakage
VIN = 5V
ON ≤VIL
Quick Output Discharge
Resistance
RQOD
120 160
Ω
Ω
Ω
V
VIN = 3.3V
ON ≤VIL
Quick Output Discharge
Resistance
RQOD
RQOD
130 185
200 355
–40 °C to 125 °C
–40 °C to 125 °C
V
VIN = 1.8V
ON ≤VIL
Quick Output Discharge
Resistance
V
Thermal Shutdown (TSD)
Rising
N/A
N/A
170
150
°C
°C
TSD
Thermal Shutdown
Falling (Hysteresis)
6.6 Switching Characteristics
Unless otherwise noted, the typical characteristics in the following table applies at 25°C with a load of CL = 1 µF, RL = 100 Ω
PARAMETER
TEST CONDITIONS
MIN
TYP
1037
892
730
621
474
313
415
415
415
19
MAX
UNIT
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
tON
tON
tON
tR
Turn ON Time
VIN = 5 V
Turn ON Time
VIN = 3.3 V
VIN = 1.8 V
VIN = 5 V
Turn ON Time
Output Rise Time
Output Rise Time
Output Rise Time
Output Delay Time
Output Delay Time
Output Delay Time
Turn OFF Time
Turn OFF Time
Turn OFF Time
Output Fall Time
Output Fall Time
Output Fall Time
tR
VIN = 3.3 V
VIN = 1.8 V
VIN = 5 V
tR
tD
tD
VIN = 3.3 V
VIN = 1.8 V
VIN = 5 V
tD
tOFF
tOFF
tOFF
tFALL
tFALL
tFALL
VIN = 3.3 V
VIN = 1.8 V
VIN = 5 V
14
16
118
120
130
VIN = 3.3 V
VIN = 1.8 V
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6.7 Typical Characteristics
47
10
9
8
7
6
5
4
3
2
1
0
–40 C
–40 C
25 C
85 C
125 C
46.5
25 C
46
85 C
125 C
45.5
45
44.5
44
43.5
43
42.5
42
41.5
41
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5
VIN (V)
3.25
3.5
3.75
4
4.25
VIN (V)
4.5
4.75
5
VOUT = Open
VOUT = Open
图6-2. Shutdown Current vs Input Voltage
图6-1. Quiescent Current vs Input Voltage
85
80
75
70
65
60
55
50
45
40
35
30
25
220
200
180
160
140
120
100
–40 C
25 C
–40 C
25 C
85 C
85 C
125 C
125 C
1.5
2
2.5
3
3.5
VIN (V)
4
4.5
5
1.5
2
2.5
3
3.5
VIN (V)
4
4.5
5
ILOAD = 200 mA
图6-3. On-Resistance vs Input Voltage
图6-4. QOD Resistance vs Input Voltage
60
155
150
145
140
135
130
125
120
115
110
105
–40 C
–40 C
25 C
125 C
55
50
45
40
35
30
25
20
15
10
25 C
125 C
1.5
2
2.5
3
3.5
VIN (V)
4
4.5
5
1.5
2
2.5
3
3.5
VIN (V)
4
4.5
5
CL = 0.1µF
图6-5. Turn-off Time vs Input Voltage
CL = 0.1µF
图6-6. Fall Time vs Input Voltage
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6.7 Typical Characteristics (continued)
600
560
520
480
440
400
360
320
280
240
200
650
600
550
500
450
400
350
300
–40 C
25 C
–40 C
25 C
125 C
125 C
1.8 2.1 2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8
VIN (V)
1.5
2
2.5
3
3.5
VIN (V)
4
4.5
5
CL = 0.1µF
CL = 0.1µF
图6-8. Rise Time vs Input Voltage
图6-7. Delay Time vs Input Voltage
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7 Parameter Measurement Information
VIL
VIH
VON
tON
tOFF
tFALL
tRISE
90%
90%
tDELAY
VOUT
10%
10%
图7-1. Timing Waveform
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8 Detailed Description
8.1 Overview
The TPS22950-Q1 is a single channel load switch with a 34-mΩ power MOSFET capable of driving loads up to
2.7 A. While on, the device provides protection against fault cases through its adjustable output current limiting
and thermal shutdown. The TPS22950-Q1 responds to overcurrent events with auto-retry behavior. The
TPS22950 also provides reverse current blocking for when VOUT exceeds VIN. The switch ON state is
controlled by a digital input that is capable of interfacing directly with low-voltage control signals, and a smart
pulldown is used to keep the ON pin from floating until system sequencing is complete. When the device is
turned off, quick output discharge is enabled, pulling the output voltage down to 0 V through a resistive path to
GND.
8.2 Functional Block Diagram
Reverse
Current
Blocking
Current
Limiting
VOUT
VIN
ILIM
Control
Logic
Driver
ON
RQOD
Smart
Pull
Down
FLT
GND
GND
8.3 Feature Description
8.3.1 Current Limiting
The TPS22950-Q1 responds to overcurrent conditions by limiting its output current to the ILIM level shown in 图
8-1.
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1
0
ON
Auto Restart
(Short Removed)
Soft Short on
VOUT
Auto Restart
Into Short
ILIM
IOUT
0
tLIM
VIN
0
VOUT
VFLT
FLT
0
tD,FLT
TSD
TSDHYS
TJ
TJ
Time
图8-1. Output Current Limit for Short-Circuit Protection (tLIM
)
When an overcurrent condition is detected, the device maintains a constant output current and reduces the
output voltage accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present on the output and the ON pin is toggled
high, turning the device on. The output voltage is held near zero potential with respect to ground and the
TPS22950-Q1 ramps the output current to ILIM. The TPS22950-Q1 device limits the current to ILIM until the
overload condition is removed or the internal junction temperature of the device reaches thermal shutdown and
the device turns itself off. The device remains off until the junction temperature has lowered to TSDHYS, and the
device turns itself back on. This action cycles until the overload condition is removed.
The second condition is when a short circuit, partial short circuit, or transient overload occurs after the device
has been fully powered on. The device responds to the overcurrent condition within time tLIM , as shown in 图
8-2 , and before the current is able to exceed ILIM. In the case of a fast transient, the current-sense amplifier is
overdriven and momentarily disables the internal power FET. The current-sense amplifier recovers and limits the
output current to ILIM. Similar to the previous case, the TPS22950-Q1 limits the current to ILIM until the overload
condition is removed or the internal junction temperature of the device reaches thermal shutdown and begins
thermally cycling on and off.
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ILIM
tLIM
IOUT
图8-2. Transient Current Limit Waveform
8.3.1.1 Adjusting the Current Limit
The current limit is adjusted by connecting an external resistor from the ILIM pin to GND. Use 方程式 1 to
choose the current limit resistor:
–1.072
ILIM = 1.18 × (RILIM
)
(1)
8.3.2 Reverse Current Blocking (RCB)
In a scenario where the device is enabled and VOUT is greater than VIN, there is potential for reverse current to
flow through the pass FET or the body diode. When the reverse current threshold is exceeded (about 900 mA),
there is a delay time (tRCB) before the switch turns off to stop the current flow. The switch remains off and block
reverse current as long as the reverse voltage condition exists. After VOUT has dropped below the release
voltage threshold (VRCB) the device turns back on. When the ON pin is pulled low, the device constantly blocks
reverse current.
8.4 Device Functional Modes
表8-1 summarizes the device functional modes.
表8-1. Output Connection Table
ON
L
Fault Condition
N/A
VOUT State
Hi-Z
FLT State
Hi-Z
Hi-Z
Hi-Z
L
H
None
VIN (through RON
Current limited
Hi-Z
)
H
Output short
Thermal shutdown
Reverse current
H
H
Hi-Z
L
表8-2. Smart ON
Functional Modes
(RPD,ON
)
ON
ON Pin
Pulldown active
No pulldown
≤VIL
≥VIH
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9 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
This section highlights some of the design considerations when implementing this device in various applications.
9.2 Typical Application
This typical application demonstrates how the TPS22950-Q1 device can be used to set an adjustable current
limit.
VOUT
VIN
ON
CIN
RL
CL
RFLT
Fault
+
-
H
VIN
FLT
L
ILIM
GND
RILIM
图9-1. Typical Application
9.2.1 Design Requirements
For this example, the values in 表9-1 are used as the design parameters.
表9-1. Design Parameters
PARAMETER
VALUE
Input voltage (VIN)
5 V
Load current (mA)
100 mA
500 mA
Typical current limit (mA)
9.2.2 Detailed Design Procedure
In this example, the nominal load current is 100 mA, so the current limit can be set to 500 mA without disrupting
normal operation. Use 方程式2 to calculate the resistor needed on the ILIM pin.
–1.072
ILIM = 1.18 × (RILIM
)
(2)
where
• ILIM = Typical current limit setting
• RILIM = Resistor on the ILIM pin
Based on 方程式2, a 2.21-kΩresistor must be used on the ILIM pin to set a typical current limit of 500 mA.
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9.2.3 Application Curves
图9-2 shows the device turning on into a fault condition and limiting the current to the specified amount of 500
mA.
VOUT = GND
RILIM = 2.5 kΩ
图9-2. TPS22950-Q1 Turning On Into an Output Short
9.3 Power Supply Recommendations
The device is designed to operate with a VIN range of 1.8 V to 5.5 V. The VIN power supply must be well
regulated and placed as close to the device terminal as possible. The power supply must be able to withstand all
transient load current steps. In most situations, using an input capacitance (CIN) of 1 μF is sufficient to prevent
the supply voltage from dipping when the switch is turned on. In cases where the power supply is slow to
respond to a large transient current or large load current step, additional bulk capacitance can be required on the
input.
9.4 Layout
9.4.1 Layout Guidelines
PCB layout is a critical piece of a good power supply design. To maximize the device performance, please use
the following recommendations:
• Place RILIM as close as possible to the device and minimize the current loop to ground.
• Input and output capacitors must be placed close to the device to minimize the effects that parasitic trace
inductance can have on normal operation.
• Use wide traces for VIN, VOUT, and GND. This helps minimize the parasitic electrical effects and maximizes
the thermal capability of the device.
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9.4.2 Layout Example
VIN
RFLT
From GPIO
ON
FLT
VIN
VOUT
GND
ILIM
Via to GND
RILIM
Via to GND
图9-3. TPS22950-Q1 Layout Example
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10 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
10.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
10.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
10.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
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11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PTPS22950CQDDCRQ1
TPS22950CQDDCRQ1
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
DDC
DDC
6
6
3000
TBD
Call TI
Call TI
-40 to 125
-40 to 125
Samples
Samples
3000 RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
950Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
OTHER QUALIFIED VERSIONS OF TPS22950-Q1 :
Catalog : TPS22950
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
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23-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS22950CQDDCRQ1 SOT-23-
THIN
DDC
6
3000
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-23-THIN DDC
SPQ
Length (mm) Width (mm) Height (mm)
210.0 185.0 35.0
TPS22950CQDDCRQ1
6
3000
Pack Materials-Page 2
PACKAGE OUTLINE
DDC0006A
SOT-23 - 1.1 max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
3.05
2.55
1.1
0.7
1.75
1.45
0.1 C
B
A
PIN 1
INDEX AREA
1
6
4X 0.95
1.9
3.05
2.75
4
3
0.5
0.3
0.1
6X
TYP
0.0
0.2
C A B
C
0 -8 TYP
0.25
GAGE PLANE
SEATING PLANE
0.20
0.12
TYP
0.6
0.3
TYP
4214841/C 04/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC MO-193.
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EXAMPLE BOARD LAYOUT
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X (0.95)
4
3
(R0.05) TYP
(2.7)
LAND PATTERN EXAMPLE
EXPLOSED METAL SHOWN
SCALE:15X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4214841/C 04/2022
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X(0.95)
4
3
(R0.05) TYP
(2.7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214841/C 04/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
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