SM72375_16 [TI]
SM72375 SolarMagic Dual Micropower Rail-To-Rail Input CMOS Comparator with Open Drain Output;
| 型号： | SM72375_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SM72375 SolarMagic Dual Micropower Rail-To-Rail Input CMOS Comparator with Open Drain Output |
| 文件： | 总19页 (文件大小：1347K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM72375
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SNIS155D –NOVEMBER 2010–REVISED APRIL 2013
SM72375 SolarMagic Dual Micropower Rail-To-Rail Input CMOS Comparator with Open
Drain Output
Check for Samples: SM72375
1
FEATURES
DESCRIPTION
The SM72375 is an ultra low power dual comparator
with a maximum 10 μA/comparator power supply
current. It is designed to operate over a wide range of
supply voltages, with a minimum supply voltage of
2.7V.
2
•
Renewable Energy Grade
(Typical Unless Otherwise Noted)
•
Low Power Consumption (Max): IS = 10
μA/comp
•
•
Wide Range of Supply Voltages: 2.7V to 15V
The common mode voltage range of the SM72375
exceeds both the positive and negative supply rails, a
significant advantage in single supply applications.
The open drain output of the SM72375 allows for
wired-OR configurations. The open drain output also
offers the advantage of allowing the output to be
pulled to any voltage rail up to 15V, regardless of the
supply voltage of the SM72375.
Rail-to-Rail Input Common Mode Voltage
Range
•
•
•
Open Drain Output
Short Circuit Protection: 40 mA
Propagation Delay (@VS = 5V, 100 mV
Overdrive): 5 μs
•
−40°C to 125°C Temperature Range
The SM72375 is targeted for systems where low
power consumption is the critical parameter. ensured
operation at supply voltages of 2.7V and rail-to-rail
performance makes this comparator ideal for battery-
powered applications.
APPLICATIONS
•
•
•
•
Metering Systems
RC Timers
Alarm and Monitoring Circuits
Window Comparators, Multivibrators
Connection Diagram
Figure 1. 8-Pin VSSOP - Top View
Package Number DGK
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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SM72375
SNIS155D –NOVEMBER 2010–REVISED APRIL 2013
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Absolute Maximum Ratings(1)(2)
ESD Tolerance(3)
1.5 kV
(V+)+0.3V to (V−)−0.3V
(V+)+0.3V to (V−)−0.3V
16V
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+–V−)
Current at Input Pin(4)
±5 mA
Current at Output Pin(5)(6)
±30 mA
Current at Power Supply Pin, SM72375
Lead Temperature (Soldering, 10 seconds)
Storage Temperature Range
Junction Temperature(7)
40 mA
260°C
−65°C to +150°C
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human body model, 1.5 kΩ in series with 100 pF. The output pins of the two comparators (pin 1 and pin 7) have an ESD tolerance of
1.5 kV. All other pins have an ESD tolerance of 2 kV.
(4) Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(6) Do not short circuit output to V+, when V+ is > 12V or reliability will be adversely affected.
(7) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) – TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Operating Ratings(1)
Supply Voltage
2.7 ≤ VS ≤ 15V
– 40°C ≤ TA ≤ +125°C
172°C/W
Temperature Range
Thermal Resistance (θJA
)
8-Pin VSSOP
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
VOS
Parameter
Input Offset Voltage
Conditions
Min(1)
Typ(2)
Max(1)
Units
3
10
mV
13
TCVOS
Input Offset Voltage Temperature
Drift
2.0
μV/Month
Input Offset Voltage Average Drift
Input Current
See(3)
3.3
0.02
0.01
75
IB
pA
pA
dB
dB
dB
IOS
Input Offset Current
CMRR
PSRR
AV
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Voltage Gain
±1.35V < VS < ±7.5V
(By Design)
80
100
3.0
VCM
Input Common-Mode Voltage
Range
CMRR > 55 dB
2.9
2.7
V
−0.3
−0.2
0.0
(1) All limits are ensured by testing or statistical analysis.
(2) Typical Values represent the most likely parametric norm.
(3) Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.
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2.7V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
VOL
Parameter
Output Voltage Low
Conditions
ILOAD = 2.5 mA
Min(1)
Typ(2)
Max(1)
Units
0.2
0.3
V
0.45
IS
Supply Current
For Both Comparators
12
20
25
μA
ILeakage
Output Leakage Current
VIN(+) = 0.5V,
500
0.1
nA
VIN(−) = 0V, VO = 15V
5.0V and 15.0V Electrical Characteristics
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 5.0V and 15.0V, V− = 0V, VCM = V+/2. Boldface limits apply
at the temperature extremes.
Symbol
Parameter
Input Offset Voltage
Conditions
Min(1)
Typ(2)
Max(1)
Units
VOS
3
10
mV
13
TCVOS Input Offset Voltage Temperature Drift V+ = 5V
V+ = 15V
2.0
0.4
3.3
4.0
0.04
0.02
75
μV/°C
Input Offset Voltage Average Drift
V+ = 5V(3)
μV/Month
V+ = 15V(3)
IB
Input Current
V = 5V
pA
pA
dB
dB
dB
dB
IOS
Input Offset Current
V+ = 5V
CMRR Common Mode
Rejection Ratio
V+ = 5V
V+ = 15V
82
PSRR
AV
Power Supply Rejection Ratio
±2.5V < VS < ±5V
80
Voltage Gain
(By Design)
100
5.3
VCM
Input Common-Mode Voltage Range
V+ = 5.0V
5.2
CMRR > 55 dB
5.0
−0.3
15.3
−0.3
0.2
−0.2
0.0
V
V
V+ = 15.0V
CMRR > 55 dB
15.2
15.0
−0.2
0.0
VOL
Output Voltage Low
V+ = 5V
ILOAD = 5 mA
V+ = 15V
0.4
0.55
02
0.4
ILOAD = 5 mA
0.55
IS
Supply Current
For Both Comparators
(Output Low)
12
20
25
μA
ISC
Short Circuit Current
V+ = 15V, Sinking, VO = 12V(4)
45
mA
(1) All limits are ensured by testing or statistical analysis.
(2) Typical Values represent the most likely parametric norm.
(3) Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.
(4) Do not short circuit output to V+, when V+ is > 12V or reliability will be adversely affected.
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AC Electrical Characteristics
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the
temperature extreme.
Symbol
Parameter
Conditions
Min(1)
Typ(2)
Max(1)
Units
tRISE
Rise Time
Fall Time
f = 10 kHz, CL = 50 pF,
Overdrive = 10 mV(3)
f = 10 kHz, CL = 50 pF,(3)
0.3
μs
tFALL
tPHL
0.3
10
4
μs
μs
Propagation Delay
(High to Low)
f = 10 kHz, CL
50 pF(3)
=
10 mV
100 mV
10 mV
V+ = 2.7V, f = 10
kHz, CL = 50 pF(3)
10
4
μs
μs
100 mV
10 mV
tPLH
Propagation Delay (Low to High)
f = 10 kHz, CL
50 pF(3)
=
10
4
100 mV
10 mV
V+ = 2.7V, f = 10
kHz, CL = 50 pF(3)
8
μs
100 mV
4
(1) All limits are ensured by testing or statistical analysis.
(2) Typical Values represent the most likely parametric norm.
(3) CL inlcudes the probe and jig capacitance. The rise time, fall time and propagation delays are measured with a 2V input step.
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Typical Performance Characteristics
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Input Current
Input Current
vs.
vs.
Common-Mode Voltage
Common-Mode Voltage
Figure 2.
Figure 3.
Input Current
vs.
Common-Mode Voltage
Input Current
vs.
Temperature
Figure 4.
Figure 5.
ΔVOS
vs
ΔVCM, VS = 2.7V
ΔVOS
vs
ΔVCM, VS = 5V
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
ΔVOS
vs
ΔVCM, VS = 15V
Response Time for Overdrive (tPLH
)
)
)
Figure 8.
Figure 9.
Response Time for Overdrive (tPHL
)
Response Time for Overdrive (tPLH
Figure 10.
Figure 11.
Response Time for Overdrive (tPHL
)
Response Time for Overdrive (tPLH
Figure 12.
Figure 13.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Response Time
vs.
Capacitive Load
Response Time for Overdrive (tPHL
)
Figure 14.
Figure 15.
Supply Current
Supply Current
vs.
Supply Voltage (Output Low)
vs.
Supply Voltage (Output High)
20
20
18
18
16
14
85°C
125°C
85°C
16
14
125°C
25°C
-40°C
25°C
12
10
12
10
-40°C
8
8
6
4
2
0
6
4
2
0
Pos Input = 0.1V
Neg Input = 0.0V
Pos Input = 0.0V
Neg Input = 0.1V
2
3
4
5
6
7
8
9
10 11 12 13 14 15
3 5
2 4 6 7 10 11 12 13 14 15
8
9
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 16.
Figure 17.
Output Voltage
vs.
Output Voltage
vs.
Output Current (Sinking)
Output Current (Sinking)
700
600
500
400
300
200
100
0
V
= 2.7V
S
V
= 5V
S
600
500
400
300
125°C
125°C
85°C
25°C
85°C
25°C
200
100
0
-40°C
-40°C
0
1
2
3
4
5
6
7
8
9
10
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 18.
Figure 19.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Output Voltage
Output Short Circuit Current
vs.
Output Current (Sinking)
700
vs.
Supply
140
120
100
80
V
= 15V
S
600
500
400
300
125°C
85°C
-40°C
60
25°C
25°C
85°C
200
100
0
40
20
0
-40°C
125°C
0
1
2
3
4
5
6
7
8
9
10
2
3
4
5
6
7
8
9
10 11 12
SUPPLY VOLTAGE (V)
OUTPUT CURRENT (mA)
Figure 20.
Figure 21.
Output Leakage
vs.
Output Voltage
100
125°C
10
0
85°C
0.1
25°C
0.01
0.001
0.0001
-40°C (estimated)
V
= 2.7V
S
2
5 7
9
4 6 8 10 11 12 13 14 15
3
OUTPUT VOLTAGE (V)
Figure 22.
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APPLICATION INFORMATION
1.0 INPUT COMMON-MODE VOLTAGE RANGE
At supply voltages of 2.7V, 5V and 15V, the SM72375 has an input common-mode voltage range (CMVR) which
exceeds both supplies. As in the case of operational amplifiers, CMVR is defined by the VOS shift of the
comparator over the common-mode range of the device. A common-mode rejection ratio (CMRR, defined as
ΔVOS/ΔVCM) of 75 dB (typical) implies a shift of < 1 mV over the entire common-mode range of the device. The
absolute maximum input voltage at V+ = 5V is 200 mV beyond either supply rail at room temperature.
Figure 23. An Input Signal Exceeds the SM72375 Power Supply Voltages with No Output Phase Inversion
A wide input voltage range means that the comparator can be used to sense signals close to ground and also to
the power supplies. This is an extremely useful feature in power supply monitoring circuits.
An input common-mode voltage range that exceeds the supplies, 20 fA input currents (typical), and a high input
impedance makes the SM72375 ideal for sensor applications. The SM72375 can directly interface to sensors
without the use of amplifiers or bias circuits. In circuits with sensors which produce outputs in the tens to
hundreds of millivolts, the SM72375 can compare the sensor signal with an appropriately small reference
voltage. This reference voltage can be close to ground or the positive supply rail.
2.0 LOW VOLTAGE OPERATION
Comparators are the common devices by which analog signals interface with digital circuits. The SM72375 is
designed to operate at supply voltages of 2.7V, without sacrificing performance, to meet the demands of 3V
digital systems.
At supply voltages of 2.7V, the common-mode voltage range extends 200 mV (ensured) below the negative
supply. This feature, in addition to the comparator being able to sense signals near the positive rail, is extremely
useful in low voltage applications.
Figure 24. Even at Low-Supply Voltage of 2.7V, an Input Signal which Exceeds the Supply Voltages
Produces No Phase Inversion at the Output
At V+ = 2.7V, propagation delays are tPLH = 4 μs and tPHL = 4 μs with overdrives of 100 mV. Please refer to the
Typical Performance Characteristics section for more extensive characterization.
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3.0 OUTPUT SHORT CIRCUIT CURRENT
The SM72375 has short circuit protection of 40 mA. However, it is not designed to withstand continuous short
circuits, transient voltage or current spikes, or shorts to any voltage beyond the supplies. A resistor is series with
the output should reduce the effect of shorts. For outputs which send signals off PC boards additional protection
devices, such as diodes to the supply rails, and varistors may be used.
4.0 HYSTERESIS
If the input signal is very noisy, the comparator output might trip several times as the input signal repeatedly
passes through the threshold. This problem can be addressed by making use of hysteresis as shown below.
Figure 25. Canceling the Effect of Input Capacitance
The capacitor added across the feedback resistor increases the switching speed and provides more short term
hysteresis. This can result in greater noise immunity for the circuit.
Typical Applications
UNIVERSAL LOGIC LEVEL SHIFTER
The output of the SM72375 is the uncommitted drain of the output NMOS transistor. Many drains can be tied
together to provide an output OR'ing function. An output pullup resistor can be connected to any available power
supply voltage within the permitted power supply range.
Figure 26. Universal Logic Level Shifter
The two 1 kΩ resistors bias the input to half of the power supply voltage. The pull-up resistor should go to the
output logic supply. Due to its wide operating range, the SM72375 is ideal for the logic level shifting applications.
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ONE-SHOT MULTIVIBRATOR
Figure 27. One-Shot Multivibrator
A monostable multivibrator has one stable state in which it can remain indefinitely. It can be triggered externally
to another quasi-stable state. A monostable multivibrator can thus be used to generate a pulse of desired width.
The desired pulse width is set by adjusting the values of C2 and R4. The resistor divider of R1 and R2 can be
used to determine the magnitude of the input trigger pulse. The SM72375 will change state when V1 < V2. Diode
D2 provides a rapid discharge path for capacitor C2 to reset at the end of the pulse. The diode also prevents the
non-inverting input from being driven below ground.
BI-STABLE MULTIVIBRATOR
Figure 28. Bi-Stable Multivibrator
A bi-stable multivibrator has two stable states. The reference voltage is set up by the voltage divider of R2 and
R3. A pulse applied to the SET terminal will switch the output of the comparator high. The resistor divider of R1,
R4, and R5 now clamps the non-inverting input to a voltage greater than the reference voltage. A pulse applied to
RESET will now toggle the output low.
ZERO CROSSING DETECTOR
Figure 29. Zero Crossing Detector
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A voltage divider of R4 and R5 establishes a reference voltage V1 at the non-inverting input. By making the series
resistance of R1 and R2 equal to R5, the comparator will switch when VIN = 0. Diode D1 insures that V3 never
drops below −0.7V. The voltage divider of R2 and R3 then prevents V2 from going below ground. A small amount
of hysteresis is setup to ensure rapid output voltage transitions.
OSCILLATOR
Figure 30. Square Wave Generator
Figure 30 shows the application of the SM72375 in a square wave generator circuit. The total hysteresis of the
loop is set by R1, R2 and R3. R4 and R5 provide separate charge and discharge paths for the capacitor C. The
charge path is set through R4 and D1. So, the pulse width t1 is determined by the RC time constant of R4 and C.
Similarly, the discharge path for the capacitor is set by R5 and D2. Thus, the time t2 between the pulses can be
changed by varying R5, and the pulse width can be altered by R4. The frequency of the output can be changed
by varying both R4 and R5.
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Figure 31. Time Delay Generator
Figure 32. Time Delay Generator
The circuit shown above provides output signals at a prescribed time interval from a time reference and
automatically resets the output when the input returns to ground. Consider the case of VIN = 0. The output of
comparator 4 is also at ground. This implies that the outputs of comparators 1, 2, and 3 are also at ground.
When an input signal is applied, the output of comparator 4 swings high and C charges exponentially through R.
This is indicated above. The output voltages of comparators 1, 2, and 3 swtich to the high state when VC1 rises
above the reference voltages VA, VB and VC. A small amount of hysteresis has been provided to insure fast
switching when the RC time constant is chosen to give long delay times.
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REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 13
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PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device
SM72375MM/NOPB
SM72375MME/NOPB
SM72375MMX/NOPB
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
VSSOP
VSSOP
VSSOP
DGK
8
8
8
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
S375
ACTIVE
ACTIVE
DGK
DGK
250
Green (RoHS
& no Sb/Br)
-40 to 125
S375
S375
3500
Green (RoHS
& no Sb/Br)
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SM72375MM/NOPB
SM72375MME/NOPB
SM72375MMX/NOPB
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
8
8
8
1000
250
178.0
178.0
330.0
12.4
12.4
12.4
5.3
5.3
5.3
3.4
3.4
3.4
1.4
1.4
1.4
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
3500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SM72375MM/NOPB
SM72375MME/NOPB
SM72375MMX/NOPB
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
8
8
8
1000
250
210.0
210.0
367.0
185.0
185.0
367.0
35.0
35.0
35.0
3500
Pack Materials-Page 2
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