SN65LBC180 [TI]
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS; 低功耗差动线路驱动器和接收器对
| 型号： | SN65LBC180 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS |
| 文件： | 总15页 (文件大小：219K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
Designed for High-Speed Multipoint Data
Transmission Over Long Cables
D OR N PACKAGE
(TOP VIEW)
Operate With Pulse Durations as Low
as 30 ns
NC
V
V
A
B
Z
Y
1
2
3
4
5
6
7
14
13
12
11
10
9
CC
CC
R
RE
Low Supply Current . . . 5 mA Max
Meet or Exceed the Requirements of ANSI
Standard RS-485 and ISO 8482:1987(E)
DE
D
3-State Outputs for Party-Line Buses
GND
GND
8
NC
Common-Mode Voltage Range of
–7 V to 12 V
NC–No internal connection
Thermal Shutdown Protection Prevents
Driver Damage From Bus Contention
Function Tables
Positive and Negative Output Current
Limiting
DRIVER
INPUT
ENABLE
OUTPUTS
Pin Compatible With the SN75ALS180
D
H
L
DE
H
H
Y
H
L
Z
L
H
Z
description
X
L
Z
The SN65LBC180 and SN75LBC180 differential
driver and receiver pairs are monolithic integrated
circuits designed for bidirectional data
communication over long cables that take on the
characteristics of transmission lines. They are
balanced, or differential, voltage mode devices
that meet or exceed the requirements of industry
standards ANSI RS-485 and ISO 8482:1987(E).
Both devices are designed using TI’s proprietary
LinBiCMOS with the low power consumption of
CMOS and the precision and robustness of
bipolar transistors in the same circuit.
RECEIVER
DIFFERENTIAL INPUTS
A–B
ENABLE
OUTPUT
RE
L
L
L
H
L
R
H
?
L
Z
H
V
≥ 0.2 V
ID
–0.2 V < V < 0.2 V
ID
≤ – 0.2 V
X
V
ID
Open circuit
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
†
logic symbol
Both the SN65LBC180 and SN75LBC180
combine a differential line driver and receiver with
3-state outputs and operate from a single 5-V
supply. The driver and receiver have active-high
and active-low enables, respectively, which can
be externally connected to function as a direction
control. The driver differential outputs and the
receiver differential inputs are connected to
separate terminals for full-duplex operation and
are designed to present minimum loading to the
4
5
9
DE
D
EN1
Y
Z
1
1
10
3
2
12
11
RE
R
EN2
2
A
B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
bus whether disabled or powered off (V
= 0).
CC
4
These parts feature a wide common-mode
voltage range making them suitable for
point-to-point or multipoint data-bus applications.
DE
9
5
Y
Z
D
10
3
2
RE
12
11
A
B
R
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
description (continued)
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.
The SN65LBC180 and SN75LBC180 are available in the 14-pin dual-in-line and small-outline packages. The
SN75LBC180 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC180 is characterized over the industrial temperature range of –40°C to 85°C.
schematics of inputs and outputs
EQUIVALENT OF D, DE, AND RE INPUTS
RECEIVER A INPUT
V
CC
V
CC
100 kΩ
NOM
18 kΩ
3 kΩ
NOM
22 kΩ
NOM
Input
Input
12 kΩ
1.1 kΩ
NOM
DRIVER OUTPUT
TYPICAL OF RECEIVER OUTPUT
V
RECEIVER B INPUT
V
CC
CC
V
CC
3 kΩ
NOM
18 kΩ
NOM
Input
A Output
Output
100 kΩ
NOM
12 kΩ
1.1 kΩ
NOM
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
CC
Input voltage range, V (A, B)(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V
I
Voltage range at D, R, DE, RE (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
+ 0.5 V
CC
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : SN65LBC180 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
SN75LBC180 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. Themaximumoperatingjunctiontemperatureisinternallylimited. Usethedissipationratingtabletooperatebelowthistemperature.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D
N
950 mW
7.6 mW/°C
9.2 mW/°C
608 mW
736 mW
494 mW
598 mW
1150 mW
recommended operating conditions
MIN NOM
MAX
UNIT
Supply voltage, V
CC
4.75
2
5
5.25
V
V
V
V
V
High-level input voltage, V
IH
D, DE, and RE
Low-level input voltage, V
D, DE, and RE
0.8
6
IL
‡
‡
Differential input voltage, V
–6
ID
Voltage at any bus terminal (separately or common mode), V , V , or V
IC
A, B, Y, or Z
Y or Z
–7
12
–60
–8
60
8
O
I
High-level output current, I
mA
mA
°C
OH
R
Y or Z
Low-level output current, I
OL
R
SN65LBC180
SN75LBC180
–40
0
85
70
Operating free-air temperature, T
A
‡
The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the differential input
voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output voltage.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
DRIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
†
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
IK
I = –18 mA
–1.5
V
I
SN65LBC180
SN75LBC180
SN65LBC180
SN75LBC180
1.1
1.5
1.1
1.5
2.5
2.5
2
5
5
5
5
R
= 54 Ω,
L
See Figure 1
Differential output voltage magnitude
(see Note 3)
| V
|
V
OD
R
= 60 Ω,
L
See Figure 2
2
Change in magnitude of differential output
voltage (see Note 4)
∆| V
|
|
See Figures 1 and 2
±0.2
3
V
V
V
OD
OC
V
OC
Common-mode output voltage
1
2.5
R
= 54 Ω,
See Figure 1
Change in magnitude of common-mode output
voltage (see Note 4)
L
∆| V
±0.2
I
I
I
I
I
Output current with power off
High-impedance-state output current
High-level input current
V
V
= 0,
V = –7 V to 12 V
O
±100
±100
–100
–100
±250
5
µA
µA
µA
µA
mA
O
CC
= –7 V to 12 V
O
OZ
IH
IL
V = 2.4 V
I
Low-level input current
V = 0.4 V
I
Short-circuit output current
–7 V ≤ V ≤ 12 V
OS
O
Outputs enabled
Outputs disabled
I
Supply current
Receiver disabled
mA
CC
3
†
All typical values are at V
= 5 V and T = 25°C.
A
OD
CC
NOTES: 3. The minimum V
specification of the SN65LBC180 may not fully comply with ANSI RS-485 at operating temperatures below 0°C.
System designers should take the possibly lower output signal into account in determining the maximum signal-transmission
distance.
4. ∆|V
OD
| and ∆|V
OC
| are the changes in the steady-state magnitude of V
OD
and V
, respectively, that occur when the input is
OC
changed from a high level to a low level.
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 54 Ω, See Figure 3
MIN
7
TYP
12
MAX
18
UNIT
ns
t
t
t
t
t
t
Differential output delay time
d(OD)
t(OD)
PZH
PZL
R
L
Differential output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
5
10
20
ns
R
R
R
R
= 110 Ω,
= 110 Ω,
= 110 Ω,
= 110 Ω,
See Figure 4
See Figure 5
See Figure 4
See Figure 5
35
ns
L
L
L
L
35
ns
50
ns
PHZ
PLZ
35
ns
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
= –8 mA
MIN
TYP
MAX
UNIT
V
V
V
V
V
V
V
Positive-going input threshold voltage
Negative-going input threshold voltage
I
I
0.2
IT+
IT–
hys
IK
O
= 8 mA
–0.2
V
O
Hysteresis voltage (V
IT+
– V
)
45
mV
V
IT–
Enable-input clamp voltage
High-level output voltage
Low-level output voltage
I = –18 mA
–1.5
I
V
V
V
V
V
= 200 mV,
I
I
= –8 mA
= 8 mA
3.5
4.5
0.3
V
OH
OL
ID
ID
O
OH
= –200 mV,
0.5
±20
V
OL
I
I
I
High-impedance-state output current
High-level enable-input current
Low-level enable-input current
= 0 V to V
= 2.4 V
µA
µA
µA
OZ
CC
–50
IH
IL
IH
IL
= 0.4 V
–100
V = 12 V,
Other input at 0 V
V
CC
V
CC
V
CC
V
CC
= 5 V,
= 0 V,
= 5 V,
= 0 V,
I
0.7
0.8
1
1
V = 12 V,
I
Other input at 0 V
I
Bus input current
Supply current
mA
mA
I
V = –7 V,
I
Other input at 0 V
–0.5
–0.5
–0.8
–0.8
V = –7 V,
I
Other input at 0 V
Outputs enabled
Outputs disabled
5
3
I
Driver disabled
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
11
TYP
22
22
3
MAX
33
UNIT
ns
t
t
t
Propagation delay time, high- to low-level output
Propagation delay time, low- to high-level output
PHL
PLH
sk(p)
11
33
ns
V
ID
= –1.5 V to 1.5 V,
See Figure 6
Pulse skew (
t
– t
)
6
ns
PHL PLH
t
t
t
t
t
Transition time
5
8
35
30
35
30
ns
ns
ns
ns
ns
t
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
PZH
PZL
PHZ
PLZ
See Figure 7
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
Y
R
2
L
L
D
V
OD
0 V or 3 V
R
2
V
OC
DE at 3 V
Z
Figure 1. Differential and Common-Mode Output Voltages
V
test
–7 V < V
< 12 V
test
R1
375 Ω
Y
D
R
= 60 Ω
V
OD
L
0 V or 3 V
Z
DE at 3 V
R2
375 Ω
V
test
Figure 2. Driver V
Test Circuit
OD
3 V
Input
1.5 V
1.5 V
Y
0 V
C
= 50 pF
L
t
t
d(OD)
d(OD)
(see Note B)
≈ 2.5 V
90%
50%
10%
90%
Generator
(see Note A)
R
= 54 Ω
Output
L
50%
10%
Output
50 Ω
≈ – 2.5 V
Z
DE at 3 V
t
t
t(OD)
t(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
TEST CIRCUIT
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
3 V
Y
S1
1.5 V
1.5 V
D
Input
Output
0 V or 3 V
Z
0 V
0.5 V
t
PZH
DE
R
= 110 Ω
V
C
= 50 pF
L
OH
L
Input
Generator
(see Note A)
(see Note B)
Output
50 Ω
2.3 V
V
off
≈ 0
t
PHZ
VOLTAGE WAVEFORMS
TEST CIRCUIT
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms
5 V
3 V
0 V
1.5 V
1.5 V
Input
Y
Z
R
= 110 Ω
L
S1
D
Output
0 V or 3 V
t
PZL
C
= 50 pF
L
DE
t
PLZ
(see Note B)
Input
Generator
(see Note A)
5 V
50 Ω
0.5 V
2.3 V
Output
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
3 V
0 V
Input
t
1.5 V
1.5 V
Input
A
B
R
Generator
(see Note A)
t
Output
PLH
PHL
50 Ω
V
V
RE
1.5 V
OH
90%
1.3 V
10%
90%
C
= 15 pF
(see Note B)
L
1.3 V
10%
Output
0 V
OL
t
t
t
t
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
Output
S1
1.5 V
A
B
S2
R
2 kΩ
– 1.5 V
5 V
IN916 or Equivalent
(4 places)
RE
C = 15 pF
L
(see Note B)
5 kΩ
Input
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3 V
S1 to – 1.5 V
S2 Closed
S3 Open
3 V
S1 to 1.5 V
S2 Open
Input
Input
1.5 V
1.5 V
S3 Closed
0 V
0 V
t
PZH
t
PZL
V
OH
≈ 4.5 V
Output
Output
1.5 V
0 V
1.5 V
V
OL
3 V
3 V
0 V
S1 to – 1.5 V
S2 Closed
S3 Closed
S1 to 1.5 V
S2 Closed
S3 Closed
Input
Input
1.5 V
1.5 V
0 V
t
PHZ
t
PLZ
V
OH
≈ 1.3 V
Output
Output
0.5 V
≈ 1.3 V
V
OL
0.5 V
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 7. Receiver Output Enable and Disable Times
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
5
4.5
4
5
4.5
4
V
T
= 5 V
= 25°C
V
T
= 5 V
= 25°C
CC
A
CC
A
3.5
3.5
3
3
2.5
2.5
2
2
1.5
1.5
1
1
0.5
0
0.5
0
0
10 20 30 40 50 60 70 80 90 100
0
20
40
60
80
100
120
I
– High-Level Output Current – mA
I
– Low-Level Output Current – mA
OH
OL
Figure 8
Figure 9
DRIVER
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
4
3
V
T
A
= 5 V
= 25°C
CC
V
= 5 V
CC
3.5
3
Load = 54 Ω
V
IH
= 2 V
2.5
2
1.5
1
2.5
2
1.5
1
0.5
0
0.5
0
0
10 20 30 40 50 60 70 80 90 100
– 50
– 25
0
25
50
75
100
125
I
O
– Output Current – mA
T
A
– Free-Air Temperature – °C
Figure 10
Figure 11
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
OUTPUT CURRENT
vs
DIFFERENTIAL DELAY TIMES
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
80
60
20
15
10
R = 54 Ω
L
V
= 5 V
CC
Load = 54 Ω
t
d(ODL)
I
OL
40
20
t
d(ODH)
0
–20
–40
–60
–80
5
0
I
OH
– 50
– 25
0
25
50
75
100
125
0
1
2
3
4
5
6
T
A
– Free-Air Temperature – °C
V
CC
– Supply Voltage – V
Figure 12
Figure 13
RECEIVER
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
6
5
4
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
= 200 mV
ID
V
= 5 V
= 25°C
= – 200 mV
CC
T
A
V
ID
3
2
1
0
0
5
10
15
20
25
30
35
40
0
–10
– 20
– 30
– 40
– 50
I
– Low-Level Output Current – mA
OL
I
– High-Level Output Current – mA
OH
Figure 14
Figure 15
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
TYPICAL CHARACTERISTICS
RECEIVER
AVERAGE SUPPLY CURRENT
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
vs
FREQUENCY
60
55
50
45
40
35
30
25
6
5
T
V
= 25°C
A
= 5 V
CC
DRVR and RCVR Enabled
Driver Load = Receiver Inputs
Receiver Load = 50 pF
V
= 12 V
IC
4
3
2
V
IC
= 0 V
20
15
10
5
V
= –7 V
IC
1
0
0
10 k
– 80 – 60 – 40 – 20
0
20
40
60
80
100 k
1 M
10 M
100 M
f – Frequency – Hz
V
ID
– Differential Input Voltage – mV
Figure 16
Figure 17
RECEIVER
BUS INPUT CURRENT
vs
RECEIVER
PROPAGATION DELAY TIME
vs
INPUT VOLTAGE
FREE-AIR TEMPERATURE
(COMPLEMENTARY INPUT AT 0 V)
1
0.8
24.5
24
T
V
= 25°C
V
C
= 5 V
= 15 pF
= ±1.5 V
A
CC
L
= 5 V
CC
V
IO
0.6
0.4
t
PHL
0.2
23.5
23
0
– 0.2
– 0.4
– 0.6
– 0.8
– 1
t
PLH
22.5
22
The shaded region of this graph represents
more than 1 unit load per RS-485.
– 40 – 20
0
20
40
60
80
100
– 8 – 6 – 4 – 2
0
2
4
6
8
10 12
T
A
– Free-Air Temperature – °C
V – Input Voltage – V
I
Figure 18
Figure 19
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
APPLICATION INFORMATION
SN65LBC180
SN75LBC180
SN65LBC180
SN75LBC180
R
R
T
T
Up to 32
Unit Loads
• • •
NOTE A: The line should be terminated at both ends in its characteristic impedance (R = Z ). Stub lengths off the main line should be kept
T
O
as short as possible. One SN75LBC180 typically represents less than one unit load.
Figure 20. Typical Application Circuit
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.010 (0,25)
M
0.014 (0,35)
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
DIM
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MAX
A
16
9
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
A MIN
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.020 (0,51) MIN
0.310 (7,87)
0.290 (7,37)
0.035 (0,89) MAX
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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