SN74FB2040 [TI]
8-BIT TTL/BTL TRANSCEIVER; 8位TTL / BTL收发器
| 型号： | SN74FB2040 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-BIT TTL/BTL TRANSCEIVER |
| 文件： | 总7页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
Compatible With IEEE Std 1194.1-1991
(BTL)
High-Impedance State During Power Up
and Power Down
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
BIAS V
Pin Minimizes Signal Distortion
CC
During Live Insertion or Withdrawal
Open-Collector B-Port Outputs Sink
100 mA
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
Isolated Logic-Ground and Bus-Ground
Pins Reduce Noise
Packaged in Plastic Quad Flatpack
RC PACKAGE
(TOP VIEW)
52 51 50 49 48 47 46 45 44 43 42 41 40
1
39
38
37
36
35
34
33
32
31
30
29
28
27
GND
AI2
AI3
AO3
GND
AO4
GND
AI4
GND
B2
2
3
GND
B3
GND
B4
GND
B5
GND
B6
4
5
6
7
8
9
AI5
10
11
12
13
AO5
GND
AO6
GND
GND
B7
GND
14 15 16 17 18 19 20 21 22 23 24 25 26
description
The SN74FB2040 device is an 8-bit transceiver designed to translate signals between TTL and backplane
transceiver logic (BTL) environments.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active
and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or V
than 2.1 V, the B port is turned off.
is less
CC
The A port operates at TTL-signal levels and has separate input and output pins. The A outputs reflect the
inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when V
is less than 2.1 V, the A outputs are in the high-impedance state.
CC
Pins are allocated for the four-wire IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected and TDI
is shorted to TDO.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
description (continued)
BIAS V
establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when V
is not connected.
CC
CC
The SN74FB2040 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
FUNCTION
OEB
L
OEB
X
OEA
L
Isolation
X
H
L
L
X
H
B data to AO bus
X
H
H
H
L
L
AI data to B bus
H
L
H
AI data to B bus, B data to AO bus
†
logic symbol
46
OEB
G1
EN2
47
45
OEA
OEB
1EN3
2
50
40
38
36
34
32
30
28
26
1
1
AO1
B1
B2
51
52
3
AI1
AO2
2
4
AI2
AO3
B3
B4
B5
B6
3
6
AI3
AO4
8
AI4
10
AO5
9
AI5
12
AO6
14
16
AI6
AO7
B7
B8
18
20
AI7
AO8
24
AI8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
functional block diagram
46
45
47
51
OEB
OEB
OEA
AI1
40
B1
50
AO1
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V : Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 3.5 V
Voltage range applied to any B output in the disabled or power-off state, V . . . . . . . . . . . . . . –0.5 V to 3.5 V
O
Voltage range applied to any output in the high state, V : A port . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
CC
Input clamp current, I : Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 mA
IK
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Current applied to any single output in the low state, I : A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
O
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Package thermal impedance, θ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44°C/W
JA
stg
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 2)
MIN NOM
MAX
5.5
UNIT
V
, BIAS V
,
CC
CC
BG V
Supply voltage
4.5
5
V
CC
B port
1.62
2
2.3
V
High-level input voltage
Low-level input voltage
V
V
IH
IL
Except B port
B port
0.75
1.47
0.8
–18
–3
V
Except B port
I
I
Input clamp current
mA
mA
IK
High-level output current
AO port
AO port
B port
OH
OL
24
I
Low-level output current
mA
100
70
T
A
Operating free-air temperature
0
°C
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
B port
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
–0.5
UNIT
V
V
= MIN,
= MIN,
CC
I
V
V
V
IK
Except B port
I = –40 mA
I
CC
I
I
I
I
I
I
= –1 mA
= –3 mA
= 20 mA
= 24 mA
= 80 mA
= 100 mA
OH
OH
OL
OL
OL
OL
AO port
V
V
V
= MIN
= MIN
= MIN
V
V
OH
CC
CC
CC
2.5
3.3
AO port
B port
0.35
0.5
1.1
V
OL
0.75
1.15
50
I
I
Except B port
Except B port
Except B port
B port
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
V = 5.5 V
I
µA
µA
I
‡
V = 2.7 V
I
50
= 5.5 V,
IH
= 5.5 V,
V = 0.5 V
I
–50
–100
100
50
‡
µA
I
IL
V = 0.75 V
I
= 5.5 V,
I
I
I
I
I
I
B port
= 0 to 5.5 V,
= 5.5 V,
V
V
V
V
V
V
= 2.1 V
µA
µA
µA
µA
µA
mA
OH
O
O
O
O
O
O
AO port
= 2.7 V
OZH
OZL
AO port
= 5.5 V,
= 0.5 V
–50
50
A port
= 0 to 2.1 V,
= 2.1 V to 0,
= 5.5 V,
= 0.5 V to 2.7 V
= 0.5 V to 2.7 V
= 0
OZPU
OZPD
A port
–50
–180
§
AO port
–30
OS
AI port to B port
B port to AO port
AI port
40
70
3.5
3
I
V
= 5.5 V,
I = 0
O
mA
CC
CC
C
C
C
V = V
I
or GND
pF
pF
pF
i
CC
Control inputs
AO port
V
V
V
= V
or GND
6
o
io
O
CC
= 0 to 4.5 V
5
5
B port
CC
CC
per IEEE Std 1194.1-1991
= 4.5 V to 5.5 V
†
‡
§
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
= 5 V, T = 25°C.
A
IH IL
CC
live-insertion specifications over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
= 0 to 2 V,
I
MIN
MAX
450
10
UNIT
µA
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 0 to 4.5 V
= 4.5 to 5.5 V
= 0,
I
(BIAS V
)
V
V (BIAS V ) = 4.5 V to 5.5 V
CC
CC
CC
B
V
B port
V (BIAS V ) = 5 V
1.62
–1
2.1
V
O
I
CC
= 0 ,
V
B
= 1 V,
V (BIAS V ) = 4.5 V to 5.5 V
I CC
I
O
= 0 to 5.5 V,
= 0 to 2.2 V,
OEB = 0 to 0.8 V
OEB = 0 to 5 V
100
100
µA
B port
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
V
T
= 5 V,
= 25°C
CC
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
3.2
2.8
2.3
2.3
3.7
3.1
3.6
2.9
2.5
2.1
2.3
1.6
TYP
4.5
4.2
3.8
4.2
5.1
4.6
5.2
4.4
4
MAX
6
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
2.4
2.7
1.9
2
6.5
5.8
6.2
8.2
7
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(p)
sk(o)
r
AI
ns
ns
ns
ns
ns
ns
B
5.6
5.7
5.9
6.7
5.9
6.8
5.9
5.5
4.8
5.9
4.5
AO
B
3
OEB
B
3
6.1
7
3.3
2.6
2.1
2
OEB
OEA
B
6.1
5.8
5
AO
3.6
4.1
3.1
0.5
0.4
2.8
1.9
1.9
1.4
6.5
4.7
OEA
AO
Pulse skew, AI to B or B to AO
Pulse skew, AI to B or B to AO
Rise time, 1.3 V to 1.8 V, B port
Fall time, 1.8 V to 1.3 V, B port
ns
ns
ns
ns
ns
2
1
3.8
3
1.7
1
4.2
3.4
f
B-port input pulse rejection
1
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
PARAMETER MEASUREMENT INFORMATION
2.1 V
16.5 Ω
7 V
Open
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
C
= 50 pF
C = 30 pF
L
(see Note A)
L
500 Ω
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
LOAD CIRCUIT FOR B OUTPUTS
3 V
0 V
TEST
S1
Input
1.5 V
1.5 V
t
/t
Open
7 V
PLH PHL
/t
t
PLZ PZL
t
/t
Open
PHZ PZH
t
t
PLH
PHL
V
V
OH
3 V
0 V
Output
1.55 V
1.55 V
Output
Control
1.5 V
1.5 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (A TO B)
t
t
PLZ
PZL
Output
Waveform 1
S1 at 7 V
3.5 V
2 V
1 V
1.5 V
V
V
+ 0.3 V
Input
1.55 V
1.55 V
OL
V
(see Note B)
OL
OH
t
t
PHZ
PZH
t
t
PLH
PHL
Output
Waveform 2
S1 at Open
(see Note B)
V
V
V
OH
– 0.3 V
1.5 V
OH
Output
1.5 V
1.5 V
≈ 0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B TO A)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES (A PORT)
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns,
O
r
t ≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
f
O
r
f
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 1999, Texas Instruments Incorporated
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