SN74LVTH126PWR [TI]
3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS; 3.3 -V ABT翻两番总线缓冲器，三态输出
| 型号： | SN74LVTH126PWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS |
| 文件： | 总13页 (文件大小：330K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢋ
ꢀ
ꢁ
ꢌ
ꢃ
ꢍ ꢎꢍ ꢏꢅ ꢐꢑꢆ ꢒ ꢓꢐꢔꢕ ꢓꢖꢄ ꢗ ꢑꢓꢀ ꢑ ꢓꢘ ꢘꢗ ꢕ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢀ
ꢀ
ꢙ ꢚꢆ ꢇ ꢍ ꢏꢀꢆꢐꢆ ꢗ ꢛ ꢓꢆ ꢖꢓ ꢆ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
SN54LVTH126 . . . J OR W PACKAGE
SN74LVTH126 . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
)
CC
Support Unregulated Battery Operation
Down to 2.7 V
1OE
1A
1Y
2OE
2A
2Y
V
CC
4OE
1
2
3
4
5
6
7
14
13
12
11
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
4A
4Y
A
I
and Power-Up 3-State Support Hot
off
Insertion
10 3OE
3A
3Y
9
8
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
GND
D
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
SN54LVTH126 . . . FK PACKAGE
(TOP VIEW)
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
3
2
1
20 19
18 4A
− 1000-V Charged-Device Model (C101)
1Y
NC
4
5
6
7
8
17
16
15
14
NC
4Y
description/ordering information
2OE
NC
NC
3OE
These bus buffers are designed specifically for
2A
low-voltage (3.3-V) V
operation, but with the
CC
9 10 11 12 13
capability to provide a TTL interface to a 5-V
system environment.
The ’LVTH126 devices feature independent line
drivers with 3-state outputs. Each output is in the
high-impedance state when the associated
output-enable (OE) input is low.
NC − No internal connection
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74LVTH126D
SOIC − D
LVTH126
Tape and reel
Tape and reel
Tape and reel
Tube
SN74LVTH126DR
SN74LVTH126NSR
SN74LVTH126DBR
SN74LVTH126PW
SN74LVTH126PWR
SN74LVTH126DGVR
SNJ54LVTH126J
SNJ54LVTH126W
SNJ54LVTH126FK
SOP − NS
LVTH126
LXH126
SSOP − DB
−40°C to 85°C
−55°C to 125°C
TSSOP − PW
LXH126
Tape and reel
Tape and reel
Tube
TVSOP − DGV
CDIP − J
LXH126
SNJ54LVTH126J
SNJ54LVTH126W
SNJ54LVTH126FK
CFP − W
Tube
LCCC − FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
ꢓ ꢁ ꢄꢗꢀꢀ ꢛ ꢆꢇ ꢗꢕꢙ ꢚꢀ ꢗ ꢁ ꢛꢆꢗꢔ ꢜꢝ ꢞꢟ ꢠꢡꢢ ꢣꢤꢥ ꢦꢜ ꢢꢡ ꢦꢜꢧ ꢞꢦꢟ ꢖꢕ ꢛ ꢔ ꢓ ꢨꢆ ꢚꢛ ꢁ
ꢜ
ꢔ
ꢐ
ꢆ
ꢐ
ꢞ
ꢦ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢢ
ꢣ
ꢪ
ꢪ
ꢥ
ꢦ
ꢜ
ꢧ
ꢟ
ꢡ
ꢩ
ꢫ
ꢣ
ꢬ
ꢭ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢠ
ꢧ
ꢥ
ꢎ
ꢖ
ꢪ
ꢡ
ꢠ
ꢣ
ꢢ
ꢜ
ꢟ
ꢢ
ꢡ
ꢦ
ꢩ
ꢡ
ꢪ
ꢤ
ꢜ
ꢡ
ꢟ
ꢫ
ꢥ
ꢢ
ꢞ
ꢩ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢟ
ꢫ
ꢥ
ꢪ
ꢜ
ꢝ
ꢥ
ꢜ
ꢥ
ꢪ
ꢤ
ꢟ
ꢡ
ꢩ
ꢆ
ꢥ
ꢮ
ꢧ
ꢟ
ꢚ
ꢦ
ꢟ
ꢜ
ꢪ
ꢣ
ꢤ
ꢥ
ꢦ
ꢜ
ꢟ
ꢟ
ꢜ
ꢧ
ꢦ
ꢠ
ꢧ
ꢪ
ꢠ
ꢯ
ꢧ
ꢪ
ꢪ
ꢧ
ꢦ
ꢜ
ꢰ
ꢎ
ꢖ
ꢪ
ꢡ
ꢠ
ꢣ
ꢢ
ꢜ
ꢞ
ꢡ
ꢦ
ꢫꢧ ꢪ ꢧ ꢤ ꢥ ꢜ ꢥ ꢪ ꢟ ꢎ
ꢫ
ꢪ
ꢡ
ꢢ
ꢥ
ꢟ
ꢟ
ꢞ
ꢦ
ꢱ
ꢠ
ꢡ
ꢥ
ꢟ
ꢦ
ꢡ
ꢜ
ꢦ
ꢥ
ꢢ
ꢥ
ꢟ
ꢟ
ꢧ
ꢪ
ꢞ
ꢭ
ꢰ
ꢞ
ꢦ
ꢢ
ꢭ
ꢣ
ꢠ
ꢥ
ꢜ
ꢥ
ꢟ
ꢜ
ꢞ
ꢦ
ꢱ
ꢡ
ꢩ
ꢧ
ꢭ
ꢭ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢍ
ꢂ
ꢃ
ꢄ
ꢐ
ꢍ
ꢅ
ꢑ
ꢏ
ꢆ
ꢆ
ꢀ
ꢇ
ꢒ
ꢆꢐ
ꢈ
ꢉ
ꢓ
ꢊ
ꢐ
ꢗ
ꢋ
ꢀ
ꢔ
ꢛ
ꢁ
ꢕ
ꢓ
ꢌ
ꢓ
ꢆ
ꢃ
ꢖ
ꢖ
ꢄ
ꢄ
ꢓ
ꢅ
ꢗ
ꢆ
ꢆ
ꢇ
ꢑ
ꢈ
ꢓ
ꢉ
ꢀ
ꢊ
ꢍ
ꢎ
ꢏ
ꢅ
ꢑ
ꢓ
ꢘ
ꢘ
ꢗ
ꢕ
ꢀ
ꢙ
ꢚ
ꢆ
ꢇ
ꢆ
ꢀ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
description/ordering information (continued)
When V
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown
resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
H
H
L
H
L
X
Z
logic diagram (positive logic)
1
10
1OE
3OE
3A
2
3
9
8
1A
1Y
2Y
3Y
4Y
4
13
12
2OE
4OE
4A
5
6
11
2A
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢋ
ꢀ
ꢁ
ꢌ
ꢃ
ꢍ ꢎꢍ ꢏꢅ ꢐꢑꢆ ꢒ ꢓꢐꢔꢕ ꢓꢖꢄ ꢗ ꢑꢓꢀ ꢑ ꢓꢘ ꢘꢗ ꢕ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢀ
ꢀ
ꢙ ꢚꢆ ꢇ ꢍ ꢏꢀꢆꢐꢆ ꢗ ꢛ ꢓꢆ ꢖ ꢓꢆ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Current into any output in the low state, I : SN54LVTH126 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74LVTH126 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the high state, I (see Note 2): SN54LVTH126 . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
O
SN74LVTH126 . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V > V
.
CC
O
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54LVTH126 SN74LVTH126
UNIT
MIN
2.7
2
MAX
MIN
2.7
2
MAX
V
V
V
V
Supply voltage
3.6
3.6
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
5.5
−24
48
0.8
5.5
−32
64
V
IL
V
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
mA
mA
ns/V
µs/V
°C
OH
OL
I
∆t/∆v
∆t/∆V
Outputs enabled
10
10
200
−55
200
−40
CC
T
A
Operating free-air temperature
125
85
NOTE 4: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
ꢖ
ꢕ
ꢛ
ꢔ
ꢓ
ꢨ
ꢆ
ꢖ
ꢕ
ꢗ
ꢅ
ꢚ
ꢗ
ꢙ
ꢞ
ꢦ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢢ
ꢡ
ꢦ
ꢢ
ꢥ
ꢪ
ꢦ
ꢟ
ꢫ
ꢪ
ꢡ
ꢠ
ꢣ
ꢠꢥ ꢟ ꢞ ꢱꢦ ꢫꢝ ꢧ ꢟ ꢥ ꢡꢩ ꢠꢥ ꢲ ꢥ ꢭꢡ ꢫꢤꢥ ꢦꢜꢎ ꢨ ꢝꢧ ꢪꢧ ꢢꢜ ꢥꢪ ꢞꢟ ꢜꢞ ꢢ ꢠꢧ ꢜꢧ ꢧꢦ ꢠ ꢡꢜ ꢝꢥꢪ
ꢢ
ꢜ
ꢟ
ꢞ
ꢦ
ꢜ
ꢝ
ꢥ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢲ
ꢥ
ꢡ
ꢪ
ꢟ
ꢫ
ꢥ
ꢢ
ꢞ
ꢩ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢟ
ꢧ
ꢪ
ꢥ
ꢠ
ꢥ
ꢟ
ꢞ
ꢱ
ꢦ
ꢱ
ꢡ
ꢧ
ꢭ
ꢟ
ꢎ
ꢆ
ꢥ
ꢮ
ꢧ
ꢟ
ꢚ
ꢦ
ꢟ
ꢜ
ꢪ
ꢣ
ꢤ
ꢥ
ꢦ
ꢢ ꢝꢧ ꢦ ꢱꢥ ꢡꢪ ꢠꢞ ꢟ ꢢ ꢡꢦ ꢜꢞ ꢦꢣꢥ ꢜ ꢝꢥ ꢟ ꢥ ꢫꢪ ꢡꢠ ꢣꢢꢜ ꢟ ꢯ ꢞꢜꢝ ꢡꢣꢜ ꢦꢡꢜ ꢞꢢꢥ ꢎ
ꢜ
ꢟ
ꢪ
ꢥ
ꢟ
ꢥ
ꢪ
ꢲ
ꢥꢟ
ꢜ
ꢝ
ꢥ
ꢪ
ꢞ
ꢱ
ꢝ
ꢜ
ꢜ
ꢡ
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢍ
ꢂ
ꢃ
ꢄ
ꢐ
ꢍ
ꢅ
ꢑ
ꢏ
ꢆ
ꢆ
ꢀ
ꢇ
ꢒ
ꢆꢐ
ꢈ
ꢉ
ꢓ
ꢊ
ꢐ
ꢗ
ꢋ
ꢀ
ꢔ
ꢛ
ꢁ
ꢕ
ꢓ
ꢌ
ꢓ
ꢆ
ꢃ
ꢖ
ꢖ
ꢄ
ꢄ
ꢓ
ꢅ
ꢗ
ꢆ
ꢆ
ꢇ
ꢑ
ꢈ
ꢓ
ꢉ
ꢀ
ꢊ
ꢍ
ꢎ
ꢏ
ꢅ
ꢑ
ꢓ
ꢘꢘ
ꢗꢕ
ꢀ
ꢙ
ꢚ
ꢆ
ꢇ
ꢆ
ꢀ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVTH126
SN74LVTH126
PARAMETER
TEST CONDITIONS
I = −18 mA
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
V
= 2.7 V,
−1.2
−1.2
V
IK
CC
CC
CC
I
= 2.7 V to 3.6 V,
= 2.7 V,
I
I
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −24 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 48 mA
= 64 mA
V
−0.2
CC
2.4
V
−0.2
CC
2.4
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
V
V
OH
2
V
= 3 V
CC
CC
2
0.2
0.5
0.2
0.5
0.4
0.5
V
= 2.7 V
0.4
V
OL
0.5
V
CC
= 3 V
0.55
0.55
10
1
V
V
= 0 or 3.6 V,
= 3.6 V,
V = 5.5 V
10
1
CC
I
Control inputs
Data inputs
V = V
or GND
CC
I
CC
I
I
µA
V = V
1
1
I
CC
V
V
= 3.6 V
= 0,
CC
V = 0
I
−5
−5
100
I
I
V or V = 0 to 4.5 V
µA
µA
off
CC
I
O
V = 0.8 V
I
75
75
V
CC
= 3 V
V = 2 V
I
−75
−75
Data inputs
I(hold)
‡
V
V
V
V
= 3.6 V ,
V = 0 to 3.6 V
500
5
CC
CC
CC
CC
I
I
I
= 3.6 V,
= 3.6 V,
V
O
V
O
= 3 V
5
µA
µA
OZH
= 0.5 V
−5
−5
OZL
= 0 to 1.5 V, V = 0.5 V to 3 V,
OE = don’t care
O
∗
50
50
50
50
µA
µA
I
OZPU
OZPD
V
= 1.5 V to 0, V = 0.5 V to 3 V,
CC
OE = don’t care
O
∗
I
Outputs high
Outputs low
0.12
4.5
0.19
7
0.12
4.5
0.19
7
V
I
= 3.6 V,
CC
= 0,
I
mA
mA
O
CC
V = V
I
or GND
CC
Outputs disabled
0.12
0.19
0.12
0.19
V
= 3 V to 3.6 V, One input at V − 0.6 V,
CC
CC
Other inputs at V
§
0.3
0.2
∆I
CC
or GND
CC
C
C
V = 3 V or 0
4
4
pF
pF
i
I
V
O
= 3 V or 0
6.5
6.5
o
∗
†
‡
§
On products compliant to MIL-PRF-38535, this parameter is not production tested.
All typical values are at V = 3.3 V, T = 25°C.
CC
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.
A
CC
ꢖ
ꢕ
ꢛ
ꢔ
ꢓ
ꢨ
ꢆ
ꢖ
ꢕ
ꢗ
ꢅ
ꢚ
ꢗ
ꢙ
ꢞ
ꢦ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢢ
ꢡ
ꢦ
ꢢ
ꢥ
ꢪ
ꢦ
ꢟ
ꢫ
ꢪ
ꢡ
ꢠ
ꢣ
ꢢ
ꢠ ꢥ ꢟ ꢞ ꢱ ꢦ ꢫꢝ ꢧ ꢟ ꢥ ꢡꢩ ꢠꢥ ꢲ ꢥ ꢭ ꢡꢫ ꢤꢥ ꢦ ꢜꢎ ꢨ ꢝꢧ ꢪꢧ ꢢꢜ ꢥꢪ ꢞꢟ ꢜꢞ ꢢ ꢠꢧ ꢜꢧ ꢧꢦ ꢠ ꢡꢜ ꢝꢥꢪ
ꢜ
ꢟ
ꢞ
ꢦ
ꢜ
ꢝ
ꢥ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢲ
ꢥ
ꢡ
ꢪ
ꢟ
ꢫ
ꢥ
ꢢ
ꢞ
ꢩ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢟ
ꢧ
ꢪ
ꢥ
ꢠ
ꢥ
ꢟ
ꢞ
ꢱ
ꢦ
ꢱ
ꢡ
ꢧ
ꢭ
ꢟ
ꢎ
ꢆ
ꢥ
ꢮ
ꢧ
ꢟ
ꢚ
ꢦ
ꢟ
ꢜ
ꢪ
ꢣ
ꢤ
ꢥ
ꢦ
ꢢ ꢝ ꢧ ꢦ ꢱꢥ ꢡꢪ ꢠꢞ ꢟ ꢢ ꢡꢦ ꢜꢞ ꢦꢣ ꢥ ꢜ ꢝꢥ ꢟ ꢥ ꢫꢪ ꢡ ꢠꢣꢢ ꢜꢟ ꢯ ꢞꢜꢝ ꢡꢣꢜ ꢦꢡꢜ ꢞꢢꢥ ꢎ
ꢜ
ꢟ
ꢪ
ꢥ
ꢟ
ꢥ
ꢪ
ꢲ
ꢥ
ꢟ
ꢜ
ꢝ
ꢥ
ꢪ
ꢞ
ꢱ
ꢝ
ꢜ
ꢜ
ꢡ
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢋ
ꢀ
ꢁ
ꢌ
ꢃ
ꢍ ꢎꢍ ꢏꢅ ꢐꢑꢆ ꢒ ꢓꢐꢔꢕ ꢓꢖꢄ ꢗ ꢑꢓꢀ ꢑ ꢓꢘ ꢘꢗ ꢕ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢀ
ꢀ
ꢙ
ꢚ
ꢆ
ꢇ
ꢍ
ꢏ
ꢀ
ꢆ
ꢐ
ꢆ
ꢗ
ꢛ
ꢓ
ꢆ
ꢖ
ꢓ
ꢆ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
SN54LVTH126
= 3.3 V
SN74LVTH126
V
CC
V
CC
= 3.3 V
V
FROM
(INPUT)
TO
(OUTPUT)
V
= 2.7 V
= 2.7 V
PARAMETER
UNIT
CC
CC
0.3 V
0.3 V
†
MIN
MAX
4.8
4.9
6.4
6.2
4.8
6.5
MIN
MAX
5.5
5.4
7.1
6.8
5.3
7.1
MIN TYP
MAX
3.8
3.9
5.4
5.2
3.8
5.5
MIN
MAX
4.5
4.4
6.1
5.8
4.3
6.1
t
t
t
t
t
t
1
1
1
1
2.3
2.4
3.6
3.6
2.2
3.6
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
1
1
OE
OE
1.1
1
1.1
1
1.3
1.3
†
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
ꢖ
ꢕ
ꢛ
ꢔ
ꢓ
ꢨ
ꢆ
ꢖ
ꢕ
ꢗ
ꢅ
ꢚ
ꢗ
ꢙ
ꢞ
ꢦ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢢ
ꢡ
ꢦ
ꢢ
ꢥ
ꢪ
ꢦ
ꢟ
ꢫ
ꢪ
ꢡ
ꢠ
ꢣ
ꢠꢥ ꢟ ꢞ ꢱꢦ ꢫꢝ ꢧ ꢟ ꢥ ꢡꢩ ꢠꢥ ꢲ ꢥ ꢭꢡ ꢫꢤꢥ ꢦꢜꢎ ꢨ ꢝꢧ ꢪꢧ ꢢꢜ ꢥꢪ ꢞꢟ ꢜꢞ ꢢ ꢠꢧ ꢜꢧ ꢧꢦ ꢠ ꢡꢜ ꢝꢥꢪ
ꢢ
ꢜ
ꢟ
ꢞ
ꢦ
ꢜ
ꢝ
ꢥ
ꢩ
ꢡ
ꢪ
ꢤ
ꢧ
ꢜ
ꢞ
ꢲ
ꢥ
ꢡ
ꢪ
ꢟ
ꢫ
ꢥ
ꢢ
ꢞ
ꢩ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢟ
ꢧ
ꢪ
ꢥ
ꢠ
ꢥ
ꢟ
ꢞ
ꢱ
ꢦ
ꢱ
ꢡ
ꢧ
ꢭ
ꢟ
ꢎ
ꢆ
ꢥ
ꢮ
ꢧ
ꢟ
ꢚ
ꢦ
ꢟ
ꢜ
ꢪ
ꢣ
ꢤ
ꢥ
ꢦ
ꢢ ꢝꢧ ꢦ ꢱꢥ ꢡꢪ ꢠꢞ ꢟ ꢢ ꢡꢦ ꢜꢞ ꢦꢣꢥ ꢜ ꢝꢥ ꢟ ꢥ ꢫꢪ ꢡꢠ ꢣꢢꢜ ꢟ ꢯ ꢞꢜꢝ ꢡꢣꢜ ꢦꢡꢜ ꢞꢢꢥ ꢎ
ꢜ
ꢟ
ꢪ
ꢥ
ꢟ
ꢥ
ꢪ
ꢲ
ꢥ
ꢟ
ꢜ
ꢝ
ꢥ
ꢪ
ꢞ
ꢱ
ꢝ
ꢜ
ꢜ
ꢡ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢍ
ꢂ
ꢃ
ꢄ
ꢐ
ꢍ
ꢅ
ꢑ
ꢏ
ꢆ
ꢆ
ꢀ
ꢇ
ꢒ
ꢆꢐ
ꢈ
ꢉ
ꢓ
ꢊ
ꢐ
ꢗ
ꢋ
ꢀ
ꢔ
ꢛ
ꢁ
ꢕ
ꢓ
ꢌ
ꢓ
ꢆ
ꢃ
ꢖ
ꢖ
ꢄ
ꢄ
ꢓ
ꢅ
ꢗ
ꢆ
ꢆ
ꢇ
ꢑ
ꢈ
ꢓ
ꢉ
ꢀ
ꢊ
ꢍ
ꢎ
ꢏ
ꢅ
ꢑ
ꢓ
ꢘ
ꢘ
ꢗꢕ
ꢀ
ꢙ
ꢚ
ꢆ
ꢇ
ꢆ
ꢀ
SCBS746B − JULY 2000 - REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
6 V
TEST
S1
S1
Open
GND
500 Ω
From Output
Under Test
t
/t
PLH PHL
Open
6 V
t
/t
PLZ PZL
C
= 50 pF
t
/t
GND
L
PHZ PZH
500 Ω
(see Note A)
2.7 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
PLZ
PZL
t
t
t
PHL
PLH
PHL
Output
Waveform 1
S1 at 6 V
3 V
V
V
OH
1.5 V
1.5 V
1.5 V
1.5 V
t
Output
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
t
PZH
PHZ
PLH
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
SN74LVTH126D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
14
14
14
14
14
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74LVTH126DBR
SN74LVTH126DGVR
SN74LVTH126DR
SN74LVTH126NSR
SN74LVTH126PW
SN74LVTH126PWR
SSOP
TVSOP
SOIC
DB
DGV
D
2000
2000
2500
2000
90
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SO
NS
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TSSOP
TSSOP
PW
PW
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明