SN7534051NSRE4 [TI]
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS; 双路差动驱动器和接收
| 型号： | SN7534051NSRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL DIFFERENTIAL DRIVERS AND RECEIVERS |
| 文件： | 总16页 (文件大小：472K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN7534050, SN7534051
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
FEATURES
•
Meet or Exceed Standards TIA/EIA-422-B and
ITU Recommendation V.11
•
•
•
•
Receiver Input Sensitivity: ±200mV
Receiver Input Impedance: 12 kΩ Min
Driver 3-State Outputs
•
•
Operate From Single 5-V Power Supply
Driver Positive and Negative Current Limiting
Receiver 3-State Outputs (SN7534050 Only)
SN7534050...N OR NS PACKAGE
(TOP VIEW)
SN7534051...N OR NS PACKAGE
(TOP VIEW)
VCC
1D
1Y
1Z
VCC
1D
1Y
1B
1A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1
2
3
4
5
6
7
8
16
15
14
13
1R
1R
1Z
RE
2R
1DE
2R
DE
2Z
12 2DE
11
10
9
2Z
2Y
2D
2A
2A
2Y
2D
2B
2B
GND
GND
DESCRIPTION/ORDERING INFORMATION
The SN7534050 and SN7534051 dual differential drivers and receivers are monolithic integrated circuits
designed to meet the requirements of ANSI standards TIA/EIA-422-B and ITU Recommendations V.11.
The driver outputs provide limiting for both positive and negative currents and thermal shutdown protection from
line fault conditions on transmission bus line.
The SN7534050 combines dual 3-state differential drivers and dual 3-state differential input receivers. The
drivers and receivers have active-high and active-low enables, respectively which can be externally connected
together to function as direction control. SN7534051 drivers each have an individual active-high enable.
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
SN7534050N
TOP-SIDE MARKING
SN7534050N
SN7534050
PDIP – N
SOP – NS
PDIP – N
SOP – NS
Tube of 25
Reel of 1000
Reel of 2000
Tube of 25
SN7534050NS
SN7534050NSR
SN7534051N
SN7534050
–20°C to 85°C
SN7534051N
SN7534051
Reel of 1000
Reel of 2000
SN7534051NS
SN7534051NSR
SN7534051
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN7534050, SN7534051
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
FUNCTION TABLES
SN7534050, SN7534051
Each Driver(1)
OUTPUTS
INPUT ENABLE
D
DE
Y
H
L
Z
L
H
L
H
H
L
H
Z
X
Z
(1) H = high level, L = low level,
X = irrelevant, Z = high
impedance (off)
SN7534050
Each Receiver(1)
DIFFERENTIAL
ENABLE
OUTPUT
R
INPUTS,
A–B
RE
V
ID ≥ 0.2 V
L
L
H
?
L
Z
–0.2 V < VID < 0.2 V
VID ≤ – 0.2 V
L
X
H
(1) H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
SN7534051
Each Receiver(1)
DIFFERENTIAL
OUTPUT
INPUTS,
R
A–B
V
ID ≥ 0.2 V
–0.2 V < VID < 0.2 V
ID ≤ – 0.2 V
H
?
L
V
(1) H = high level, L = low level,
? = indeterminate
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SN7534050, SN7534051
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
LOGIC DIAGRAMS
SN7534050
SN7534051
4
12
1DE
DE
14
15
1Y
1Z
1D
13
4
RE
2
1
3
1A
1B
1R
2DE
2D
14
13
12
9
15
1Y
1Z
1D
10
11
2Y
2Z
2
1
3
1A
1B
1R
6
7
5
2A
2B
2R
10
11
9
2Y
2Z
2D
6
7
5
2A
2B
2R
SCHEMATIC OF INPUTS
EQUIVALENT OF DRIVER OR ENABLE INPUT
EQUIVALENT OF RECEIVER INPUT
VCC
VCC
R(eq)
Input
16.8 kΩ
NOM
960 Ω
NOM
Input
960 Ω
NOM
Driver input: R(eq) = 6 kΩ nom
Enable input: R(eq) = 4 kΩ nom
R(eq) = equivalent resistor
All resistor values are nominal.
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SN7534050, SN7534051
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
SCHEMATIC OF OUTPUTS
TYPICAL OF ALL DRIVER OUTPUTS
VCC
TYPICAL OF ALL RECEIVER OUTPUTS
VCC
85 Ω
Nom
Output
GND
Output
All resistor values are nominal.
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VI
Supply voltage(2)
7
7
V
V
Input voltage
DE, RE, D inputs
Vi
Receiver input voltage
A or B inputs
±25
±25
15
V
VID
VO
IOL
Receiver differential output voltage(3)
Driver output voltage range
Receiver low-level output current
V
–10
V
50
mA
N package
66
θJA
Package thermal impedance(4)
°C/W
NS package
68
Operating free-air temperature range
Storage temperature range
–20
–65
85
°C
°C
°C
Tstg
150
260
Lead temperature, 1.6 mm (1/16 in) from case for 10 s
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages, except differential input voltage, are with respect to the network GND.
(3) Differential input voltage is measured at the noninverting terminal, with respect to the inverting terminal.
(4) The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length
of zero.
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SN7534050, SN7534051
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
Recommended Operating Conditions
MIN
4.75
2
NOM
MAX
UNIT
V5.25
VCC
VIH
VIL
Supply voltage
5
High-level input voltage
Low-level input voltage
Common-mode input voltage(1)
Differential input voltage
V
V
DE, RE, D
0.8
±7
VIC
VID
Receiver
Receiver
Driver
V
±12
40
V
mA
µA
IOH
High-level output current
Receiver
Driver
–400
–40
16
IOL
TA
Low-level output current
mA
Receiver
Operating free-air temperature
–20
85
°C
(1) Refer to TIA/EIA-422-B for exact conditions.
DRIVER SECTION
Electrical Characteristics
over recommended supply voltage and operating free-air temperature range (unless otherwise noted)
PARAMETER
High-level output voltage
Low-level output voltage
Differential output voltage
Differential output voltage(2)
TEST CONDITIONS
VIH = 2 V, VIL = 0.8 V, IOH = –20 mA
VIH = 2 V, VIL = 0.8 V, IOL = 20 mA
IO = 0 mA
MIN TYP(1)
MAX UNIT
VOH
VOL
3.7
V
V
1.1
VOD1
VOD2
1.5
2
6
V
V
RL = 100 Ω,
RL = 100 Ω,
RL = 100 Ω,
RL = 100 Ω,
See Figure 1
See Figure 1
See Figure 1
See Figure 1
Change in magnitude of
∆VOD
VOC
±0.4
±3
V
V
V
differential output voltage(2)
Common-mode output voltage(2)
Change in magnitude of
∆VOC
±0.4
differential common-mode voltage(2)
VO = 6 V
100
–100
±100
20
Ioff
Output current with power off(2)
VCC = 0 V
µA
VO = –0.25 V
IOZ
IIH
High-impedance-state output current
High-level input current
VO = –0.25 V to 6 V
VI = 2.7 V
µA
µA
µA
mA
IIL
Low-level input current
Short-circuit output current(2)(3)
VI = 0.4 V
–100
–150
110
IOS
VO = VCC or GND
–30
Output enabled
Output disabled
80
ICC
Supply current (total package)
No load
mA
50
80
(1) All typical values are at VCC = 5 V and TA = 25°C.
(2) Refer to TIA-EIA-422-B for exact conditions.
(3) Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
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DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
Switching Characteristics
VCC = 5 V, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
20
27
20
20
80
40
90
30
MAX UNIT
td(OD) Differential output delay time
RL = 100 Ω, CL = 50 pF, See Figure 3
RL = 100 Ω, CL = 50 pF, See Figure 3
25
35
ns
ns
ns
ns
ns
ns
ns
ns
tt(OD)
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Differential output transition time
Propagation delay time, low- to high-level output RL = 27 Ω, See Figure 4
Propagation delay time, high- to low-level output RL = 27 Ω, See Figure 4
25
25
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
RL = 110 Ω, See Figure 5
RL = 110 Ω, See Figure 6
RL = 110 Ω, See Figure 5
RL = 110 Ω, See Figure 6
120
60
120
45
RECEIVER SECTION
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
VIT+ Positive-going input threshold voltage, differential input
0.2
V
Negative-going input threshold voltage, differential
input
VIT–
–0.2(2)
V
Vhys Input hysteresis (VIT+ – VIT–
)
50
mV
V
VIK Input clamp voltage, RE
SN7534050 II = –18 mA
–1.5
VID = 200 mV,
IOH = –400 µA,
VOH High-level output voltage
VOL Low-level output voltage
See Figure 2
2.7
V
IOL = 8 mA
0.45
0.5
VID = –200 mV,
See Figure 2
V
IOL = 16 mA
IOZ
II
High-impedance-state output current
Line input current
SN7534050 VO = 0.4 V to 2.4 V
Other input at 0 V
±20
1.5
µA
mA
VI = 10 V
VI = –10 V
–2.5
20
IIH
IIL
High-level enable input current, RE
Low-level enable input current, RE
Input resistance
SN7534050 VIH = 2.7 V
SN7534050 VIL = 0.4 V
µA
µA
kΩ
–100
rI
12
IOS
ICC
Short circuit output current
Supply current (total package)
–15
–85 mA
110 mA
No load, enabled
80
(1) All typical values are at VCC = 5 V and TA = 25°C.
(2) The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for
common-mode input voltage and threshold voltage levels.
Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VID = 1.5 V, CL = 15 pF,
See Figure 7
tPLH Propagation delay time, low- to high-level output
20
35
35
ns
ns
VID = 1.5 V, CL = 15 pF,
See Figure 7
tPHL Propagation delay time, high- to low-level output
22
tPZH Output enable time to high level
tPZL Output enable time to low level
tPHZ Output disable time from high level
tPLZ Output disable time from low level
SN7534050
CL = 15 pF, see Figure 8
CL = 15 pF, See Figure 8
CL = 15 pF, See Figure 8
CL = 15 pF, See Figure 8
17
20
25
30
25
27
40
40
ns
ns
ns
ns
SN7534050
SN7534050
SN7534050
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DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
PARAMETER MEASUREMENT INFORMATION
RL
2
VOD2
RL
2
VOC
Figure 1. Driver Test Circuit,
VOD and VOC
VID
IOH
VOH
IOL
VOL
Figure 2. Receiver Test Circuit,
VOH and VOL
3 V
Input
(see Note A)
1.5 V
1.5 V
0 V
t
t
Y
Output
Z
d(OD)
d(OD)
~
~
2.5 V
90% 90%
Input
(see Note B)
50%
10%
50%
10%
R
C = 50 pF
Differential
Output
L
L
~
~
–2.5 V
(see Note A)
t
t
t(OD)
t(OD)
TEST CIRCUIT
A. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 3. Driver Test Circuit and Voltage Waveforms,
td(OD) and tt(OD)
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DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
PARAMETER MEASUREMENT INFORMATION (continued)
3 V
0 V
1.5 V
1.5 V
2.3 V
Input
(see Note A)
t
t
PHL
PLH
V
OH
R
= 27 Ω
L
2.3 V
2.3 V
V
Y
Z
OL
Output
Input
(see Note B)
V
C = 50 pF
L
OH
2.3 V
2.3 V
(see Note A)
V
OL
t
t
PHL
PLH
TEST CIRCUIT
A. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 4. Driver Test Circuit and Voltage Waveforms,
tPLH and tPHL
3 V
0 V
1.5 V 1.5 V
Output
0 V or 3 V
Input DE
Output
t
C = 50 pF
L
t
PHZ
PZH
Pulse
Generator
DE
R
= 110 Ω
L
(see Note A)
V
OH
2.3 V
(see Note B)
50 Ω
0.5 V
GND
TEST CIRCUIT
A. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 5. Driver Test Circuit and Voltage Waveforms,
tPZH and tPHZ
5 V
R
= 110 Ω
L
3 V
1.5 V 1.5 V
Input DE
Output
Output
0 V or 3 V
0 V
t
t
PLZ
PZL
C = 50 pF
L
Pulse
Generator
DE
5 V
V
(see Note A)
2.3 V
(see Note B)
50 Ω
OL
0.5 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 6. Driver Test Circuit and Voltage Waveforms,
tPZL and tPLZ
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DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
www.ti.com
SLLS833–MAY 2007
PARAMETER MEASUREMENT INFORMATION (continued)
1.5 V
Pulse
Generator
0 V
0 V
Input
–1.5 V
t
t
PLH
PHL
50 Ω
0 V
(see Note B)
V
OH
C = 15 pF
L
(see Note A)
1.3 V
1.3 V
Output
V
OL
TEST CIRCUIT
A. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 7. Receiver Test Circuit and Voltage Waveforms,
tPLH and tPHL
S1
1.5 V
S2
2 kΩ
5 V
–1.5 V
C
= 15 pF
L
5 kΩ
1N916 or Equivalent
(see Note A)
Generator
(see Note B)
50 Ω
S3
TEST CIRCUIT
3 V
3 V
1.5 V
1.5 V
0 V
Input
Input
t
0 V
PZL
S1 to 1.5 V
S3 Closed
S2 Open
S1 to –1.5 V
S3 Closed
S2 Open
~
t
~
4.5 V
1.5 V
PZH
Output
Output
V
OH
V
OL
1.5 V
0 V
3 V
0 V
3 V
1.5 V
Input
1.5 V
Input
S1 to 1.5 V
S2 Closed
S3 Closed
t
0 V
PHZ
S1 to –1.5 V
S3 Closed
S2 Closed
t
PLZ
Output
~
~
1.3 V
Output
V
OH
0.5 V
V
OL
~
~
1.3 V
0.5 V
VOLTAGE WAVEFORMS
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr = tr≤ 6 ns.
Figure 8. Receiver Test Circuit and Voltage Waveforms,
tPZH, tPZL, tPHZ, tPLZ (SN7534050)
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PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
SN7534050N
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN7534050NE4
SN7534050NS
PDIP
SO
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
NS
NS
NS
N
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN7534050NSE4
SN7534050NSG4
SN7534050NSR
SN7534050NSRE4
SN7534050NSRG4
SN7534051N
SO
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
PDIP
SO
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN7534051NE4
SN7534051NS
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
NS
NS
NS
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN7534051NSE4
SN7534051NSG4
SN7534051NSR
SN7534051NSRE4
SN7534051NSRG4
SO
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
SN7534050NSR
SN7534051NSR
NS
NS
16
16
SITE 41
SITE 41
8.2
8.2
10.5
10.5
2.5
2.5
12
12
16
16
Q1
Q1
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN7534050NSR
SN7534051NSR
NS
NS
16
16
SITE 41
SITE 41
346.0
346.0
346.0
346.0
33.0
33.0
Pack Materials-Page 2
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