TLV61046A [TI]

具有功率二极管和隔离开关的 28V 输出电压升压转换器;


型号：	TLV61046A
厂家：	TEXAS INSTRUMENTS
描述：	具有功率二极管和隔离开关的 28V 输出电压升压转换器升压转换器开关二极管
文件：	总27页 (文件大小：2159K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TLV61046A

ZHCSGJ6B –APRIL 2017 –REVISED FEBRUARY 2021

具有功率二极管和隔离开关的TLV61046A 28V 输出电压升压转换器

1 特性

3 说明

• 输入电压范围：1.8V 至5.5V，启动后低至1.6V

• 输出电压高达28V

• 集成式功率二极管和隔离开关

• 开关电流为980mA（典型值）

• 输入电压为3.6V、输出电压为12V 时，效率高达

85%

TLV61046A 是一款高度集成的升压转换器，专为

PMOLED 面板、LCD 偏置电源和传感器模块等应用设

计。TLV61046A 集成了 30V 电源开关、输入至输出的

隔离开关以及整流器二极管。该器件可将来自一节锂离

子电池或两节碱性电池（串联）的输入电压转换成高达

28V 的输出电压。

• ±2.5% 的输出电压精度

• 在轻负载状态下进入节能工作模式

• 内部7ms 软启动时间

• 在关断期间真正断开输入与输出之间的连接

• 输出短路保护

• 输出过压保护

TLV61046A 的工作开关频率为 1.0MHz。该器件支持

使用小型外部组件。通过将 TLV61046A 的 FB 引脚和

VIN 引脚相连，可将其默认内部输出电压设置为12V。

因此，只需要三个外部组件即可获得 12V 输出电压。

TLV61046A 的开关限流典型值为 980mA。它具有

7ms 内置软启动时间，从而能够降低浪涌电流。

TLV61046A 处于关断模式时，隔离开关会将输出与输

入断开以最大限度降低泄漏电流。TLV61046A 还具有

输出短路保护、输出过压保护和热关断功能。

• 热关断保护

• 3mm × 3mm SOT23-6 封装

• 使用TLV61046A 并借助WEBENCH^®Power

Designer 创建定制设计方案

TLV61046A 采用6 引脚3mm x 3mm SOT23-6 封装。

2 应用

器件信息⁽¹⁾

• PMOLED 电源

• LCD 面板

封装尺寸（标称值）

器件型号

封装

TLV61046A

SOT23-6 (6)

2.9mm x 1.6mm

• 可穿戴设备

• 便携式医疗设备

• 传感器电源

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

1.8 V ~ 5.5 V

VIN

4.5 V ~ 28 V

GND

VOUT

OFF

简化版原理图

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLVSD82

TLV61046A

ZHCSGJ6B –APRIL 2017 –REVISED FEBRUARY 2021

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Table of Contents

8 Application and Implementation.................................. 11

8.1 Application Information..............................................11

8.2 Typical Application - 12-V Output Boost Converter...11

8.3 System Examples..................................................... 16

9 Power Supply Recommendations................................17

10 Layout...........................................................................18

10.1 Layout Guidelines................................................... 18

10.2 Layout Example...................................................... 18

11 Device and Documentation Support..........................19

11.1 Device Support........................................................19

11.2 接收文档更新通知................................................... 19

11.3 支持资源..................................................................19

11.4 Trademarks............................................................. 19

11.5 静电放电警告...........................................................19

11.6 术语表..................................................................... 19

12 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings........................................ 4

6.2 ESD Ratings............................................................... 4

6.3 Recommended Operating Conditions.........................4

6.4 Thermal Information....................................................4

6.5 Electrical Characteristics.............................................5

6.6 Typical Characteristics................................................6

7 Detailed Description........................................................8

7.1 Overview.....................................................................8

7.2 Functional Block Diagram...........................................8

7.3 Feature Description.....................................................8

7.4 Device Functional Modes............................................9

Information.................................................................... 19

4 Revision History

Changes from Revision A (April 2017) to Revision B (February 2021)

Page

• 更新了整个文档的表、图和交叉参考的编号格式。.............................................................................................1

• 更正了语法和计算格式........................................................................................................................................1

• 添加了WEBENCH 链接..................................................................................................................................... 1

Changes from Revision * (April 2017) to Revision A (April 2017)

Page

• 已更改为“量产数据”........................................................................................................................................1

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5 Pin Configuration and Functions

GND

VIN

VOUT

图5-1. DBV Package 6-Pin SOT23 Top View

表5-1. Pin Functions

NUMBER

TYPE

DESCRIPTION

NAME

PWR The switch pin of the converter. It is connected to the drain of the internal power MOSFET.

PWR Ground

GND

Voltage feedback of adjustable output voltage. Connected to the center tap of a resistor divider to

program the output voltage. When it is connected to the VIN pin, the output voltage is set to 12 V by an

internal feedback.

Enable logic input. Logic high voltage enables the device. Logic low voltage disables the device and

turns it into shutdown mode.

VOUT

VIN

PWR Output of the boost converter

IC power supply input

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

MIN

–0.3

–40

–65

MAX

UNIT

VIN, EN, FB

Voltage range at terminals ⁽²⁾

SW, VOUT

Operating junction temperature range, T_J

Storage temperature range, T_stg

150

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽²⁾

±2000

(1)

V_(ESD)

Electrostatic discharge

Charged device model (CDM), per JEDEC specification JESD22-C101,

all pins⁽³⁾

±500

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges

in to the device.

(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

1.8

TYP

MAX UNIT

V_IN

V_OUT

Input voltage range

5.5

Output voltage range

3.3

Effective inductance range

Effective input capacitance range

Effective output capacitance range

Operating junction temperature

2.2×0.7

0.22

10 22×1.3

1.0

µH

µF

°C

C_IN

C_OUT

T_J

0.22

1.0

125

–40

6.4 Thermal Information

TLV61046A

DBV (SOT23)

6 PINS

177.7

THERMAL METRIC⁽¹⁾

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

R_θJC(top)

R_θJB

120.6

Junction-to-board thermal resistance

33.2

°C/W

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

21.5

ψ_JT

32.6

ψ_JB

R_θJC(bot)

n/a

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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6.5 Electrical Characteristics

T_A= –40°C to 85°C, V_IN= 3.6 V and V_OUT= 12 V. Typical values are at T_A= 25°C, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLY

V_IN

Input voltage range

1.8

5.5

1.8

1.6

V_INrising

V_INfalling

1.75

1.55

200

V_{IN_UVLO}

Under voltage lockout threshold

V_{IN_HYS}

I_{Q_VIN}

VIN UVLO hysteresis

µA

IC enabled, no load, no switching, V_IN= 1.8 V to 5.5 V,

V_OUT= 12 V

Quiescent current into VIN pin

Shutdown current into VIN pin

110

0.1

200

1.0

I_SD

IC disabled, V_IN= 1.8 V to 5.5 V, T_A= 25°C

OUTPUT

V_OUT

Output voltage range

3.3

11.7

12.4

V_{OUT_12V}

12-V output voltage accuracy

FB pin connected to VIN pin, T_J=0°C to 125°C

PWM mode, T_A=25°C

12.1

0.795

0.803

29.2

0.783

0.775

0.807

0.815

V_REF

Feedback voltage

PWM mode, T_J=-40°C to 125°C

PFM mode, T_A=25°C

V_OVP

Output overvoltage protection threshold

30.4

V_{OVP_HYS}Over voltage protection hysteresis

0.9

I_{FB_LKG}

I_{SW_LKG}

Leakage current into FB pin

Leakage current into SW pin

T_A= 25°C

200

500

IC disabled, T_A= 25°C

POWER SWITCH

Isolation MOSFET on resistance

V_OUT= 12 V

850

450

R_DS(on)

mΩ

Low-side MOSFET on resistance

Switching frequency

V_OUT= 12 V

f_SW

V_IN= 3.6 V, V_OUT= 12 V, PWM mode

850

1050

150

1250

250

kHz

t_{ON_min}

Minimal switch on time

V_IN= 3.6 V, V_OUT= 12 V

680

980

1250

I_{LIM_SW}

Peak switch current limit

V_IN= 2.4 V, V_OUT= 3.3 V

I_{LIM_CHG}

t_STARTUP

Pre-charge current

Startup time

V_IN= 3.6 V, V_OUT= 0 V

V_OUTfrom V_INto 12 V, C_{OUT_effective}= 2.2 µF, I_OUT= 0 A

LOGIC INTERFACE

V_{EN_H}EN Logic high threshold

V_{EN_L}EN Logic Low threshold

PROTECTION

1.2

0.4

T_SD

Thermal shutdown threshold

Thermal shutdown hysteresis

T_Jrising

150

°C

T_{SD_HYS}

T_Jfalling below T_SD

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6.6 Typical Characteristics

V_IN= 3.6 V, V_OUT= 12 V, T_A= 25°C, unless otherwise noted.

100

VIN = 1.8 V

VIN = 3 V

VIN = 3.6 V

VIN = 4.2 V

VOUT = 5 V

VOUT = 12 V

VOUT = 24 V

0.0001

0.001

0.01

Output Current (A)

0.1

0.0001

0.001

0.01

Output Current (A)

0.1

D001

D002

V_OUT= 12 V

图6-1. Efficiency vs Output Current

V_IN= 3.6 V

图6-2. Efficiency vs Output Current

12.2

810

805

800

795

790

785

780

12.15

12.1

12.05

11.95

11.9

-40

-20

100

120

-40

-20

100

120

Temperature (èC)

D003

D004

V_IN= 3.6 V, V_OUT= 12 V, FB pin connected to VIN pin, PWM

mode

V_IN= 3.6 V, V_OUT= 12 V, PWM mode

图6-4. FB Reference Voltage vs Temperature

图6-3. 12-V Fixed Output Voltage vs Temperature

150

140

130

120

110

100

150

140

130

120

110

100

-40

-20

100

120

1.8

2.4

3.6 4.2

Input Voltage (V)

4.8

5.4

Temperature (èC)

D005

D001

V_IN= 3.6 V, V_OUT= 12 V, No switching

V_IN= 1.8 V ~ 6 V, V_OUT= 12 V, No switching

图6-5. Quiescent Current into VIN vs Temperature

图6-6. Quiescent Current into VIN vs Input Voltage

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6.6 Typical Characteristics (continued)

V_IN= 3.6 V, V_OUT= 12 V, T_A= 25°C, unless otherwise noted.

0.3

1100

1000

900

800

700

600

500

0.25

0.2

0.15

0.1

0.05

-40

-20

Temperature (èC)

D007

-40

-20

100

120

Temperature (èC)

V_IN= 3.6 V

D008

V_IN= 3.6 V, V_OUT= 12 V

图6-8. Current Limit vs Temperature

图6-7. Shutdown Current vs Temperature

1100

1000

900

800

700

600

500

1.8

2.4

3.6 4.2

Input Voltage (V)

4.8

5.4

D009

V_IN= 1.8 V ~ 6 V, V_OUT= 12 V

图6-9. Current Limit vs Input Voltage

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7 Detailed Description

7.1 Overview

The TLV61046A is a highly-integrated boost converter designed for applications requiring high voltage and small

solution size such as PMOLED panel power supply and sensor module. The TLV61046A integrates a 30-V

power switch, an input to output isolation switch, and a rectifier diode. It can output up to 28 V from input of a Li+

battery or two-cell alkaline batteries in series.

One common issue with conventional boost regulators is the conduction path from input to output even when the

power switch is turned off. It creates three problems, which are inrush current during start-up, output leakage

current during shutdown, and excessive over load current. In the TLV61046A, the isolation switch is turned off

under shutdown mode and over load conditions, thereby opening the current path. Thus, the TLV61046A can

truely disconnect the load from the input voltage and minimize the leakage current during shutdown mode.

The TLV61046A operates with a switching frequency at 1.0 MHz. This allows the use of small external

components. The TLV61046A has an internal default 12-V output voltage setting by connecting the FB pin to the

VIN pin. Thus, it only needs three external components to get 12-V output voltage. The TLV61046A has typical

980-mA switch current limit. It has 7-ms built-in soft start time to minimize the inrush current. The TLV61046A

also implements output short circuit protection, output overvoltage protection, and thermal shutdown.

7.2 Functional Block Diagram

VIN

VOUT

UVLO

VOUT

Thermal

shutdown

Gate driver

Pre-charge &

short circuit

Logic

protection & on/off

control

PWM / PFM control

1.2 V

Soft start &

current limit control

GND

OVP REF

VOUT

REF

7.3 Feature Description

7.3.1 Undervoltage Lockout

An undervoltage lockout (UVLO) circuit stops the operation of the converter when the input voltage drops below

the typical UVLO threshold of 1.55 V. A hysteresis of 200 mV is added so that the device cannot be enabled

again until the input voltage goes up to 1.75 V. This function is implemented in order to prevent malfunctioning of

the device when the input voltage is between 1.55 V and 1.75 V.

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7.3.2 Enable and Disable

When the input voltage is above the maximal UVLO rising threshold of 1.8 V and the EN pin is pulled high, the

TLV61046A is enabled. When the EN pin is pulled low, the TLV61046A goes into shutdown mode. The device

stops switching and the isolation switch is turned off, providing the isolation between input and output. In

shutdown mode, less than 1-µA input current is consumed.

7.3.3 Soft Start

The TLV61046A begins soft start when the EN pin is pulled high. At the beginning of the soft start period, the

isolation FET is turned on slowly to charge the output capacitor with 30-mA current for about 2 ms. This is called

the pre-charge phase. After the pre-charge phase, the TLV61046A starts switching. This is called switching soft-

start phase. An internal soft start circuit limits the peak inductor current according to the output voltage. When

the output voltage is below 3 V, the peak inductor current is limited to 140 mA. Along with the output voltage

going up from 3 V to 5 V, the peak current limit is gradually increased to the normal value of 980 mA. The

switching soft start phase is about 5 ms typically. The soft start funciton reduces the inrush current during start-

up.

7.3.4 Overvoltage Protection

The TLV61046A has internal output overvoltage protection (OVP) function. When the output voltage exceeds the

OVP threshold of 29.2 V, the device stops switching. Once the output voltage falls 0.9 V below the OVP

threshold, the device resumes operation again.

7.3.5 Output Short Circuit Protection

The TLV61046A starts to limit the output current whenever the output voltage drops below 4 V. The lower output

voltage, the smaller output current limit. When the VOUT pin is shorted to ground, the output current is limited to

less than 200 mA. This function protects the device from being damaged when the output is shorted to ground.

7.3.6 Thermal Shutdown

The TLV61046A goes into thermal shutdown once the junction temperature exceeds the thermal shutdown

termperature threshold of 150°C typically. When the junction temperature drops below 130°C typically, the

device starts operating again.

7.4 Device Functional Modes

The TLV61046A has two operation modes, PWM mode and power save mode.

7.4.1 PWM Mode

The TLV61046A uses a quasi-constant 1.0-MHz frequency pulse width modulation (PWM) at moderate to heavy

load current. Based on the input voltage-to-output votlage ratio, a circuit predicts the required off-time. At the

beginning of the switching cycle, the NMOS switching FET, shown in the functional block diagram, is turned on.

The input voltage is applied across the inductor and the inductor current ramps up. In this phase, the output

capacitor is discharged by the load current. When the inductor current hits the current threshold that is set by the

output of the error amplifier, the PWM switch is turned off, and the power diode is forward-biased. The inductor

transfers its stored energy to replenish the output capacitor and supply the load. When the off-time is expired,

the next switching cycle starts again. The error amplifier compares the FB pin voltage with an internal reference

votlage, and its output determines the inductor peak current.

The TLV61046A has a built-in compensation circuit that can accommodate a wide range of input voltage, output

voltage, inductor value, and output capacitor value for stable operation.

7.4.2 Power Save Mode

The TLV61046A implements a power save mode with pulse frequency modulation (PFM) to improve efficiency at

light load. When the load current decreases, the inductor peak current set by the output of the error amplifier

declines to regulate the output voltage. When the inductor peak current hits the low limit of 200 mA, the output

voltage will exceed the setting voltage as the load current decreases further. When the FB voltage hits the PFM

reference voltage, the TLV61046A goes into power save mode. In power save mode, when the FB voltage rises

and hits the PFM reference voltage, the device continues switching for several cycles because of the delay time

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of the internal comparator, then it stops switching. The load is supplied by the output capacitor and the output

voltage declines. When the FB voltage falls below the PFM reference voltage, after the delay time of the

comparator, the device starts switching again to ramp up the output voltage.

Output

Voltage

PFM mode at light load

1.01 x V_{OUT_NOM}

V_{OUT_NOM}

PWM mode at heavy load

图7-1. Output Voltage in PWM Mode and PFM Mode

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8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

8.1 Application Information

The TLV61046A is a boost DC-DC converter integrating a power switch, an input to output isolation switch, and

a rectifier diode. The device supports up to 28-V output with the input voltage ranging from 1.8 V to 5.5 V. The

TLV61046A adopts the current-mode control with adaptive constant off-time. The switching frequency is quasi-

constant at 1.0 MHz. The isolation switch disconnects the output from the input during shutdown to minimize

leakage current.

The following design procedure can be used to select component values for the TLV61046A.

8.2 Typical Application - 12-V Output Boost Converter

spacing

2.7 V ~ 4.2 V

10 µH

1.0 µF

VIN

VOUT

12 V

GND

TLV61046A

4.7 µF

OFF

1.0 Mꢀ

71.5 kꢀ

图8-1. 12-V Boost Converter

表8-1. Design Requirements

8.2.1 Design Requirements

PARAMETERS

VALUES

Input Voltage

Output Voltage

2.7 V ~ 4.2 V

12 V

Output Current

50 mA

Output Voltage Ripple

±50 mV

8.2.2 Detailed Design Procedure

8.2.2.1 Custom Design With WEBENCH^®Tools

Click here to create a custom design using the TLV61046A device with the WEBENCH® Power Designer.

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1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.

2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.

3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time

pricing and component availability.

In most cases, these actions are available:

• Run electrical simulations to see important waveforms and circuit performance

• Run thermal simulations to understand board thermal performance

• Export customized schematic and layout into popular CAD formats

• Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

8.2.2.2 Programming the Output Voltage

There are two ways to set the output voltage of the TLV61046A. When the FB pin is connected to the input

voltage, the output voltage is fixed to 12 V. This function makes the TLV61046A only need three external

components to minimize the solution size. The second way is to use an external resistor divider to set the

desired output voltage.

By selecting the external resistor divider R1 and R2, as shown in 方程式 1, the output voltage is programmed to

the desired value. When the output voltage is regulated, the typical voltage at the FB pin is V_REFof 795 mV.

≈

∆

’

V_OUT

V_REF

R1=

-1 ìR2

◊

(1)

where

• V_OUTis the desired output voltage

• V_REFis the internal reference voltage at the FB pin

For best accuracy, R2 should be kept smaller than 80 kΩ to ensure the current flowing through R2 is at least

100 times larger than the FB pin leakage current. Changing R2 towards a lower value increases the immunity

against noise injection. Changing the R2 towards a higher value reduces the quiescent current for achieving

higher efficiency at low load currents.

8.2.2.3 Inductor Selection

Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the

inductor is the most important component in power regulator design. There are three important inductor

specifications, inductor value, saturation current, and dc resistance (DCR).

The TLV61046A is designed to work with inductor values between 2.2 µH and 22 µH. Follow 方程式 2 to 方程式

4 to calculate the peak current of the inductor for the application. To calculate the peak current in the worst case,

use the minimum input voltage, maximum output voltage, and maximum load current of the application. To have

enough design margin, choose the inductor value with -30% tolerance, and a low power-conversion efficiency for

the calculation.

In a boost regulator, the inductor dc current can be calculated with 方程式2.

V_OUTìI_OUT

I_L(DC)

V ì h

(2)

where

• V_OUTis output voltage

• I_OUTis output current

• V_INis input voltage

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• ηis power conversion efficiency, use 80% for most applications

The inductor ripple current is calculated with 方程式 3 for an asynchronous boost converter in continuous

conduction mode (CCM).

ì V

+ 0.8V - V

(

)

OUT IN

DI_L(P-P)

L ì f_SWì V

+ 0.8V

(

)

OUT

(3)

where

• ΔI_L(P-P)is inductor ripple current

• L is inductor value

• f _SWis switching frequency

• V_OUTis output voltage

• V_INis input voltage

Therefore, the inductor peak current is calculated with 方程式4.

DI_{L P-P}

(

)

I_{L P}= I_{L DC}

(

)

(

)

(4)

Normally, it is advisable to work with an inductor peak-to-peak current of less than 40% of the average inductor

current for maximum output current. A smaller ripple from a larger valued inductor reduces the magnetic

hysteresis losses in the inductor and EMI. But in the same way, load transient response time is increased.

Because the TLV61046A is for relatively small output current application, the inductor peak-to-peak current can

be as high as 200% of the average current with a small inductor value, which means the TLV61046A always

works in DCM mode. 表8-2 lists the recommended inductors for the TLV61046A.

表8-2. Recommended Inductors for the TLV61046A

PART NUMBER

FDSD0420-H-100M

CDRH3D23/HP

74438336100

L(µH)

SATURATION CURRENT (A)

SIZE (LxWxH)

4.2x4.2x2.0

4.0x4.0x2.5

3.2x3.2x2.0

4.0x4.0x1.2

VENDOR⁽¹⁾

Toko

DCR MAX (mΩ)

200

198

322

132

2.5

1.02

2.35

1.1

Sumida

Wurth

VLS4012-4R7M

4.7

TDK

(1) See Third-party Products Disclaimer

8.2.2.4 Input and Output Capacitor Selection

The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. This ripple

voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a

ceramic capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by:

I_OUTìD_MAX

f_SWì V_RIPPLE

C_OUT

(5)

where

• D_MAXis maximum switching duty cycle

• V_RIPPLEis peak to peak output voltage ripple

The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are

used.

Care must be taken when evaluating a ceramic capacitor’s derating under dc bias, aging, and ac signal. For

example, the dc bias can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of its

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capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate

capacitance at the required output voltage.

It is recommended to use the output capacitor with effective capacitance in the range of 0.47 μF to 10 μF. The

output capacitor affects loop stability of the boost regulator. If the output capacitor is below the range, the boost

regulator can potentially become unstable. Increasing the output capacitor makes the output voltage ripple

smaller in PWM mode.

For input capacitor, a ceramic capacitor with more than 1.0 µF is enough for most applications.

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8.2.3 Application Performance Curves

10 V / div

VOUT (AC)

10 mV / div

VOUT (AC)

30 mV / div

Inductor

Current

100 mA / div

Inductor

Current

100 mA / div

V_IN= 3.6 V, V_OUT= 12 V, I_OUT= 18 mA

V_IN= 3.6 V, V_OUT= 12 V, I_OUT= 50 mA

图8-3. Switching Waveforms in PWM DCM Mode

图8-2. Switching Waveforms in PWM CCM Mode

10 V / div

1 V / div

VOUT (AC)

50 mV / div

Inductor

Current

100 mA / div

VOUT

3 V / div

Inductor

Current

100 mA / div

V_IN= 3.6 V, V_OUT= 12 V, I_OUT= 3 mA

V_IN= 3.6 V, V_OUT= 12 V, I_OUT= 50 mA

图8-4. Switching Waveforms in Power Save Mode

图8-5. Soft Start-up Waveforms

1 V / div

VOUT (AC)

200 mV / div

VOUT (AC)

3 V / div

Inductor

Current

100 mA / div

Output Current

50 mA / div

V_IN= 3.6 V, V_OUT= 12 V

V_IN= 3.6 V, V_OUT= 12 V, I_OUT= 50 mA

图8-7. 30-mA to 70-mA Load Transient Response

图8-6. Shutdown Waveforms

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VOUT (AC)

200 mV / div

VIN (3.3 V offset)

500 mV / div

V_OUT= 12 V, I_OUT= 50 mA

图8-8. Input Voltage from 3.3-V to 4.2-V Line Transient Response

8.3 System Examples

8.3.1 Fixed 12-V Output Voltage with Three External Components

The TLV61046A can output fixed 12-V voltage by connecting the FB pin to the VIN pin to save the external

resistor divider. The 图8-9 shows the application circuit.

1.8 V ~ 5.5 V

10 µH

2.2mF

VIN

VOUT

GND

12 V

10 µF

OFF

图8-9. Fixed 12-V Output Voltage by Connecting the FB Pin to VIN Pin

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9 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 1.8 V to 5.5 V. This input supply

must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk

capacitance can be required in addition to the ceramic bypass capacitors. A typical choice is an electrolytic or

tantalum capacitor with a value of 47 µF. The output current of the input power supply needs to be rated

according to the supply voltage, output voltage, and output current of the TLV61046A.

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10 Layout

10.1 Layout Guidelines

As for all switching power supplies, especially those running at high switching frequency and high currents,

layout is an important design step. If the layout is not carefully done, the regulator could suffer from instability

and noise problems. To maximize efficiency, switch rise and fall time are very fast. To prevent radiation of high

frequency noise (for example, EMI), proper layout of the high-frequency switching path is essential. Minimize the

length and area of all traces connected to the SW pin, and always use a ground plane under the switching

regulator to minimize interplane coupling. The input capacitor needs not only to be close to the VIN pin, but also

to the GND pin in order to reduce input supply ripple.

The most critical current path for all boost converters is from the switching FET, through the rectifier diode, then

the output capacitors, and back to ground of the switching FET. This high current path contains nanosecond rise

and fall time and should be kept as short as possible. Therefore, the output capacitors need not only to be close

to the VOUT pin, but also to the GND pin to reduce the overshoot at the SW pin and VOUT pin.

10.2 Layout Example

A large ground plane on the bottom layer connects the ground pins of the components on the top layer through

vias.

GND

VIN

VOUT

VIN

VOUT

GND

图10-1. PCB Layout Example

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11 Device and Documentation Support

11.1 Device Support

11.1.1 第三方产品免责声明

TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此

类产品或服务单独或与任何TI 产品或服务一起的表示或认可。

11.1.2 Development Support

11.1.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the TLV61046A device with the WEBENCH® Power Designer.

1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.

2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.

3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time

pricing and component availability.

In most cases, these actions are available:

• Run electrical simulations to see important waveforms and circuit performance

• Run thermal simulations to understand board thermal performance

• Export customized schematic and layout into popular CAD formats

• Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

11.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

11.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

11.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

WEBENCH^®are registered trademarks of Texas Instruments.

所有商标均为其各自所有者的财产。

11.5 静电放电警告

静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理

和安装程序，可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参

数更改都可能会导致器件与其发布的规格不相符。

11.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TLV61046ADBVR

TLV61046ADBVT

ACTIVE

SOT-23

DBV

3000 RoHS & Green

250 RoHS & Green

NIPDAU

Level-1-260C-UNLIM

-40 to 125

1C4F

NIPDAU

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

14-Jan-2021

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

17-Feb-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TLV61046ADBVR

TLV61046ADBVT

SOT-23

DBV

3000

250

180.0

8.4

3.2

1.4

4.0

8.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

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17-Feb-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TLV61046ADBVR

TLV61046ADBVT

SOT-23

DBV

3000

250

210.0

185.0

35.0

Pack Materials-Page 2

PACKAGE OUTLINE

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

3.0

2.6

0.1 C

1.75

1.45

1.45 MAX

PIN 1

INDEX AREA

2X 0.95

1.9

3.05

2.75

0.50

0.25

C A B

0.15

0.00

0.2

(1.1)

TYP

0.25

GAGE PLANE

0.22

0.08

TYP

0.6

0.3

TYP

SEATING PLANE

4214840/C 06/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.

4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.

5. Refernce JEDEC MO-178.

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EXAMPLE BOARD LAYOUT

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X (0.95)

(R0.05) TYP

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4214840/C 06/2021

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4214840/C 06/2021

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

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TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TLV61046A [TI]

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