TPS22917 [TI]

具备可调节上升时间和可调节输出放电功能的 5.5V、2A、80mΩ、10nA 泄露负载开关;


型号：	TPS22917
厂家：	TEXAS INSTRUMENTS
描述：	具备可调节上升时间和可调节输出放电功能的 5.5V、2A、80mΩ、10nA 泄露负载开关开关
文件：	总29页 (文件大小：1961K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS22917

ZHCSHL1B –SEPTEMBER 2017 –REVISED DECEMBER 2021

TPS22917x 1V 至5.5V、2A、80mΩ 超低泄漏负载开关

1 特性

3 说明

• 输入电压范围(V_IN)：1V 至5.5V

• 最大持续电流(I_MAX)：2A

TPS22917x 器件是一款小型单通道负载开关，采用低

泄漏电流P 沟道MOSFET 实现超小的功率损耗。高级

栅极控制设计支持低至 1V 的工作电压，且增加超小的

导通电阻和功率损耗。

• 导通电阻(R_ON

)

– 5V V_IN= 80mΩ（典型值）

– 1.8V V_IN= 120mΩ（典型值）

– 1V V_IN= 220mΩ（典型值）

• 超低功耗：

– 导通状态(I_Q)：0.5µA（典型值）

– 关闭状态(I_SD)：10nA（典型值）

• ON 引脚智能下拉电阻(R_PD)：

可以使用外部组件独立调节上升和下降时间，以实现系

统级优化。可通过调节计时电容器 (C_T) 和开通时间来

管理浪涌电流，且不会增加不必要的系统延迟。输出放

电电阻 (QOD) 可用来调节输出下降时间。将 QOD 引

脚直接连接到输出端可获得最快的下降时间，或使其保

持开路以获得最慢的下降时间。

– ON ≥VIH (I_ON)：10nA（最大值）

– ON ≤VIL (R_PD)：750kΩ（典型值）

• 可调节开通时序可限制浪涌电流(t_ON)：

– 在72mV/μs（C_T= 开路）下，5V t_ON

100μs

– 5V t_ON= 4000μs，2.3mV/μs (C_T= 1000pF)

• 可调节输出放电和下降时间：

开关导通状态由数字输入控制，此输入可与低压控制信

号直接连接。TPS22917 采用高电平有效使能逻辑，而

TPS22917L 低电平有效使能逻辑。首次加电时，此器

件使用智能下拉电阻来保持 ON 引脚不悬空，直到系

统时序控制完成。ON 引脚故意驱动为高电平 (≥V_IH)

后，便会断开智能下拉电阻 (R_PD)，从而防止不必要的

功率损耗。

– 可选QOD 电阻≥150Ω（内部）

• 常开的真反向电流阻断(RCB)：

TPS22917x 器件采用支持目测检查焊点的带引线

SOT-23 封装 (DBV)。此器件的工作温度范围为 –

40°C 至125°C。

– 激活电流(I_RCB)：–500mA（典型值）

– 反向泄漏电流(I_IN,RCB)：-1µA（最大值）

器件信息⁽¹⁾

2 应用

封装尺寸（标称值）

器件型号

TPS22917x

封装

SOT-23 (6)

• 工业系统

• 机顶盒

• 血糖仪

2.90mm × 1.60mm

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

• 电子销售终端

VIN

VOUT

C_T

R_L

R_QOD

C_L

V_IN

C_IN

QOD

TPS22917

简化版原理图

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLVSDW8

TPS22917

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ZHCSHL1B –SEPTEMBER 2017 –REVISED DECEMBER 2021

Table of Contents

9.3 Feature Description...................................................15

9.4 Full-Time Reverse Current Blocking......................... 16

9.5 Device Functional Modes..........................................16

10 Application and Implementation................................17

10.1 Application Information........................................... 17

10.2 Typical Application.................................................. 17

11 Power Supply Recommendations..............................19

12 Layout...........................................................................20

12.1 Layout Guidelines................................................... 20

12.2 Layout Example...................................................... 20

12.3 Thermal Considerations..........................................20

13 Device and Documentation Support..........................21

13.1 接收文档更新通知................................................... 21

13.2 支持资源..................................................................21

13.3 Trademarks.............................................................21

13.4 Electrostatic Discharge Caution..............................21

13.5 术语表..................................................................... 21

14 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Device Comparison Table...............................................3

6 Pin Configuration and Functions...................................4

7 Specifications.................................................................. 5

7.1 Absolute Maximum Ratings........................................ 5

7.2 ESD Ratings............................................................... 5

7.3 Recommended Operating Conditions.........................5

7.4 Thermal Information....................................................5

7.5 Electrical Characteristics.............................................6

7.6 Switching Characteristics............................................7

7.7 Typical Characteristics................................................8

8 Parameter Measurement Information..........................13

8.1 Test Circuit and Timing Waveforms Diagrams.......... 13

9 Detailed Description......................................................14

9.1 Overview...................................................................14

9.2 Functional Block Diagram.........................................14

Information.................................................................... 21

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision A (February 2018) to Revision B (December 2021)

Page

• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1

• 向数据表添加了TPS22917L 可订购信息............................................................................................................1

Changes from Revision * (September 2017) to Revision A (February 2018)

Page

• 将产品状态从“预告信息”更改为“量产数据”................................................................................................ 1

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5 Device Comparison Table

Device

ON Pin Logic

Active High

Active Low

TPS22917

TPS22917L

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6 Pin Configuration and Functions

VIN

GND

VOUT

QOD

图6-1. DBV Package 6-Pin SOT-23 Top View

表6-1. Pin Functions

I/O

DESCRIPTION

NO.

NAME

VIN

Switch input

GND

Device ground

—

Active high switch control input. Do not leave floating.

Switch slew rate control. Connect capacitor from this pin to VIN to increase output slew

rate and turn-on time. Can be left floating for fastest timing.

Quick Output Discharge pin. This functionality can be enabled in one of three ways.

•

Placing an external resistor between VOUT and QOD

Tying QOD directly to VOUT and using the internal resistor value (R_PD

Disabling QOD by leaving pin floating

)

QOD

See the Fall Time (t_FALL) and Quick Output Discharge (QOD) section for more

information.

VOUT

Switch output

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7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

MAX

UNIT

V_IN

Input voltage

–0.3

V_OUT

V_ON

Output voltage

Enable voltage

V_QOD

I_MAX

QOD pin voltage

Maximum continuous switch current

Maximum pulsed switch current, pulse < 300-µs, 2% duty cycle

Maximum junction temperature

Storage temperature

I_PLS

2.5

125

150

300

T_J,MAX

T_STG

T_LEAD

°C

–65

Maximum Lead temperature (10-s soldering time)

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

7.2 ESD Ratings

VALUE

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

±2000

V_(ESD)

Electrostatic discharge

Charged-device model (CDM), per JEDEC specification JESD22-

C101⁽²⁾

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions. Pins listed as ±500 V may actually have higher performance.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

MIN

MAX

5.5

UNIT

V_IN

Input voltage

V_OUT

V_IH

Output voltage

5.5

High-level input voltage, ON

Low-level input voltage, ON

QOD Pin Voltage

5.5

V_IL

0.35

5.5

V_QOD

V_CT

Timing Capacitor Voltage Rating

7.4 Thermal Information

TPS22917

Thermal Parameters⁽¹⁾

DBV (SOT-23)

UNIT

6 PINS

183

152

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

°C/W

θ_JA

θ_JCtop

θ_JB

Junction-to-board thermal resistance

Junction-to-top characterization parameter

Junction-to-board characterization parameter

ψ_JT

ψ_JB

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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7.5 Electrical Characteristics

Unless otherwise noted, the specification in the following table applies for all variants over the entire recommended power

supply voltage range of 1 V to 5.5 V. Typical Values are at 25°C.

PARAMETER

INPUT SUPPLY(VIN)

TEST CONDITIONS

T_J

MIN

TYP MAX UNIT

0.5

1.0

1.2

µA

–40°C to +85°C

–40°C to +125°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

I_Q,VIN

V_INQuiescent current

Enabled, V_OUT= Open

100

250

300

400

Disabled, V_OUT= GND (TPS22917)

Disabled, V_OUT= GND (TPS22917L)

I_SD,VIN

V_INShutdown current

175

ON-RESISTANCE(R_ON

)

25°C

100

120

130

140

110

140

150

160

150

175

185

200

220

265

280

300

350

370

390

–40°C to +85°C

–40°C to +105°C

–40°C to +125°C

25°C

V_IN= 5 V

–40°C to +85°C

–40°C to +105°C

–40°C to +125°C

25°C

V_IN= 3.6 V

120

170

220

–40°C to +85°C

–40°C to +105°C

–40°C to +125°C

25°C

R_ON

ON-Resistance

I_OUT= 200 mA

V_IN= 1.8 V

V_IN= 1.2 V

VIN = 1.0 V

mΩ

–40°C to +85°C

–40°C to +105°C

–40°C to +125°C

25°C

–40°C to +85°C

–40°C to +105°C

–40°C to +125°C

ENABLE PIN(ON)

Enabled (TPS22917)

Enabled (TPS22917L)

–40°C to +125°C

–40°C to +105°C

–10

–20

I_ON

ON Pin leakage

R_PD

Smart Pull Down Resistance

750

_ON≤V_IL

kΩ

REVERSE CURRENT BLOCKING(RCB)

I_RCB

RCB Activation Current

RCB Activation time

Enabled, V_OUT> V_IN

-0.5

-1

–40°C to +125°C

–40°C to +105°C

t_RCB

Enabled, V_OUT> V_IN+ 200mV

Enabled, V_OUT> V_IN

µs

V_RCB

I_IN,RCB

RCB Release Voltage

VIN Reverse Leakage Current

µA

0 V ≤V_IN+ V_RCB≤V_OUT≤5.5 V

–1

QUICK OUTPUT DISCHARGE(QOD)

QOD

Output discharge resistance

Disabled

150

–40°C to +105°C

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7.6 Switching Characteristics

Unless otherwise noted, the typical characteristics in the following table applies over the entire recommended power supply

voltage range of 1 V to 5.5 V at 25°C with a load of C_L= 1 µF, R_L= 10 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

100

MAX

UNIT

µs

C_T= Open

V_IN= 5.0 V

V_IN= 3.6 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.0 V

V_IN= 5.0 V

V_IN= 3.6 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.0 V

V_IN= 5.0 V

V_IN= 3.6 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 1.0 V

µs/pF

µs

C_T≥100 pF

C_T= Open

120

3.8

200

3.6

300

3.4

400

µs/pF

µs

C_T≥100 pF

C_T= Open

t_ON

Turn ON Time

µs/pF

µs

C_T≥100 pF

C_T= Open

µs/pF

µs

C_T≥200 pF

C_T= Open

µs/pF

µs

C_T≥400 pF

C_T= Open

1.8

µs/pF

µs

C_T≥100 pF

C_T= Open

1.6

100

1.2

150

0.95

200

0.6

µs/pF

µs

C_T≥100 pF

C_T= Open

t_R

Output Rise Time

µs/pF

µs

C_T≥100 pF

C_T= Open

µs/pF

µs

C_T≥200 pF

C_T= Open

µs/pF

mV/µs

(mV/µs)*pF

mV/µs

(mV/µs)*pF

mV/µs

(mV/µs)*pF

mV/µs

(mV/µs)*pF

mV/µs

(mV/µs)*pF

µs

C_T≥400 pF

C_T= Open

2300

C_T≥100 pF

C_T= Open

1900

C_T≥100 pF

C_T= Open

SR_ON

Turn ON Slew Rate⁽¹⁾

1100

6.2

1000

3.9

1100

C_T≥100 pF

C_T= Open

C_T≥200 pF

C_T= Open

C_T≥400 pF

t_OFF

Turn OFF Time

C_L= 1uF, R_QOD= Short

C_L= 10uF, R_QOD= Short

C_L= 10uF, R_QOD= 100 Ω

C_L= 220uF, R_QOD= Short

µs

R_L= 10 Ω

3.8

5.9

t_FALL

Output Fall Time⁽²⁾

R_L= Open

(1) SR_ONis the fastest Slew Rate during the turn on time (t_ON

)

(2) Output may not discharge completely if QOD is not connected to VOUT.

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7.7 Typical Characteristics

7.7.1 Typical Electrical Characteristics

The typical characteristics curves in this section apply at 25°C unless otherwise noted.

0.8

0.75

0.7

105 èC

85 èC

25 èC

-40 èC

0.65

0.6

0.55

0.5

0.45

0.4

105 èC

85 èC

25 èC

0.35

0.3

-40 èC

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D002

D001

_ON≤V_IL

图7-1. Shutdown Current (I_SD

_ON≥V_IH

图7-2. Quiescent Current (I_Q)

)

275

250

225

200

175

150

125

100

260

240

220

200

180

160

140

1 V

1.2 V

1.8 V

3.6 V

5 V

85èC

25èC

-40èC

-40

-20

20 60

Temperature (°C)

100

120

1.5

2.5

3.5

4.5

5.5

D004

V_IN(V)

D007

_ON≥V_IH

图7-3. ON-Resistance (R_ON

_ON≤V_IL

)

图7-4. Quick Output Discharge (QOD)

0.725

0.7

1050

1000

950

900

850

800

750

700

650

0.675

0.65

0.625

0.6

0.575

0.55

V_IH

V_IL

1.5

2.5

3.5

4.5

5.5

-50

Temperature (èC)

100

150

V_IN(V)

D006

D005

–40°C to +105°C

图7-5. ON Pin Threshold

_ON≤V_IL

图7-6. ON Pin Smart Pulldown (R_PD

)

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7.7.2 Typical Switching Characteristics

The typical data in this section apply at 25°C with a load of C_L= 1 μF, R_L= 10 Ω, and QOD shorted to VOUT unless

otherwise noted.

600

105°C

85°C

25°C

-40°C

550

500

450

400

350

300

250

200

150

100

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D009

D010

D008

图7-8. Turn-On at 5 V (CT = Open)

图7-10. Turn-On at 3.6 V (CT = Open)

图7-12. Turn On at 1 V (CT = Open)

图7-7. Turn-On Time (CT = Open)

300

250

200

150

100

105 °C

85 °C

25 °C

-40 °C

1.5

2.5

3.5

4.5

5.5

VIN (V)

图7-9. Rise Time (CT = Open)

105 èC

85 èC

25 èC

-40 èC

1.5

2.5

3.5

V_IN(V)

4.5

5.5

图7-11. Slew Rate (CT = Open)

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7.7.2 Typical Switching Characteristics (continued)

5000

105°C

85°C

4500

25°C

-40°C

4000

3500

3000

2500

2000

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D013

图7-14. Turn-On at 5 V (CT = 1000 pF)

图7-13. Turn On Time (CT = 1000 pF)

1800

1500

1200

900

600

300

105 èC

85 èC

25 èC

-40 èC

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D014

图7-16. Turn-On at 3.6 V (CT = 1000 pF)

图7-15. Rise Time (CT = 1000 pF)

105 °C

85 °C

25 °C

-40 °C

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D012

图7-18. Turn-On at 1 V (CT = 1000 pF)

图7-17. Slow Slew Rate (CT = 1000 pF)

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7.7.2 Typical Switching Characteristics (continued)

29000

28000

27000

26000

25000

34000

32000

30000

28000

26000

24000

22000

24000

220 µF

47 µF

1 µF

23000

3 W

10 W

22000

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D022

D023

C_L= 47 µF

R_L= 10 Ω

图7-20. Turn-On vs Load Resistance (CT = 10000 pF)

图7-19. Turn-On vs Load Capacitance (CT = 10000 pF)

12000

3600

3 W

10 W

Open

3300

3000

10000

8000

6000

2700

2400

2100

1800

1500

1200

900

4000

220 µF

47 µF

1 µF

600

2000

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D025

V_IN(V)

D024

C_L= 47 µF

R_L= 10 Ω

图7-22. Rise Time vs Load Resistance (CT = 10000 pF)

图7-21. Rise Time vs Load Capacitance (CT = 10000 pF)

0.6

3 W

10 W

0.5

0.4

0.3

0.2

0.5

0.4

0.3

0.2

0.1

220 µF

47 µF

1 µF

0.1

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V_IN(V)

D026

D027

C_L= 47 µF

R_L= 10 Ω

图7-24. Slew Rate vs Load Resistance (CT = 10000 pF)

图7-23. Slew Rate vs Load Capacitance (CT = 10000 pF)

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7.7.2 Typical Switching Characteristics (continued)

图7-25. Turn-Off at 3.6 V

R_L= Open

C_L= 47 μF

图7-26. Turn-Off at 3.6 V (Open Load)

25000

20000

15000

10000

5000

105°C

10 mF

220 mF

85°C

25°C

-40°C

1.5

2.5

3.5

4.5

5.5

100 200 300 400 500 600 700 800 900 1000

R_QOD(W)

V_IN(V)

D011

D032

V_IN= 1 V to 5.5 V

图7-27. Turn-Off Time

V_IN= 1 V to 5.5 V

R_L= Open

图7-28. Turn-Off Time (Open Load)

550000

500000

450000

400000

350000

300000

250000

200000

150000

100000

50000

105 èC

85 èC

10 uF

220 uF

25 èC

-40 èC

1.5

2.5

3.5

4.5

5.5

100 200 300 400 500 600 700 800 900 1000

R_QOD(W)

V_IN(V)

D028

D030

V_IN= 1 V to 5.5 V

图7-29. Fall Time

V_IN= 1 V to 5.5 V R_L= Open

图7-30. Fall Time (Open Load)

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8 Parameter Measurement Information

8.1 Test Circuit and Timing Waveforms Diagrams

VIN

C_T

VOUT

R_L

R_QOD

C_L

V_IN

C_IN

QOD

TPS22917

A. Rise and fall times of the control signal are 100 ns.

B. Turn-off times and fall times are dependent on the time constant at the load. For TPS22917x, the internal pull-down resistance QOD is

enabled when the switch is disabled. The time constant is (R_QOD+ QOD || R_L) × C_L.

图8-1. Test Circuit

图8-2. Timing Waveforms

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9 Detailed Description

9.1 Overview

The TPS22917x device is a 5.5-V, 2-A load switch in a 6-pin SOT-23 package. To reduce voltage drop for low

voltage and high current rails, the device implements a low resistance P-channel MOSFET which reduces the

drop out voltage across the device.

The TPS22917x device has a configurable slew rate which helps reduce or eliminate power supply droop

because of large inrush currents. Furthermore, the device features a QOD pin, which allows the configuration of

the discharge rate of VOUT after the switch is disabled. During shutdown, the device has very low leakage

currents, thereby reducing unnecessary leakages for downstream modules during standby. Integrated control

logic, driver, charge pump, and output discharge FET eliminates the need for any external components which

reduces solution size and bill of materials (BOM) count.

9.2 Functional Block Diagram

Reverse

Current

Blocking

OUT

Control

Logic

Timing

Control

Driver

QOD

GND

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9.3 Feature Description

9.3.1 On and Off Control

The ON pin controls the state of the switch. The ON pin is compatible with standard GPIO logic threshold so it

can be used in a wide variety of applications. The TPS22917 is enabled when the voltage applied to the ON pin

is pulled above V_IH, while the TPS22917L is enabled when the voltage is below V_IL.

When power is first applied to VIN, a Smart Pulldown is used to keep the ON pin from floating until system

sequencing is complete. After the ON pin is deliberately driven high (≥V_IH), the Smart Pulldown is disconnected

to prevent unnecessary power loss. 表9-1 shown then the ON Pin Smart Pulldown is active.

表9-1. Smart-ON Pulldown

VON

≤V_IL

≥V_IH

Pulldown

Connected

Disconnected

9.3.2 Turn-On Time (t_ON) and Adjustable Slew Rate (CT)

A capacitor to VIN on the CT pin sets the slew rate of V_OUT. The CT capacitor voltage ramps until shortly after

the switch is turned on and V_OUTbecomes stable.

Leaving the CT pin open results in the highest slew rate and fastest turn-on time. These values can be found in

the Switching Characteristics Table. For slower slew rates the required CT capacitor can be found using 方程式

CT = (Slew Rate) ÷ SR_ON

(1)

where

• Slew Rate = desired slew rate (mV/us)

• CT = the capacitance value on the CT pin (pF)

• SR_ON= slew rate constant from table [(mV/µs) × pF]

The total turn-on time has a direct correlation to the output slew rate. The fastest turn on times (t_ON), with CT pin

open, can be found in the Switching Characteristics. For slower slew rates, the resulting turn-on time can be

found with 方程式2:

Turn-On time = CT × t_ON

(2)

where

• Turn-On Time = total time from enable until V_OUTrises to 90% of V_IN(µs)

• CT =the capacitance value on the CT pin (pF)

• t_ON= Turn-On time constant (µs/pF)

9.3.3 Fall Time (t_FALL) and Quick Output Discharge (QOD)

The TPS22917x device includes a QOD pin that can be configured in one of three ways:

• QOD pin shorted to VOUT pin. Using this method, the discharge rate after the switch becomes disabled is

controlled with the value of the internal resistance QOD.

• QOD pin connected to VOUT pin using an external resistor R_QOD. After the switch becomes disabled, the

discharge rate is controlled by the value of the total discharge resistance. To adjust the total discharge

resistance, 方程式3 can be used:

R_DIS= QOD + R_QOD

(3)

– Where:

– R_DIS= total output discharge resistance (Ω)

– QOD = internal pulldown resistance (Ω)

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– R_QOD= external resistance placed between the VOUT and QOD pins (Ω)

• QOD pin is unused and left floating. Using this method, there is no quick output discharge functionality, and

the output remains floating after the switch is disabled.

The fall times of the device depend on many factors including the total discharge resistance (R_DIS) and the

output capacitance (C_L). To calculate the approximate fall time of V_OUTuse 方程式4.

t_FALL= 2.2 × (R_DIS|| R_L) × C_L

(4)

Where:

• t_FALL= output fall time from 90% to 10% (μs)

• R_DIS= total QOD + R_QODresistance (Ω)

• R_L= output load resistance (Ω)

• C_L= output load capacitance (μF)

9.3.3.1 QOD When System Power is Removed

The adjustable QOD can be used to control the power down sequencing of a system even when the system

power supply is removed. When the power is removed, the input capacitor discharges at V_IN. Past a certain V_IN

level, the strength of the R_PDis reduced. If there is still remaining charge on the output capacitor, this results in

longer fall times. For further information regarding this condition, see the Setting Fall Time for Shutdown Power

Sequencing section.

9.4 Full-Time Reverse Current Blocking

In a scenario where the device is enabled and V_OUTis greater than V_INthere is potential for reverse current to

flow through the pass FET or the body diode. When the reverse current threshold (I_RCB) is exceeded, the switch

is disabled within t_RCB. The Switch remains off and block reverse current as long as the reverse voltage

condition exists. After V_OUThas dropped below the V_RCBrelease threshold the device turns back on with slew

rate control.

9.5 Device Functional Modes

表 9-2 describes the connection of the VOUT pin depending on the state of the ON pin as well as the various

QOD pin configurations.

表9-2. VOUT Connection

QOD CONFIGURATION

QOD pin connected to VOUT with R_QOD

QOD pin tied to VOUT directly

QOD pin left open

TPS22917 VOUT

GND (via QOD + R_QOD

GND (via QOD)

Floating

TPS22917L VOUT

)

VIN

QOD pin connected to VOUT with R_QOD

QOD pin tied to VOUT directly

VIN

GND (via QOD + R_QOD)

VIN

GND (via QOD)

Floating

QOD pin left open

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10 Application and Implementation

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

This section highlights some of the design considerations when implementing this device in various applications.

10.2 Typical Application

This typical application demonstrates how the TPS22917x device can be used to power downstream modules.

VIN

VOUT

C_T

R_L

R_QOD

C_L

V_IN

C_IN

QOD

TPS22917

图10-1. Typical Application Schematic

10.2.1 Design Requirements

For this design example, use the values listed in 表10-1 as the design parameters:

表10-1. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

3.6 V

Input voltage (V_IN

)

Load current / resistance (R_L)

Load capacitance (C_L)

1 kΩ

47 µF

Minimum fall time (t_F)

40 ms

Maximum inrush current (I_RUSH

)

150 mA

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10.2.2 Detailed Design Procedure

10.2.2.1 Limiting Inrush Current

Use 方程式5 to find the maximum slew rate value to limit inrush current for a given capacitance:

(Slew Rate) = I_RUSH÷ C_L

where

(5)

• I_INRUSH= maximum acceptable inrush current (mA)

• C_L= capacitance on VOUT (μF)

• Slew Rate = Output Slew Rate during turn on (mV/μs)

After the required slew rate shown in 方程式1 can be used to find the minimum CT capacitance

CT = SR_ON÷ (Slew Rate)

CT = 1900 ÷ 3.2 = 594 pF

(6)

(7)

To ensure an inrush current of less than 150 mA, choose a CT value greater than 594 pF. An appropriate value

must be placed on such that the I_MAXand I_PLSspecifications of the device are not violated.

10.2.2.2 Application Curves

图10-2. Inrush Current (CT = 470 pF)

图10-3. Inrush Current (CT = 1000 pF)

10.2.2.3 Setting Fall Time for Shutdown Power Sequencing

Microcontrollers and processors often have a specific shutdown sequence in which power must be removed.

Using the adjustable Quick Output Discharge function of the TPS22917x, adding a load switch to each power rail

can be used to manage the power down sequencing. To determine the QOD values for each load switch, first

confirm the power down order of the device you wish to power sequence. Be sure to check if there are voltage or

timing margins that must be maintained during power down.

After the required fall time is determined, the maximum external discharge resistance (R_DIS) value can be found

using 方程式4:

t_FALL= 2.2 × (R_DIS|| R_L) × C_L

(8)

(9)

R_DIS= 630 Ω

方程式3 can then be used to calculate the R_QODresistance needed to acheive a particular discharge value:

R_DIS= QOD + R_QOD

(10)

R_QOD= 480 Ω

(11)

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To ensure a fall time greater than, choose an R_QODvalue greater than 480 Ω.

10.2.2.4 Application Curves

图10-4. Fall Time (R_QOD= 100 Ω)

图10-5. Fall Time (R_QOD= 1 kΩ)

11 Power Supply Recommendations

The device is designed to operate with a VIN range of 1 V to 5.5 V. The VIN power supply must be well

regulated and placed as close to the device terminal as possible. The power supply must be able to withstand all

transient load current steps. In most situations, using an input capacitance (C_IN) of 1 μF is sufficient to prevent

the supply voltage from dipping when the switch is turned on. In cases where the power supply is slow to

respond to a large transient current or large load current step, additional bulk capacitance can be required on the

input.

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12 Layout

12.1 Layout Guidelines

For best performance, all traces must be as short as possible. To be most effective, the input and output

capacitors must be placed close to the device to minimize the effects that parasitic trace inductances can have

on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects.

12.2 Layout Example

图12-1. Recommended Board Layout

12.3 Thermal Considerations

The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To

calculate the maximum allowable dissipation, P_D(max)for a given output current and ambient temperature, use 方

程式12:

T_J(MAX)- T_A

P_D(MAX)

q_JA

(12)

where

• P_D(MAX)= maximum allowable power dissipation

• T_J(MAX)= maximum allowable junction temperature (125°C for the TPS22917x)

• T_A= ambient temperature of the device

• θ_JA= junction to air thermal impedance. Refer to the Thermal Information section. This parameter is highly

dependent upon board layout.

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13 Device and Documentation Support

13.1 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

13.2 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.3 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

13.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

13.5 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OPTION ADDENDUM

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PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS22917DBVR

TPS22917DBVT

TPS22917LDBVR

ACTIVE

SOT-23

DBV

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

-40 to 125

-45 to 125

1IAF

2K7F

Samples

NIPDAU

NIPDAU | SN

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

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28-May-2023

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

23-May-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS22917DBVR

TPS22917DBVT

TPS22917LDBVR

SOT-23

DBV

3000

250

180.0

8.4

3.2

1.4

4.0

8.0

3000

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

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23-May-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS22917DBVR

TPS22917DBVT

TPS22917LDBVR

SOT-23

DBV

3000

250

210.0

185.0

35.0

3000

Pack Materials-Page 2

PACKAGE OUTLINE

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

3.0

2.6

0.1 C

1.75

1.45

1.45 MAX

PIN 1

INDEX AREA

2X 0.95

1.9

3.05

2.75

0.50

0.25

C A B

0.15

0.00

0.2

(1.1)

TYP

0.25

GAGE PLANE

0.22

0.08

TYP

0.6

0.3

TYP

SEATING PLANE

4214840/C 06/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.

4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.

5. Refernce JEDEC MO-178.

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EXAMPLE BOARD LAYOUT

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X (0.95)

(R0.05) TYP

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4214840/C 06/2021

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

DBV0006A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

6X (1.1)

6X (0.6)

SYMM

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4214840/C 06/2021

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TPS22917 [TI]

相关型号：

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TPS22917DBVT

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