TPS22990 [TI]
具有可调节上升时间、电源正常指示和可选输出放电功能的 5.5V、10A、3.9mΩ 负载开关;
| 型号： | TPS22990 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节上升时间、电源正常指示和可选输出放电功能的 5.5V、10A、3.9mΩ 负载开关 开关 |
| 文件： | 总34页 (文件大小：5381K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
TPS22990 5.5V、10A、导通电阻为 3.9mΩ 的负载开关
1 特性
3 说明
1
•
集成单通道负载开关
VBIAS 电压范围：2.5V 至 5.5V
TPS22990 产品系列由两款器件组成：TPS22990 和
TPS22990N。这两款器件都是 3.9mΩ 单通道负载开
关，不但可以调节接通时间，而且还集成有 PG 指示
器。
•
•
•
VIN 电压范围：0.6V 至 VBIAS
导通电阻
–
RON = 3.9mΩ（VIN = 5V
(VBIAS = 5V) 时的典型值）
该系列器件包含一个可在 0.6V 至 5.5V 输入电压范围
内运行的 N 沟道 MOSFET，最高可支持
10A 持续电流。宽输入电压范围及高电流能力使得该
系列器件适用于多种设计与终端设备。3.9mΩ 的导通
电阻能够将负载开关两端的压降和负载开关的功耗降到
最低。
–
RON = 3.9mΩ（VIN = 3.3V
(VBIAS = 3.3V) 时的典型值）
•
•
10A 最大连续开关电流
静态电流
–
IQ,VBIAS = 63µA（VBIAS = 5V 时）
器件的可控上升时间可大幅降低大容量负载电容所产生
的浪涌电流，从而降低或消除电源压降。该器件可通过
CT 调节转换率，从而在设计中灵活权衡浪涌电流和上
电时序要求。集成的 PG 指示器会将负载开关的状态
通知给系统，从而实现无缝电源排序。
•
关断电流
–
–
ISD,VBIAS = 5.5µA（VBIAS = 5V 时）
ISD,VIN = 4nA（VBIAS = 5V、VIN = 5V 时）
•
•
•
•
•
可通过 CT 调节的受控转换率
电源正常 (PG) 指示器
快速输出放电 (QOD)（仅限 TPS22990）
带散热焊盘的 10 引脚 3mm × 2mm SON 封装
根据 JESD 22 测试得出的静电放电 (ESD) 性能
TPS22990 具有一个可选的 218Ω 片上电阻。当开关
被禁用时，可通过该电阻使输出快速放电，从而避免因
电源浮动而导致下游负载出现未知状态。
–
2kV 人体放电模式 (HBM) 和 1kV 器件充电模型
(CDM)
TPS22990 采用小型、节省空间的
10 引脚 3mm × 2mm SON 封装，此类封装集成有散
热焊盘，支持较高功耗。该器件在自然通风环境下的额
定运行温度范围为 –40°C 至 +105°C。
2 应用
•
•
•
•
•
笔记本、Chromebooks 和平板电脑
台式机和工业 PC
固态硬盘 (SSD)
服务器
器件信息(1)
器件型号
TPS22990
TPS22990N
封装
封装尺寸（标称值）
WSON (10)
3.00mm x 2.00mm
电信系统
(1) 要了解所有可用封装，请参见数据表末尾的可订购产品附录。
导通电阻与输入电压间的关系
典型应用
5.5
-40°C
25°C
VOUT
5.25
CT
NC
VOUT
85°C
5
CT
105°C
4.75
VOUT
CL
RL
Power Supply
RPU
VIN
VOUT
PG
4.5
4.25
4
VBIAS
CIN
ON
ON
GND
3.75
3.5
3.25
3
OFF
TPS22990
Copyright © 2016, Texas Instruments Incorporated
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
D008
VBIAS = 5V，IOUT = –200mA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSDK1
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
目录
9.2 Functional Block Diagram ....................................... 16
9.3 Feature Description................................................. 16
9.4 Device Functional Modes........................................ 18
10 Application and Implementation........................ 19
10.1 Application Information.......................................... 19
10.2 Typical Application ............................................... 22
11 Power Supply Recommendations ..................... 25
12 Layout................................................................... 25
12.1 Layout Guidelines ................................................. 25
12.2 Layout Example .................................................... 25
13 器件和文档支持 ..................................................... 26
13.1 文档支持................................................................ 26
13.2 接收文档更新通知 ................................................. 26
13.3 社区资源................................................................ 26
13.4 商标....................................................................... 26
13.5 静电放电警告......................................................... 26
13.6 Glossary................................................................ 26
14 机械、封装和可订购信息....................................... 26
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics—VBIAS = 5 V..................... 5
7.6 Electrical Characteristics—VBIAS = 3.3 V.................. 6
7.7 Switching Characteristics.......................................... 7
7.8 Typical Characteristics.............................................. 9
Parameter Measurement Information ................ 15
Detailed Description ............................................ 16
9.1 Overview ................................................................. 16
8
9
4 修订历史记录
Changes from Revision B (September 2016) to Revision C
Page
•
Updated VIH in Recommended Operating Conditions ............................................................................................................ 4
Changes from Revision A (July 2016) to Revision B
Page
•
•
Removed the status column from Device Comparison Table ................................................................................................ 3
Added the comment “(TPS22990 Only)” to the “RPD” cell in both Electrical Characteristics tables ...................................... 7
Changes from Original (May 2016) to Revision A
Page
•
已将器件状态从产品预览改为量产数据................................................................................................................................... 1
2
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
5 Device Comparison Table
DEVICE
TPS22990
TPS22990N
RON at VBIAS = 5 V
QOD
Yes
No
IMAX
10 A
10 A
ENABLE
Active high
Active high
3.9 mΩ
3.9 mΩ
6 Pin Configuration and Functions
DML Package
10-Pin WSON
Top View
DML Package
10-Pin WSON
Bottom View
VOUT 10
10 VOUT
CT
1
2
3
4
5
CT
NC
VIN
1
2
3
4
5
VOUT
VOUT
9
8
9
8
VOUT
VOUT
NC
VIN
(thermal pad)
VIN
(thermal pad)
VIN
VBIAS
ON
7
6
7
6
PG
VBIAS
ON
PG
GND
GND
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
2
3
4
5
6
7
8
9
10
CT
NC
O
VOUT slew rate control
Not internally connected
—
VIN
I
P
Switch input. Bypass this input with a ceramic capacitor to GND
Bias voltage. Power supply to the device
VBIAS
ON
I
Active high switch control input. Do not leave floating
Device ground
GND
PG
GND
O
Power good. Active high, open drain output. Tie to GND if not used
VOUT
O
I
Switch output
Switch input. VIN and thermal pad (exposed center pad) to alleviate thermal stress. See
the Layout section for layout guidelines
—
VIN (Thermal Pad)
Copyright © 2016–2017, Texas Instruments Incorporated
3
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
MAX
6
UNIT
V
VIN
Input voltage
VBIAS
VOUT
VON
VPG
VCT
IMAX
IPLS
TJ
Bias voltage
6
V
Output voltage
6
V
ON voltage
6
V
PG voltage
6
V
CT voltage
15
10
12
125
300
150
V
Maximum continuous switch current at TJ = 125°C
Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle
Maximum junction temperature
Maximum lead temperature (10-s soldering time)
Storage temperature
A
A
°C
°C
°C
TLEAD
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VBIAS
5.5
UNIT
VIN
Input voltage
Bias voltage
Output voltage
ON voltage
0.6
2.5
V
V
V
V
V
VBIAS
VOUT
VON
VPG
VIN
5.5
0
0
PG voltage
5.5
VBIAS = 2.5 V to 5 V, TA< 85°C
1.05
1.2
0
5.5
VIH, ON
High-level input voltage, ON
V
VBIAS = 2.5 V to 5.5 V, TA< 105°C
5.5
VIL, ON
CIN
Low-level input voltage, ON
Input capacitor
0.5
V
1(1)
µF
°C
TA
Operating free-air temperature
–40
105
(1) See the Application Information section.
4
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
7.4 Thermal Information
TPS22990
THERMAL METRIC(1)
DML (WSON)
UNIT
10 PINS
51.4
65
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
17
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.1
ψJB
17
RθJC(bot)
3.7
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics—VBIAS = 5 V
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ +105°C
(full) and VBIAS = 5 V. Typical values are for TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
63
5.5
76
77
7
IOUT = 0 A,
VIN = VON = 5 V
IQ, VBIAS
VBIAS quiescent current
VBIAS shutdown current
µA
µA
ISD, VBIAS
VON = 0 V, VOUT = 0 V
7
0.004
0.003
0.002
0.002
0.001
0.001
4
VIN = 5 V
10
3
VIN = 3.3 V
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
7
2
5
VON = 0 V,
VOUT = 0 V
ISD, VIN
VIN shutdown current
µA
2
4
1
3
1
2
ON pin input leakage
current
ION
VON = 5.5 V
VIN = 5 V
–40°C to +105°C
0.1
µA
VHYS,ON
IPG, LKG
VPG,OL
ON pin hysteresis
25°C
123
mV
µA
V
Leakage current into PG pin VPG = 5 V
PG output low voltage VON = 0 V, IPG = 1 mA
–40°C to +105°C
–40°C to +105°C
0.5
0.2
RESISTANCE CHARACTERISTICS
Copyright © 2016–2017, Texas Instruments Incorporated
5
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
Electrical Characteristics—VBIAS = 5 V (continued)
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ +105°C
(full) and VBIAS = 5 V. Typical values are for TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
25°C
3.9
3.9
3.9
3.9
3.9
3.9
4.8
5.7
6
VIN = 5 V
–40°C to +85°C
–40°C to +105°C
25°C
4.8
5.7
6
VIN = 3.3 V
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
–40°C to +85°C
–40°C to +105°C
25°C
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
25°C
IOUT = –200 mA,
VON = 5 V
RON
On-state resistance
mΩ
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
25°C
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
25°C
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
Output pull-down resistance VIN = VOUT = 5 V,
(TPS22990 Only) VON = 0 V
RPD
–40°C to +105°C
218
253
Ω
7.6 Electrical Characteristics—VBIAS = 3.3 V
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ +105°C
(full) and VBIAS = 3.3 V. Typical values are for TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
–40°C to +85°C
–40°C to +105°C
48
4.5
58
59
6
IOUT = 0 A,
VIN = VON = 3.3 V
IQ, VBIAS
VBIAS quiescent current
VBIAS shutdown current
µA
µA
ISD, VBIAS
VON = 0 V, VOUT = 0 V
7
0.003
0.002
0.002
0.001
0.001
3
VIN = 3.3 V
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
7
2
5
2
VON = 0 V,
VOUT = 0 V
ISD, VIN
VIN shutdown current
µA
4
1
3
1
2
ON pin input leakage
current
ION
VON = 5.5 V
VIN = 3.3 V
–40°C to +105°C
0.1
µA
VHYS,ON
IPG, LKG
VPG,OL
ON pin hysteresis
25°C
100
mV
µA
V
Leakage current into PG pin VPG = 5 V
PG output low voltage VON = 0 V, IPG = 1 mA
–40°C to +105°C
–40°C to +105°C
0.5
0.2
RESISTANCE CHARACTERISTICS
6
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
Electrical Characteristics—VBIAS = 3.3 V (continued)
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ +105°C
(full) and VBIAS = 3.3 V. Typical values are for TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
25°C
3.9
3.9
3.9
3.9
3.9
4.8
VIN = 3.3 V
–40°C to +85°C
–40°C to +105°C
25°C
5.7
6
4.8
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
–40°C to +85°C
–40°C to +105°C
25°C
5.7
6
4.8
IOUT = –200 mA,
VON = 5 V
RON
On-state resistance
–40°C to +85°C
–40°C to +105°C
25°C
5.7 mΩ
6
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
25°C
4.8
5.7
6
–40°C to +85°C
–40°C to +105°C
Output pull-down resistance VIN = VOUT = 3.3 V,
(TPS22990 Only) VON = 0 V
RPD
–40°C to +105°C
219
256
Ω
7.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER(1)
TEST CONDITIONS
MIN
TYP
MAX UNIT
VIN = 5 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
34
5.4
31
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
tF
2.3
21
µs
tD
tPG,ON
152
1.3
tPG,OFF PG turnoff time
VIN = 1.05 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
30
8
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
13
tF
2.2
24
µs
tD
tPG,ON
134
1.3
tPG,OFF PG turnoff time
VIN = 0.6 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
29
8.8
10
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
tF
2.2
24
µs
tD
tPG,ON
131
1.3
tPG,OFF PG turnoff time
(1) Turnoff time and fall time are dependent on the time constant at the load. For TPS22990N, there is no QOD. The time constant is
RL×CL. For TPS22990, internal pull down RPD is enabled when the switch is disabled. The time constant is (RPD//RL)×CL.
Copyright © 2016–2017, Texas Instruments Incorporated
7
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
MAX UNIT
Switching Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER(1)
TEST CONDITIONS
MIN
TYP
VIN = 3.3 V, VON = 5 V, VBIAS = 3.3 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
33
6.2
24
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
tF
2.4
22
µs
µs
µs
tD
tPG,ON
132
1.5
tPG,OFF PG turnoff time
VIN = 1.05 V, VON = 5 V, VBIAS = 3.3 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
30
8.7
12
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
tF
2.3
24
tD
tPG,ON
122
1.5
tPG,OFF PG turnoff time
VIN = 0.6 V, VON = 5 V, VBIAS = 3.3 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turnon time
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
RL = 10 Ω, CL = 0.1 µF, CT = 0 pF, RPU = 10 kΩ, CIN= 1 µF
30
9.4
9
Turnoff time
VOUT rise time
VOUT fall time
ON delay time
PG turnon time
tF
2.3
25
tD
tPG,ON
119
1.5
tPG,OFF PG turnoff time
8
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
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ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
7.8 Typical Characteristics
6.75
6.5
6.25
6
69
-40 èC
-40°C
25°C
85°C
105°C
66
25 èC
85 èC
105 èC
63
60
57
54
51
48
45
42
39
36
5.75
5.5
5.25
5
4.75
4.5
4.25
4
3.75
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
D001
D051
VON = 5 V
IOUT = 0 A
VIN = VBIAS
VON = 0 V
VOUT = 0 V
VIN = VBIAS
Figure 1. Quiescent Current vs Bias Voltage
Figure 2. Bias Shutdown Current vs Bias Voltage
0.35
0.3
0.35
0.3
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
0.25
0.2
0.25
0.2
0.15
0.1
0.15
0.1
0.05
0
0.05
0
-0.05
-0.05
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
Input Voltage (V)
Input Voltage (V)
D053
D052
VON = 0 V
VBIAS = 5 V
VOUT = 0 V
VON = 0 V
VBIAS = 3.3 V
VOUT = 0 V
Figure 4. Input Shutdown Current vs Input Voltage
Figure 3. Input Shutdown Current vs Input Voltage
4.75
4.5
4.25
4
4.75
4.5
4.25
4
VIN = 3.3 V
VIN = 1.8 V
VIN = 1.2 V
VIN = 1.05 V
VIN = 0.8 V
VIN = 0.6 V
VIN = 5 V
VIN = 3.3 V
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.6 V
3.75
3.5
3.25
3
3.75
3.5
3.25
3
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
Ambient Temperature (èC)
Ambient Temperature (èC)
D001
D001
VON = 5 V
VBIAS = 5 V
IOUT = –200mA
VON = 5 V
VBIAS = 3.3 V
IOUT = –200mA
Figure 6. On-Resistance vs Ambient Temperature
Figure 5. On-Resistance vs Ambient Temperature
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Typical Characteristics (continued)
5.5
5.5
5.25
5
-40 èC
-40°C
25°C
85°C
5.25
5
25 èC
85 èC
105 èC
105°C
4.75
4.5
4.25
4
4.75
4.5
4.25
4
3.75
3.5
3.25
3
3.75
3.5
3.25
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D007
D008
VON = 5 V
VBIAS = 3.3 V
IOUT = –200mA
VON = 5 V
VBIAS = 5 V
IOUT = –200mA
Figure 7. On-Resistance vs Input Voltage
Figure 8. On-Resistance vs Input Voltage
226
225
224
223
222
221
220
219
218
217
1.05
1.025
1
-40°C
25°C
85°C
-40°C
25°C
85°C
105°C
105°C
0.975
0.95
0.925
0.9
0.875
0.85
0.825
0.8
0.775
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
D001
D001
VON = 0 V
VOUT = VIN = 1.05 V
IOUT = 0 A
Figure 9. Output Pull-Down Resistance vs Bias Voltage
Figure 10. High-Level Input Voltage vs Bias Voltage
0.9
150
140
130
120
110
100
90
-40 èC
25 èC
85 èC
-40 èC
25 èC
85 èC
105 èC
0.85
105 èC
0.8
0.75
0.7
80
70
0.65
60
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Bias Voltage (V)
D061
D062
IOUT = 0 A
IOUT = 0 A
Figure 11. Low-Level Input Voltage vs Bias Voltage
Figure 12. Hysteresis vs Bias Voltage
10
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Typical Characteristics (continued)
40
42.5
40
-40 èC
-40 èC
38
36
34
32
30
28
26
24
22
25 èC
85 èC
105 èC
25 èC
85 èC
105 èC
37.5
35
32.5
30
27.5
25
22.5
20
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D062
D062
VBIAS = 3.3 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 5 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 13. Turnon Time vs Input Voltage
Figure 14. Turnon Time vs Input Voltage
10
9.5
9
9.5
9
-40 èC
-40 èC
25 èC
85 èC
105 èC
25 èC
85 èC
105 èC
8.5
8
8.5
8
7.5
7
7.5
7
6.5
6
6.5
6
5.5
5
5.5
0.6
4.5
0.5
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D020
D021
VBIAS = 3.3 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 5 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 15. Turnoff Time vs Input Voltage
Figure 16. Turnoff Time vs Input Voltage
37.5
35
31
29
27
25
23
21
19
17
15
13
11
9
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
32.5
30
27.5
25
22.5
20
17.5
15
12.5
10
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D024
D025
VBIAS = 3.3 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 5 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 17. Rise Time vs Input Voltage
Figure 18. Rise Time vs Input Voltage
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Typical Characteristics (continued)
4
3
2
1
4
-40°C
25°C
85°C
-40°C
25°C
85°C
105°C
105°C
3
2
1
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D020
D021
VBIAS = 3.3 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 5 V
CIN = 1 µF
VON = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 19. Fall Time vs Input Voltage
Figure 20. Fall Time vs Input Voltage
145
142.5
140
165
162
159
156
153
150
147
144
141
138
135
-40°C
25°C
85°C
-40°C
25°C
85°C
105°C
105°C
137.5
135
132.5
130
127.5
125
122.5
120
0.6
132
0.5
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D026
D027
VBIAS = 3.3 V
VON = 5 V
CT = 0 pF
VBIAS = 5 V
VON = 5 V
CT = 0 pF
RPU = 10 kΩ
CL = 0.1 µF
RL = 10 Ω
RPU = 10 kΩ
CL = 0.1 µF
RL = 10 Ω
Figure 21. PG Turnon Time vs Input Voltage
Figure 22. PG Turnon Time vs Input Voltage
2
1.8
1.6
1.4
1.2
2.4
2.2
2
-40°C
25°C
85°C
-40 èC
25 èC
85 èC
105 èC
105°C
1.8
1.6
1.4
1.2
1
1
0.5
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
3.3
1
1.5
2
2.5
3
3.5
4
4.5
5
Input Voltage (V)
Input Voltage (V)
D0287
D025
VBIAS = 3.3 V
VON = 5 V
CT = 0 pF
VBIAS = 5 V
VON = 5 V
CT = 0 pF
RPU = 10 kΩ
CL = 0.1 µF
RL = 10 Ω
RPU = 10 kΩ
CL = 0.1 µF
RL = 10 Ω
Figure 23. PG Turnoff vs Input Voltage
Figure 24. PG Turnoff Time vs Input Voltage
12
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Typical Characteristics (continued)
37.5
VBIAS = 2.5 V
VBIAS = 3.3 V
35
VBIAS = 5 V
VBIAS = 5.5 V
32.5
30
27.5
25
22.5
20
17.5
15
12.5
10
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VBIAS = 5 V
CIN = 1 µF
VIN = 1.05 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Input Voltage (V)
D030
TA= 25°C
CIN = 1 µF
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 26. Turnon Response
Figure 25. Rise Time vs Input Voltage
VBIAS = 5 V
CIN = 1 µF
VIN = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 3.3 V
CIN = 1 µF
VIN = 1.05 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 27. Turnon Response
Figure 28. Turnon Response
VBIAS = 3.3 V
CIN = 1 µF
VIN = 3.3 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 5 V
CIN = 1 µF
VIN = 1.05 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 29. Turnon Response
Figure 30. Turnon Response
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Typical Characteristics (continued)
VBIAS = 5 V
CIN = 1 µF
VIN = 5 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
VBIAS = 3.3 V
CIN = 1 µF
VIN = 1.05 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 31. Turnoff Response
Figure 32. Turnoff Response
VBIAS = 3.3 V
CIN = 1 µF
VIN = 3.3 V
CL = 0.1 µF
CT = 0 pF
RL = 10 Ω
Figure 33. Turnoff Response
14
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8 Parameter Measurement Information
CT
VOUT
VOUT
CT
NC
RL
CL
Power
Supply
RPU
VIN
VOUT
PG
Power
Supply
VBIAS
CIN
ON
ON
GND
OFF
TPS22990
Copyright © 2016, Texas Instruments Incorporated
Figure 34. Timing Test Circuit
VON
50%
50%
tOFF
90%
tON
90%
50%
VOUT
50%
10%
10%
tF
tD
tR
tPG,OFF
tPG,ON
50%
50%
VPG
Rise and fall times of the control signals is 100 ns.
Figure 35. Timing Waveforms
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9 Detailed Description
9.1 Overview
The TPS22990 device is a single channel load switch with a controlled adjustable turnon and integrated PG
indicator. The device contains an N-channel MOSFET that can operate over an input voltage range of 0.6 V to
5.5 V and can support a maximum continuous current of 10 A. The wide input voltage range and high current
capability enable the devices to be used across multiple designs and end equipment. 3.9-mΩ On-resistance
minimizes the voltage drop across the load switch and power loss from the load switch.
The controlled rise time for the device greatly reduces inrush current caused by large bulk load capacitances,
thereby reducing or eliminating power supply droop. The adjustable slew rate through CT provides the design
flexibility to trade off the inrush current and power up timing requirements. Integrated PG indicator notifies the
system about the status of the load switch to facilitate seamless power sequencing.
During shutdown, the device has very low leakage current, thereby reducing unnecessary leakages for
downstream modules during standby. The TPS22990 has an optional 218-Ω On-chip resistor for quick discharge
of the output when switch is disabled.
9.2 Functional Block Diagram
PG
VIN
Charge
Pump
VBIAS
Control
Logic
Driver
ON
CT
VOUT
TPS22990 Only
GND
Copyright © 2016, Texas Instruments Incorporated
9.3 Feature Description
9.3.1 On and Off Control
The ON pin controls the state of the load switch. Asserting the pin high enables the switch. The minimum voltage
that guarantees logic high is 1.2 V. This pin cannot be left floating and must be tied either high or low for proper
functionality.
16
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Feature Description (continued)
9.3.2 Adjustable Rise Time
The TPS22990 has controlled rise time for inrush current control. A capacitor to GND on the CT pin adjusts the
rise time. Without any capacitor on the CT, the rise time is at its minimum for fastest timing. The voltage on the
CT pin can be as high as 15 V; therefore the minimum voltage rating for the CT capacitor must be 25 V for
optimal performance. An approximate equation for the relationship between CT, VIN and rise time when VBIAS is
set to 5 V is shown in Equation 1. As shown in Figure 35, rise time is defined as from 10% to 90% measurement
on VOUT
.
tR = 0.011ìV + 0.002 ìC + 4.7 ìV + 7.8
IN
T
IN
where
•
•
•
tR is the rise time (in µs)
VIN is the input voltage (in V)
CT is the capacitance value on the CT pin (in pF)
(1)
Table 1 contains rise time values measured on a typical device. Rise times shown below are only valid for the
power-up sequence where VIN and VBIAS are already in steady state condition before the ON pin is asserted
high.
Table 1. Rise Time vs CT Capacitor
Rise Time (µs) at 25°C
CL = 0.1 uF, CIN = 1 uF, RL = 10 Ω, VBIAS = 5 V
CT (pF)
VIN = 5 V
30.5
VIN = 3.3 V
VIN = 1.8 V
17.5
VIN = 1.05 V
VIN = 0.6 V
9.5
0
24.8
34
12.6
15.8
18.8
25.2
40.9
72.8
146.9
220
44.6
22.7
11.4
470
56.6
42.2
61.1
107
27.1
13.2
1000
2200
4700
10000
85
38.9
17.9
154.6
284.6
598.5
64.7
27.7
193.5
404.8
114.4
233.2
48.1
98.6
9.3.3 Power Good (PG)
The TPS22990 has a power good (PG) output signal to indicate the gate of the pass FET is driven high and the
switch is on with the On-resistance close to its final value (full load ready). The signal is an active high and open
drain output which can be connected to a voltage source through an external pull up resistor, RPU. This voltage
source can be VOUT from the TPS22990 or another external voltage. VBIAS is required for PG to have a valid
output. Equation 2 below shows the approximate equation for the relationship between CT, VIN and PG turnon
time (tPG,ON) when VBIAS is set to 5 V.
tPG,ON = (0.013 *VIN + 0.04) *CT + 4.7 *VIN +129
where
•
•
•
tPG,ON is the PG turnon time (in µs)
VIN is the input voltage (in V)
CT is the capacitance value on the CT pin (in pF)
(2)
Table 2 contains PG turnon time values measured on a typical device.
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Table 2. PG Turnon Time vs CT Capacitor
Typical PG turnon time (us) at 25°C
CL = 0.1 uF, CIN = 1 uF, RL = 10 Ω, VBIAS = 5 V, RPU = 10 kΩ
CT (pF)
VIN = 5 V
151.9
177.7
200.9
257.2
390.6
636.4
1239
VIN = 3.3 V
144.4
VIN = 1.8 V
137.5
VIN = 1.05 V
133.9
VIN = 0.6 V
0
131.3
143.5
154.4
181.3
241.6
353.3
627.4
220
164.6
153.3
147.1
470
183.2
167.4
159.2
1000
2200
4700
10000
227.8
202.5
189.5
332.3
282.4
257.1
525.6
429.8
382.7
999.8
792.4
689.4
9.3.4 Quick Output Discharge (QOD) (TPS22990 Only)
The TPS22990 family includes an optional QOD feature. When the switch is disabled, a discharge resistor is
connected between VOUT and GND. This resistor has a typical value of 218 Ω and prevents the output from
floating while the switch is disabled.
9.4 Device Functional Modes
Table 3 shows the function table for TPS22990.
Table 3. Function Table
(1)
ON
L
VIN to VOUT
OFF
OUTPUT DISCHARGE
ENABLED
H
ON
DISABLED
(1) This feature is in the TPS22990 only (not in TPS22990N).
18
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 Input to Output Voltage Drop
The input to output voltage drop in the device is determined by the RON of the device and the load current. The
RON of the device depends upon the VIN and VBIAS condition of the device. See the RON specification in the
Electrical Characteristics—VBIAS = 5 V table of this datasheet. Once the RON of the device is determined based
upon the VIN and VBIAS conditions, use Equation 3 to calculate the input to output voltage drop.
DV = ILOAD ì RON
where
•
•
•
•
ΔV is the voltage drop from VIN to VOUT
ILOAD is the load current
RON is the on-resistance of the device for a specific VIN and VBIAS
An appropriate ILOAD must be chosen such that the IMAX specification of the device is not violated
(3)
10.1.2 Input Capacitor
It is recommended to use a capacitor between VIN and GND close to the device pins. This helps limit the voltage
drop on the input supply caused by transient inrush currents when the switch is turned on into a discharged
capacitor at the load. A 1-μF ceramic capacitor, CIN, is usually sufficient. Higher values of CIN can be used to
further reduce the voltage drop. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by
inrush currents during startup, where CL is the load capacitance.
10.1.3 Thermal Consideration
The maximum junction temperature should be limited to below 125°C. Use Equation 4 to calculate the maximum
allowable dissipation, PD(max) for a given output load current and ambient temperature. RθJA is highly dependent
upon board layout.
TJ max -TA
(
)
PD max
=
(
)
RꢀJA
where
•
•
•
•
PD(max) is the maximum allowable power dissipation
TJ(max) is the maximum allowable junction temperature
TA is the ambient temperature
RθJA is the junction-to-air thermal impedance
(4)
10.1.4 PG Pull Up Resistor
The PG output is an open drain signal which connects to a voltage source through a pull up resistor RPU. The PG
signal can be used to drive the enable pins of downstream devices, EN. PG is active high, and its voltage is
given by Equation 5.
Copyright © 2016–2017, Texas Instruments Incorporated
19
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
Application Information (continued)
VPG =VOUT - I
+ IEN,LK ìR
PG,LK
PU
where
•
•
•
•
VOUT is the voltage where PG is tied to
IPG,LK is the leakage current into PG pin
IEN,LK is the leakage current into the EN pin driven by PG
RPU is the pull up resistance
(5)
VPG needs to be higher than VIH, MIN of the EN pin to be treated as logic high. The maximum RPU is determined
by Equation 6.
VOUT -VIH,MIN
IPG,LK + IEN,LK
RPU,MAX =
(6)
When PG is disabled, with 1 mA current into PG pin (IPG = 1 mA), VPG,OL is less than 0.2 V and treated as logic
low as long as VIL,MAX of the EN pin is greater than 0.2 V. The minimum RPU is determined by Equation 7.
VOUT
RPU,MIN
=
IPG + IEN,LK
(7)
RPU can be chosen within the range defined by RPU,MIN and RPU,MAX. RPU = 10 kΩ is used for characterization.
10.1.5 Power Sequencing
The TPS22990 has an integrated power good indicator which can be used for power sequencing. As shown in
Figure 36, the switch to the second load is controlled by the PG signal from the first switch. This ensures that the
power to load 2 is only enabled after the power to load 1 is enabled and the first switch is full load ready.
20
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
Application Information (continued)
Load 1
CT
NC
VOUT
VOUT
CT
Power
Supply 1
RPU
VIN
VOUT
PG
Power
Supply
VBIAS
ON
CIN
GPIO
GND
MCU
TPS22990
Load 2
CT
NC
VOUT
VOUT
CT
Power
Supply 2
RPU
VIN
VOUT
PG
VBIAS
ON
CIN
GND
TPS22990
Copyright © 2016, Texas Instruments Incorporated
Figure 36. Power Sequencing
10.1.6 Standby Power Reduction
Any end equipment that is being powered from a battery has a need to reduce current consumption in order to
maintain the battery charge for a longer time. The TPS22990 devices help to accomplish this reduction by turning
off the supply to the downstream modules that are in standby state and significantly reduce the leakage current
overhead of the standby modules as shown in Figure 37.
Copyright © 2016–2017, Texas Instruments Incorporated
21
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
Application Information (continued)
Always ON
Module
Standby
Module
CT
NC
VOUT
VOUT
CT
Power
Supply
VIN
VOUT
PG
Power
Supply
VBIAS
ON
CIN
GPIO
GND
MCU
TPS22990
Copyright © 2016, Texas Instruments Incorporated
Figure 37. Standby Power Reduction
10.2 Typical Application
Figure 38 demonstrates how to use TPS22990 to limit inrush current to output capacitance.
CT
NC
VOUT
VOUT
CT
RL
CL
Power
Supply
RPU
VIN
VOUT
PG
Power
Supply
VBIAS
CIN
ON
ON
GND
OFF
TPS22990
Copyright © 2016, Texas Instruments Incorporated
Figure 38. Powering a Downstream Module
22
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
Typical Application (continued)
10.2.1 Design Requirements
For this design example, use the input parameters shown in Table 4.
Table 4. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
VBIAS
3.3 V
1.05 V
10 μF
VIN
CL
RL
None
Maximum acceptable inrush current
100 mA
10.2.2 Detailed Design Procedure
10.2.2.1 Managing Inrush Current
When the switch is enabled, the output capacitors must be charged up from 0 V to VIN. This charge arrives in the
form of inrush current. Inrush current can be calculated using Equation 8.
0.8ìV
dV
dt
IN
IINRUSH = CL ì
ö CL ì
tR
where
•
•
•
•
•
IINRUSH is the Inrush current
CL is the Load capacitance
dV/dt is the Output slew rate
VIN is the Input voltage
tR is the rise time
(8)
Minimum acceptable rise time can be calculated using the design requirements and the inrush current equation.
See Equation 9.
0.8 ìV ìCL
IN
tR =
= 84ꢀs
IINRUSH
(9)
The TPS22990 has very fast timing without a CT capacitor (CT). The typical rise time is 12 μs at VBIAS = 3.3 V,
VIN = 1.05 V, RL = 10 Ω, and CL = 0.1 µF. As shown in Figure 39, the rise time is much smaller than 84 µs and
the inrush current is 460 mA without CT. The CT for the required rise time must be calculated using Equation 1.
For 84 µs, the calculated CT = 5259 pF. Figure 40 shows the inrush current is less than 100 mA with CT = 6800
pF.
Copyright © 2016–2017, Texas Instruments Incorporated
23
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
10.2.3 Application Curves
Figure 39. . Inrush Current with CT = 0 pF
Figure 40. Inrush Current with CT = 6800 pF
24
Copyright © 2016–2017, Texas Instruments Incorporated
TPS22990
www.ti.com.cn
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
11 Power Supply Recommendations
The device is designed to operate with a VBIAS range of 2.5 V to 5.5 V, and a VIN range of 0.6 V to VBIAS. The
supply must be well regulated and placed as close to the device terminal as possible with the recommended 1-
μF bypass capacitor. If the supply is located more than a few inches from the device terminals, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. In the case where the power supply is
slow to respond to a large load current step, additional bulk may also be required. If additional bulk capacitance
is required, an electrolytic, tantalum, or ceramic capacitor of 10 μF may be sufficient.
12 Layout
12.1 Layout Guidelines
For best performance, all traces must be as short as possible. To be most effective, the input and output
capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects.
The CT trace must be as short as possible to reduce parasitic capacitance.
12.2 Layout Example
VIA to Power Ground Plane
VIA to VIN Plane
10
VOUT
CT
NC
VIN
1
2
3
4
5
CT
Capacitor
9
8
VOUT
VOUT
VIN
(thermal pad)
VBIAS
Bypass
Capacitor
RPU
VOUT
Bypass
7
6
VBIAS
ON
PG
Capacitor
GND
To GPIO
control
VIN
Bypass
Capacitor
Copyright © 2016, Texas Instruments Incorporated
Figure 41. Layout Example
版权 © 2016–2017, Texas Instruments Incorporated
25
TPS22990
ZHCSF87C –MAY 2016–REVISED SEPTEMBER 2017
www.ti.com.cn
13 器件和文档支持
13.1 文档支持
13.1.1 相关文档
请参阅如下相关文档：
•
•
《TPS22990 负载开关评估模块》，SLVUAS2
《负载开关导通电阻基础》，SLVA771
13.2 接收文档更新通知
如需接收文档更新通知，请访问 ti.com 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
13.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据如有变更，恕不另行通知
和修订此文档。如欲获取此数据表的浏览器版本，请参阅左侧的导航。
26
版权 © 2016–2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS22990DMLR
TPS22990DMLT
TPS22990NDMLR
TPS22990NDMLT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
WSON
WSON
WSON
WSON
DML
DML
DML
DML
10
10
10
10
3000 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR
250 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR
3000 RoHS & Green
250 RoHS & Green
-40 to 105
-40 to 105
-40 to 105
-40 to 105
RB990
RB990
NIPDAUAG
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
RB990N
RB990N
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Mar-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS22990NDMLR
TPS22990NDMLT
WSON
WSON
DML
DML
10
10
3000
250
180.0
180.0
8.4
8.4
2.3
2.3
3.2
3.2
1.0
1.0
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Mar-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS22990NDMLR
TPS22990NDMLT
WSON
WSON
DML
DML
10
10
3000
250
213.0
213.0
191.0
191.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DML0010A
WSON - 0.8 mm max height
SCALE 4.500
PLASTIC SMALL OUTLINE - NO LEAD
A
2.1
1.9
B
PIN 1 INDEX AREA
3.1
2.9
0.8 MAX
C
SEATING PLANE
0.08 C
1.1±0.1
PKG
(0.2) TYP
0.35
0.15
7X
0.05
0.00
EXPOSED
THERMAL PAD
0.29
0.19
7X
0.1
C A
B
6
0.05
5
1
0.02
PKG
2
2.6±0.1
5X 0.5
2X 0.56
1
10
0.33
0.23
3X
PIN 1 ID
(OPTIONAL)
0.1
C A
B
2X (0.125)
0.05
C
0.35
0.15
4222524/A 11/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DML0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
3X (0.45)
3X (0.28)
2X (0.125)
7X (0.45)
1
10
2X
(0.56)
7X (0.24)
(0.02)
(2.6)
PKG
5X (0.5)
2X (1)
(R0.05) TYP
5
6
(
0.2) VIA
TYP
PKG
(1.1)
(1.95)
LAND PATTERN EXAMPLE
SCALE:25X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
THERMAL PAD & PADS 8-10
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222524/A 11/2015
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DML0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
2X
EXPOSED METAL
SOLDER MASK
EDGE, TYP
PKG
3X (0.45)
3X (0.28)
7X (0.45)
10
1
2X
(0.56)
7X (0.24)
METAL UNDER
SOLDER MASK
TYP
EXPOSED METAL
TYP
PKG
(0.02)
5X (0.5)
2X
(0.674)
2X
(1.148)
(R0.05) TYP
5
6
METAL UNDER
SOLDER MASK
TYP
2X (1.038)
(1.95)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
83% PRINTED SOLDER COVERAGE BY AREA
SCALE:35X
4222524/A 11/2015
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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