TPS5206 [TI]
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT; 开关电源的控制电路
| 型号： | TPS5206 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SWITCHING-POWER-SUPPLY CONTROL CIRCUIT |
| 文件： | 总7页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
N PACKAGE
(TOP VIEW)
•
Single-Chip Switching-Power-Supply
Control With Limited External Components
•
•
Built-In PWM Control Circuit
REF
PGO
SVP5
SVP12
CPR
CPG
PGI
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Open-Collector Output for Direct Drive of
Transformer
EA+
EA–
EAO
•
•
Variable Dead-Time Control
Overvoltage and Undervoltage Detection
and Latch-Up for Each Supply Voltage:
5 V, 12 V, –5 V, and –12 V
DT
V
CC
CUV
SC
•
•
•
System Overcurrent Protection
Wide Supply Range From 7 V to 40 V
Power-Good Indicator Function
SVN5
SVN12
D1
CT
D2
GND
description
The TPS5206CN is a bipolar monolithic integrated circuit designed for push-pull-type switching-power-supply
(SPS) control in desktop PC applications. It offers pulse-width-modulation (PWM) control and power-supply
supervisor functions, including detection of undervoltage and overvoltage conditions on ±5 V and ±12 V system
supplies. It also detects overcurrent conditions on the SPS system output. This single chip reduces the total
component count and provides additional design flexibility, which minimizes cost and printed-circuit-board
(PCB) space requirements in present and new SPS designs.
overvoltage-protection lockout feature
The overvoltage-protection lockout feature monitors four different supply voltages. When an overvoltage (OV)
condition is detected, the power-good output (PGO) is set low and the PWM function is disabled. The OV
condition is detected on the SVP5, SVP12, SVN5, and SVN12 inputs. Threshold voltages are typically 5.9 V,
14.1 V, –8.4 V, and –15.3 V, respectively.
undervoltage-protection lockout feature
The undervoltage-protection lockout feature monitors four different supply voltages. When an undervoltage
(UV) condition is detected, the power-good output (PGO) is set low and the PWM function is disabled. The UV
condition is detected on the SVP5, SVP12, SVN5, and SVN12 inputs. Threshold voltages are typically 3.9 V,
9.5 V, –3.4 V, and –9.3 V, respectively.
overcurrent-protection lockout feature
The overcurrent (OC) protection lockout feature is designed to protect the SPS from excessive load or
short-circuit conditions. The circuit converts the output current of the SPS to a voltage, which is then monitored
at SC. It sets PG low and shuts down the PWM circuit when the sensed voltage is higher than 5 V.
reference regulator
The internal 5-V reference regulator is designed primarily to provide the internal circuitry with a stable supply
rail for varying input voltages. The regulator employs a band-gap circuit as its primary reference to maintain
thermal stability of less than 100-mV variation over the operating free-air temperature range of 0°C to 70°C. In
addition to supplying an internal reference, the regulator provides a precision 5-V reference that can support
5 mA of load current for external bias circuits. The regulated voltage has a margin of error of 2%. Short-circuit
protection is provided to protect the internal circuit from overload or short-circuit conditions.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
oscillator
The timing capacitor (CT) is charged by the oscillator with a 350-µA current source set by the timing resistor
(RT) (10 kΩ), internally. This produces a linear-ramp voltage waveform across CT. When the voltage across CT
reaches 3 V, it is discharged by the oscillator circuit and the charging cycle is reinitiated. The frequency of the
oscillator is programmable over a range of 1 kHz to 300 kHz by the selection of CT. The programmed frequency
4
of the oscillator can be calculated with the equation f = 1/(10 × CT). The PWM output frequency is one-half of
the oscillator frequency.
dead-time (DT) control
The DT input provides control of minimum dead time (off time). An input offset of 110 mV ensures a minimum
dead time of 3% with the DT input grounded. Additional dead time can be imposed by applying voltage to the
DT input. This provides a linear control of the dead time from its minimum of 3% to its maximum of 100% as
the DT input voltage varies from 0 V to 3.3 V. The DT input is a relatively high-impedance input and is used where
additional control of the output duty cycle is required. The input must be terminated; leaving this terminal open
causes an undefined condition.
pulse-width modulation
The ramp voltage across CT is compared to the output of the error amplifier. The CT input incorporates a series
diode, which is omitted from the DT control input. This requires the error-amplifier output to be 0.7-V greater
than the voltage across CT to inhibit the PWM output. This also ensures PWM maximum-
duty-cycle operation without requiring the control voltage to sink to true ground potential. The output pulse width
varies from 97% of the period to 0 as the voltage at the error-amplifier output varies from 0.5 V to 3.5 V.
error amplifier
The high-gain error amplifier receives bias from the V power rail. The inverting input, EA–, is biased by V /2
CC
ref
internally. The amplifier output is biased low by a current sink to provide PWM maximum duty cycle when the
amplifier is off. Since the amplifier output is biased low only through I of 300 µA (see functional block
O(sink)
diagram), bias current required by external circuitry into the amplifier output for feedback must not exceed the
capability of I
; otherwise, the PWM maximum duty cycle is limited.
O(sink)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
functional block diagram
1
REF
+
Reference
Regulator
15
14
3
_
V
CC
SC
SVP5
Overvoltage/
Undervoltage
Protection
8
SVN5
4
SVP12
SVN12
9
5
7
CPR
CUV
19
+
_
PGI
+
_
†
V
ref
2
2
†
PGO
D1
V
ref
2
20
10
CPG
‡
110 mV
6
+
_
DT
CT
11
D
13
_
+
CLK
GND
OSC
‡
0.7 V
18
17
12
+
_
EA+
EA–
D2
300 µA
†
V
ref
2
16
EAO
†
‡
Internally generated voltage
Fixed-voltage offset
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO.
CPG
CPR
CT
20
5
O
O
O
O
O
O
I
Power-good-capacitor connection. Connects a capacitor to power-good signal delay.
Protection-delay-capacitorconnection. Connects a capacitor to protection-delay circuit to bypass high-frequency noise.
Timing capacitor. Connects a capacitor to sawtooth oscillator circuit for programming the operating frequency.
UV capacitor connection. Connects a capacitor to UV power-on delay circuit to avoid malfunction in the initial state.
PWM driver-1 output
13
7
CUV
D1
10
12
6
D2
PWM driver-2 output
DT
Dead time. Control input to control the PWM minimum dead time (off time).
Error-amplifier inverting input
EA–
EA+
EAO
GND
PGI
PGO
REF
SC
17
18
16
11
19
2
I
I
Error-amplifier noninverting input
I/O Error-amplifier output
Ground
I
Power-good input
O
O
I
Power-good output
1
5-V reference voltage output
14
Overcurrent sense input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME NO.
SVN5
8
9
I
I
–5-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low.
SVN12
–12-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to
low.
SVP5
3
4
I
I
5-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low.
12-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low.
Supply voltage
SVP12
V
CC
15
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
CC
Amplifier input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V + 0.3 V
Collector output voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Collector output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA
Total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
I
CC
O
O
Operating free-air temperature range, T
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
T
≤ 25°C
OPERATING FACTOR
T = 70°C
A
POWER RATING
A
PACKAGE
POWER RATING
ABOVE T = 25°C
A
N
1150 mW
9.2 mW/°C
736 mW
recommended operating conditions
MIN
MAX
40
UNIT
V
Supply voltage, V
7
CC
Collector output voltage, V
, V
O(D1) O(D2)
40
V
O(D1) O(D2)
, I
Collector output current, I
Timing capacitor, CT
150
mA
nF
°C
0.47 10000
70
Operating free-air temperature, T
0
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
electrical characteristics over recommended operating free-air temperature range, V
= 15 V
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
5.1
UNIT
V
ref
Reference output voltage
I
O
= 5 mA
4.9
5
V
SVP5 = 5 V,
SVN5 = –5 V,
SVP12 = 12 V,
SVN12 = –12 V,
High-level input voltage, SC overcurrent
protection
V
5.1
V
V
IH(SC)
IL(SC)
V
≥ 3.5 V
O(DT)
SVP5 = 5 V,
SVN5 = –5 V,
SVP12 = 12 V,
SVN12 = –12 V,
Low-level input voltage, SC overcurrent
protection
V
4.9
V
≤ 0.4 V
O(DT)
SVP12 = 12 V,
SVN12 = –12 V,
SVN5 = –5 V,
SVP5
3.5
9
3.9
9.5
4.5
10.5
–4
V
≤ 0.4 V
O(DT)
SVN5 = –5 V,
V ≤ 0.4 V
SVP5 = 5 V,
SVN12 = –12 V,
SVP12
O(DT)
SVP12 = 12 V,
V ≤ 0.4 V
Input threshold voltage,
undervoltage sense
V
IT(UV)
V
SVP5 = 5 V,
SVN12 = –12 V,
SVN5
–3
–3.4
–9.3
5.9
O(DT)
SVP12 = 12 V,
V ≤ 0.4 V
SVP5 = 5 V,
SVN5 = –5 V,
SVN12
SVP5
–8
–10
6.3
O(DT)
SVN5 = –5 V,
V ≤ 0.4 V
SVP12 = 12 V,
SVN12 = –12 V,
5.5
13.5
–7
O(DT)
SVN5 = –5 V,
V ≤ 0.4 V
SVP5 = 5 V,
SVN12 = –12 V,
SVP12
14.1
–8.4
14.8
–9
O(DT)
SVP12 = 12 V,
V ≤ 0.4 V
Input threshold voltage,
overvoltage sense
V
IT(OV)
V
V
SVP5 = 5 V,
SVN12 = –12 V,
SVN5
O(DT)
SVP12 = 12 V,
V ≤ 0.4 V
O(DT)
SVP5 = 5 V,
SVN5 = –5 V,
SVN12
–14 –15.3
–16
I
I
I
= 0
0.4
2.5
V
V
,
OL
OL(D1)
OL(D2)
Low-level output voltage, output drivers
V
≥ 3.5 V
O(DT)
= 150 mA
= –250 µA
1.6
OL
V
V
V
Dead-time output voltage
High-level input voltage, PGI
Low-level input voltage, PGI
SVP5 = 7 V,
3.5
2.8
V
V
V
O(DT)
O(DT)
V
V
V
≥ 4 V,
See Figure 3
See Figure 3
IH(PGI)
IL(PGI)
O(PGO)
≤ 0.4 V,
2.42
2.6
O(PGO)
= 4 V,
V
≥ 4 V,
I(PGI)
O(PGO)
O(PGO)
O(PGO)
O(PGO)
V
V
V
V
High-level input voltage, CPG
Low-level input voltage, CPG
High-level output voltage, PGO
Low-level output voltage, PGO
2.95
4.75
V
V
V
V
IH(CPG)
IL(CPG)
See Figure 4
V
= 4 V,
V
≤ 0.4 V,
I(PGI)
See Figure 4
V
= 4 V,
I
I
= –240 µA,
= 9.6 mA,
CPG
See Figure 5
OH(PGO)
OL(PGO)
V
= 0 V,
CPG
See Figure 6
0.4
32
I
f
Standby supply current
Oscillator frequency
All other inputs and outputs open
= 1200 pF
mA
CC
C
80
kHz
osc
T
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER
TEST CONDITIONS
L → H, See Figures 4 and 6
MIN
TYP
MAX
UNIT
t
t
Rise time of power good
V
L → H,
V
100
ns
r
CPG
O(PGO)
CPG = 2.2 µF,
H → L,
R
V
= 150 kΩ,
L
Delay time of power good
500
600
µs
d
H → L, V
See Figures 4 and 6
I(PGI)
O(PGO)
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TPS5206CN
SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A – APRIL 1994 – REVISED SEPTEMBER 1994
APPLICATION INFORMATION
V
CC
= 15 V
V
CC
= 15 V
DT
SVP5
SVP12
SVN5
Test Output
1500 pF
EAO
CT
Test Input
EA+
SVN12
1 kΩ
1 kΩ
EA–
CS
Open
D1
D2
Test Input
PGO
PGI
REF
CUV
Open
Test Output
Test Input
CPR
CPG
Open
Open
1 kΩ
Figure 1. Test Circuit
_
+
2.5 V
PGI
_
+
_
2.5 V
PGI = 4 V
PGO
+
_
+
PGO
†
2.5 V
†
2.5 V
CPG
CPG
(open)
Figure 2. PGI Input Voltage Test Circuit
Figure 3. CPG Input Voltage and PGO Output
Voltage Test Circuit
5 V
_
+
2.5 V
PGI
+
PGO
_
2.2 µF
†
2.5 V
Figure 4. PG Delay Time and Rise Time Test Circuit
†
Internally biased at V /2 or 2.5 V
ref
V
V
IH
PGI
10%
IL
V
V
OH
90%
PGO
10%
10%
OL
t
r
t
d
Figure 5. PG Output Voltage Waveform
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
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