TPS61088RHLT [TI]
10A 全集成同步升压转换器 | RHL | 20 | -40 to 125;
| 型号： | TPS61088RHLT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 10A 全集成同步升压转换器 | RHL | 20 | -40 to 125 升压转换器 开关 |
| 文件： | 总35页 (文件大小：2103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS61088
ZHCSDP8D –MAY 2015 –REVISED AUGUST 2021
TPS61088 10A 全集成同步升压转换器
1 特性
3 说明
• 2.7V 至12V 输入电压范围
• 4.5V 至12.6V 输出电压范围
• 10A 开关电流
• 效率高达91%（VIN = 3.3V、VOUT = 9V 且IOUT
3 A 时）
TPS61088 是一款高功率密度的全集成同步升压转换
器，配有一个 11mΩ功率开关和一个 13mΩ整流器开
关，可为便携式系统提供高效率的小尺寸解决方案。
TPS61088 具有2.7V 至12V 的宽输入电压范围，可支
持由单芯或两芯锂电池供电的应用。该器件具备 10A
开关电流能力，并且能够提供高达 12.6V 的输出电
压。
=
• 在轻负载条件下，有PFM 模式和强制PWM 模式
可供选择
• 关断期间，流入VIN 引脚的电流为1.0µA
• 可通过电阻编程的开关峰值电流限制
• 可调开关频率：200kHz 至2.2MHz
• 可编程软启动
• 13.2V 输出过压保护
• 逐周期过流保护
• 热关断
• 20 引脚4.50mm × 3.50mm VQFN 封装
• 使用TPS61088 并借助WEBENCH Power
Designer 创建定制设计方案
TPS61088 采用自适应恒定关断时间峰值电流控制拓扑
结构来调节输出电压。在中等到重负载条件下，
TPS61088 在脉宽调制 (PWM) 模式下工作。在轻负载
条件下，该器件可通过 MODE 引脚选择下列两种工作
模式之一。一种是可提高效率的脉宽调制 (PFM) 模
式；另一种是可避免因开关频率较低而引发应用问题的
强制 PWM 模式。可通过外部电阻在 200kHz 至
2.2MHz 范围内调节 PWM 模式下的开关频率。
TPS61088 还实现了可编程的软启动功能和可调节的开
关峰值电流限制功能。此外，该器件还提供有 13.2V
输出过压保护、逐周期过流保护和热关断保护。
2 应用
• 便携式刷卡机(POS) 终端
• Bluetooth™ 扬声器
• 电子烟
• Thunderbolt 接口
• 快充移动电源
TPS61088 采用 20 引脚 4.50mm × 3.50mm VQFN 封
装。
器件信息(1)
封装尺寸（标称值）
器件型号
TPS61088
封装
VQFN (20)
4.50mm × 3.50mm
C6
L1
VIN
VOUT
BOOT
SW
VOUT
FB
C4
R1
FSW
VIN
R2
R3
C2
C1
R5
R4
C5
VCC
EN
COMP
ILIM
C3
ON
OFF
C7
SS
PGND
AGND
MODE
典型应用电路
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSCM8
TPS61088
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ZHCSDP8D –MAY 2015 –REVISED AUGUST 2021
Table of Contents
8 Application and Implementation..................................14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
9 Power Supply Recommendations................................22
10 Layout...........................................................................23
10.1 Layout Guidelines................................................... 23
10.2 Layout Example...................................................... 23
10.3 Thermal Considerations..........................................24
11 Device and Documentation Support..........................25
11.1 Device Support........................................................25
11.2 接收文档更新通知................................................... 25
11.3 支持资源..................................................................25
11.4 Trademarks............................................................. 25
11.5 Electrostatic Discharge Caution..............................25
11.6 术语表..................................................................... 25
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram.........................................10
7.3 Feature Description...................................................10
7.4 Device Functional Modes..........................................12
Information.................................................................... 25
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision C (February 2019) to Revision D (August 2021)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式。..................................................................................... 1
Changes from Revision B (September 2018) to Revision C (February 2019)
Page
• Corrected spelling of 'resister' to 'resistor' in the Pin Functions table.................................................................3
• Added caption to Functional Block Diagram as auto-number 图7-1................................................................10
• Added cross-reference hyperlink in the Enable and Startup section pointing to C7 reference in 图8-1..........10
• Inserted missing cross-reference hyperlink in 节8.2.2.4 section pointing to 图8-1 circuit in the Typical
Application section............................................................................................................................................15
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5 Pin Configuration and Functions
EN
FSW
SW
ILIM
COMP
FB
SW
VOUT
VOUT
VOUT
MODE
NC
RHL
SW
SW
PGND
BOOT
VIN
图5-1. 20-Pin VQFN With Thermal Pad RHL Package(Top View)
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NUMBER
Output of the internal regulator. A ceramic capacitor of more than 1.0 µF is required between
this pin and ground.
VCC
1
O
Enable logic input. Logic high level enables the device. Logic low level disables the device
and turns it into shutdown mode.
EN
2
3
I
I
I
FSW
SW
The switching frequency is programmed by a resistor between this pin and the SW pin.
The switching node pin of the converter. It is connected to the drain of the internal low-side
power MOSFET and the source of the internal high-side power MOSFET.
4, 5, 6, 7
Power supply for high-side MOSFET gate driver. A ceramic capacitor of 0.1 µF must be
connected between this pin and the SW pin.
BOOT
VIN
8
9
O
I
IC power supply input
Soft-start programming pin. An external capacitor sets the ramp rate of the reference voltage
of the internal error amplifier during soft start.
SS
10
O
No connection inside the device. Connect these two pins to the ground plane on the PCB for
good thermal dissipation.
NC
11, 12
13
—
Operation mode selection pin for the device in light load condition. When this pin is
connected to ground, the device works in PWM mode. When this pin is left floating, the
device works in PFM mode.
MODE
I
VOUT
FB
14, 15, 16
17
O
I
Boost converter output
Voltage feedback. Connect to the center tape of a resistor divider to program the output
voltage.
Output of the internal error amplifier, the loop compensation network must be connected
between this pin and the AGND pin.
COMP
ILIM
18
19
O
O
Adjustable switch peak current limit. An external resistor must be connected between this pin
and the AGND pin.
AGND
PGND
20
21
Signal ground of the IC
—
—
Power ground of the IC. It is connected to the source of the low-side MOSFET.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature (unless otherwise noted) (1)
MIN
–0.3
–0.3
–0.3
–0.3
–40
–65
MAX
SW + 7
14.5
7
UNIT
BOOT
VIN, SW, FSW, VOUT
Voltage(2)
V
EN, VCC, SS, COMP, MODE
ILIM, FB
3.6
TJ
Operating junction temperature
Storage temperature
150
°C
°C
Tstg
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Electrostatic
discharge
V(ESD)
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.7
NOM
MAX
12
UNIT
VIN
VOUT
L
Input voltage range
V
V
Output voltage range
4.5
12.6
10
Inductance, effective value
Input capacitance, effective value
Output capacitance, effective value
Operating junction temperature
0.47
10
2.2
47
µH
µF
µF
°C
CI
CO
TJ
6.8
1000
125
–40
6.4 Thermal Information
TPS61088
RHL 20 PINS
Standard
38.8
TPS61088
THERMAL METRIC(1)
RHL 20 PINS
UNIT
EVM
29.7
N/A
N/A
0.5
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
39.8
15.5
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.6
ψJT
15.5
9.8
ψJB
RθJC(bot)
3.1
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
Minimum and maximum values are at VIN = 2.7 V to 5.5 V and TJ = -40°C to 125°C. Typical values are at VIN = 3.6 V and TJ
= 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
POWER SUPPLY
VIN
Input voltage range
2.7
12
2.7
2.5
V
V
VIN rising
VIN falling
Undervoltage lockout (UVLO)
threshold
VIN_UVLO
2.4
200
2.1
V
VIN_HYS
VIN UVLO hysteresis
UVLO threshold
mV
V
VCC_UVLO
VCC falling
Operating quiescent current from the
VIN pin
1
3
µA
µA
IC enabled, VEN = 2 V, no load, RILIM = 100
kΩ, VFB = 1.3 V, VOUT = 12 V, TJ up to 85°C
IQ
Operating quiescent current from the
VOUT pin
110
250
IC disabled, VEN = 0 V, no load, no feedback
resistor divider connected to the VOUT pin, TJ
up to 85°C
ISD
Shutdown current into the VIN pin
1
3
µA
V
VCC
VCC regulation
IVCC = 5 mA, VIN = 8 V
5.8
EN AND MODE INPUT
VENH
EN high threshold voltage
VCC = 6 V
VCC = 6 V
VCC = 6 V
VCC = 6 V
VCC = 6 V
VCC = 6 V
1.2
4.0
V
V
VENL
EN low threshold voltage
0.4
1.5
REN
EN internal pull-down resistance
MODE high threshold voltage
MODE low threshold voltage
MODE internal pull-up resistance
800
800
kΩ
V
VMODEH
VMODEL
RMODE
OUTPUT
VOUT
V
kΩ
Output voltage range
4.5
12.6
V
V
PWM mode
PFM mode
VFB = 1.2 V
1.186
1.204
1.212
1.222
VREF
Reference voltage at the FB pin
ILKG_FB
ISS
FB pin leakage current
100
nA
Soft-start charging current
5
μA
ERROR AMPLIFIER
ISINK
COMP pin sink current
VFB = VREF +200 mV, VCOMP = 1.5 V
VFB = VREF –200 mV, VCOMP = 1.5 V
VFB = 1 V, RILIM = 100 kΩ
20
20
µA
µA
ISOURCE
VCCLPH
VCCLPL
GEA
COMP pin source current
High clamp voltage at the COMP pin
Low clamp voltage at the COMP pin
Error amplifier transconductance
2.3
1.4
190
V
VFB = 1.5 V, RILIM = 100 kΩ, MODE pin floating
VCOMP = 1.5 V
µA/V
POWER SWITCH
High-side MOSFET on-resistance
Low-side MOSFET on-resistance
CURRENT LIMIT
Peak switch current limit in PFM mode
VCC = 6 V
VCC = 6 V
13
11
18
mΩ
mΩ
RDS(on)
16.5
10.6
9.0
11.9
10.3
13
A
A
V
RILIM = 100 kΩ, VCC = 6 V, MODE pin floating
ILIM
Peak switch current limit in FPWM
mode
RILIM = 100 kΩ, VCC = 6 V, MODE pin short to
ground
11.4
VILIM
Reference voltage at the ILIM pin
1.204
SWITCHING FREQUENCY
Switching frequency
Minimum on-time
500
90
kHz
ns
ƒSW
RFREQ = 301 kΩ, VIN = 3.6 V, VOUT = 12 V
RFREQ = 301 kΩ, VIN = 3.6 V, VOUT = 12 V
tON_min
180
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Minimum and maximum values are at VIN = 2.7 V to 5.5 V and TJ = -40°C to 125°C. Typical values are at VIN = 3.6 V and TJ
= 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
PROTECTION
Output overvoltage protection
threshold
VOVP
VOUT rising
12.7
13.2
0.25
13.6
V
V
Output overvoltage protection
hysteresis
VOVP_HYS
VOUT falling below VOVP
THERMAL SHUTDOWN
TSD
Thermal shutdown threshold
Thermal shutdown hysteresis
TJ rising
150
20
°C
°C
TSD_HYS
TJ falling below TSD
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6.6 Typical Characteristics
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
5-V Output
9-V Output
12-V Output
3-V Input
3.6-V Input
4.2-V Input
0.0001
0.001
0.01 0.1 0.2 0.5
Output Current (A)
1
2 3 5 710
0.0001
0.001
0.01 0.1 0.2 0.5
Output Current (A)
1
2 3 5 710
D002
D001
图6-2. Efficiency vs Output Current, VIN = 3.6 V,
图6-1. Efficiency vs Output Current, VOUT = 9 V,
FPWM
FPWM
100%
90%
80%
70%
60%
50%
100%
90%
80%
70%
60%
50%
40%
40%
3-V Input
3.6-V Input
4.2-V Input
5-V Output
9-V Output
12-V Output
30%
20%
30%
20%
0.0001
0.001
0.01 0.1 0.2 0.5
Output Current (A)
1
2 3 5 710
0.0001
0.001
0.01 0.1 0.2 0.5
Output Current (A)
1
2 3 5 710
D003
D004
图6-3. Efficiency vs Output Current, VOUT = 9 V,
图6-4. Efficiency vs Output Current, VIN = 3.6 V,
PFM
PFM
14
2500
2000
1500
1000
500
PFM Mode
FPWM Mode
12
10
8
6
4
2
0
0
0
100 200 300 400 500 600 700 800 900
Resistance (kW)
80
120
160
200
240
280
320
360
D006
Resistance (kW)
D005
图6-6. Switching Frequency vs Setting Resistance
图6-5. Current Limit vs Setting Resistance
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1.21
1.209
1.208
1.207
1.206
1.205
1.204
1.203
1.202
1.201
1.2
140
120
100
80
60
40
20
0
-40
-20
0
20
40
60
Temperature (°C)
80
100
1201
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90
Temperature (°C)
D007
D008
图6-7. Reference Voltage vs Temperature
图6-8. Quiescent Current vs Temperature
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40
-20
0
20 40
Temperature (°C)
60
80
100
D009
图6-9. Shutdown Current vs Temperature
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7 Detailed Description
7.1 Overview
The TPS61088 is a fully-integrated synchronous boost converter with a 11-mΩ power switch and a 13-mΩ
rectifier switch to output high power from a single-cell or two-cell Lithium batteries. The device is capable of
providing an output voltage of 12.6 V and delivering up to 30-W power from a single-cell Lithium battery.
The TPS61088 uses adaptive constant off-time peak current control topology to regulate the output voltage. In
moderate-to-heavy load condition, the TPS61088 works in the quasi-constant frequency pulse width modulation
(PWM) mode. The switching frequency in PWM mode is adjustable ranging from 200 kHz to 2.2 MHz by an
external resistor. In light load condition, the device has two operation modes selected by the MODE pin. When
the MODE pin is left floating, the TPS61088 works in pulse frequency modulation (PFM) mode. The PFM mode
brings high efficiency at the light load. When the MODE pin is short to ground, the TPS61088 works in forced
PWM mode (FPWM). The FPWM mode can avoid the acoustic noise and other problems caused by the low
switching frequency. The TPS61088 implements cycle-by-cycle current limit to protect the device from overload
conditions during boost switching. The switch peak current limit is programmable by an external resistor. The
TPS61088 uses external loop compensation, which provides flexibility to use different inductors and output
capacitors. The adaptive off-time peak current control scheme gives excellent transient line and load response
with minimal output capacitance.
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7.2 Functional Block Diagram
L1
VIN
C3
C1
SW
VIN
BOOT
VOUT
VOUT
C2
Deadtime
Control Logic
C4
LDO
VCC
R3
PGND
Comp
Comp
C5
CLMIT
FB
FSW
gm
R4
R1
SS
C7
1/K
Comp
SW
VIN
COMP
EN
Vref
R2
C6
SS Vref
Vref
Shutdown
Shutdown
Control
AGND
ILIM
ON/
OFF
CLMIT
OVP
VOUT
VIN
UVLO
Mode
Selection
R5
Thermal
Shutdown
MODE
图7-1. Functional Block Diagram
7.3 Feature Description
7.3.1 Enable and Start-up
The TPS61088 has an adjustable soft start function to prevent high inrush current during start-up. To minimize
the inrush current during start-up, an external capacitor, connected to the SS pin and charged with a constant
current, is used to slowly ramp up the internal positive input of the error amplifier. When the EN pin is pulled
high, the soft-start capacitor CSS (C7 in 图 8-1) is charged with a constant current of 5 μA typically. During this
time, the SS pin voltage is compared with the internal reference (1.204 V), the lower one is fed into the internal
positive input of the error amplifier. The output of the error amplifier (which determines the inductor peak current
value) ramps up slowly as the SS pin voltage goes up. The soft-start phase is completed after the SS pin voltage
exceeds the internal reference (1.204 V). The larger the capacitance at the SS pin, the slower the ramp of the
output voltage and the longer the soft-start time. A 47-nF capacitor is usually sufficient for most applications.
When the EN pin is pulled low, the voltage of the soft-start capacitor is discharged to ground.
Use 方程式1 to calculate the soft-start time.
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VREF ìCSS
ISS
tSS
=
(1)
where
• tSS is the soft start time
• VREF is the internal reference voltage of 1.204 V
• CSS is the capacitance between the SS pin and ground
• ISS is the soft-start charging current of 5 µA
7.3.2 Undervoltage Lockout (UVLO)
The UVLO circuit prevents the device from malfunctioning at low input voltage and the battery from excessive
discharge. The TPS61088 has both VIN UVLO function and VCC UVLO function. It disables the device from
switching when the falling voltage at the VIN pin trips the UVLO threshold VIN_UVLO , which is typically 2.4 V. The
device starts operating when the rising voltage at the VIN pin is 200 mV above VIN_UVLO. It also disables the
device when the falling voltage at the VCC pin trips the UVLO threshold VCC_UVLO, which is typically 2.1 V.
7.3.3 Adjustable Switching Frequency
This device features a wide adjustable switching frequency ranging from 200 kHz to 2.2 MHz. The switching
frequency is set by a resistor connected between the FSW pin and the SW pin of the TPS61088. A resistor must
always be connected from the FSW pin to SW pin for proper operation. The resistor value required for a desired
frequency can be calculated using 方程式2.
VOUT
1
4ì(
- tDELAY
ì
)
ƒSW
V
IN
RFREQ
=
CFREQ
(2)
where
• RFREQ is the resistance connected between the FSW pin and the SW pin
• CFREQ is 23 pF
• ƒSW is the desired switching frequency
• tDELAY is 89 ns
• VIN is the input voltage
• VOUT is the output voltage
7.3.4 Adjustable Peak Current Limit
To avoid an accidental large peak current, an internal cycle-by-cycle current limit is adopted. The low-side switch
is turned off immediately as soon as the switch current touches the limit. The peak switch current limit can be set
by a resistor at the ILIM pin to ground. The relationship between the current limit and the resistance depends on
the status of the MODE pin.
When the MODE pin is floating, namely the TPS61088, is set to work in the PFM mode at light load, use 方程式
3 to calculate the resistor value:
1190000
I
=
LIM
R
ILIM
(3)
where
• RILIM is the resistance between the ILIM pin and ground
• ILIM is the switch peak current limit
When the resistor value is 100 kΩ, the typical current limit is 11.9 A.
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When the MODE pin is connected to ground, namely the TPS61088 is set to work in forced PWM mode at light
load, use 方程式4 to calculate the resistor value.
1190000
I
=
-1.6
LIM
R
ILIM
(4)
When the resistor value is 100 kΩ, the typical current limit is 10.3 A.
Considering the device variation and the tolerance over temperature, the minimum current limit at the worst case
can be 1.3 A lower than the value calculated by above equations.
7.3.5 Overvoltage Protection
If the output voltage at the VOUT pin is detected above 13.2 V (typical value), the TPS61088 stops switching
immediately until the voltage at the VOUT pin drops the hysteresis value lower than the output overvoltage
protection threshold. This function prevents overvoltage on the output and secures the circuits connected to the
output from excessive overvoltage.
7.3.6 Thermal Shutdown
A thermal shutdown is implemented to prevent damages due to excessive heat and power dissipation. Typically,
the thermal shutdown happens at a junction temperature of 150°C. When the thermal shutdown is triggered, the
device stops switching until the junction temperature falls below typically 130°C, then the device starts switching
again.
7.4 Device Functional Modes
7.4.1 Operation
The synchronous boost converter TPS61088 operates at a quasi-constant frequency pulse width modulation
(PWM) in moderate-to-heavy load condition. Based on the VIN to VOUT ratio, a circuit predicts the required off-
time of the switching cycle. At the beginning of each switching cycle, the low-side N-MOSFET switch, as shown
in 节 7.2, is turned on, and the inductor current ramps up to a peak current that is determined by the output of
the internal error amplifier. After the peak current is reached, the current comparator trips. It turns off the low-side
N-MOSFET switch and the inductor current goes through the body diode of the high-side N-MOSFET in a dead-
time duration. After the dead-time duration, the high-side N-MOSFET switch is turned on. Since the output
voltage is higher than the input voltage, the inductor current decreases. The high-side switch is not turned off
until the fixed off-time is reached. After a short dead-time duration, the low-side switch turns on again and the
switching cycle is repeated.
In light load condition, the TPS61088 implements two operation modes, PFM mode and forced PWM mode, to
meet different application requirements. The operation mode is set by the status of the MODE pin. When the
MODE pin is connected to ground, the device works in forced PWM mode. When the MODE pin is left floating,
the device works in PFM mode.
7.4.1.1 PWM Mode
In forced PWM mode, the TPS61088 keeps the switching frequency unchanged in light load condition. When the
load current decreases, the output of the internal error amplifier decreases as well to keep the inductor peak
current down, delivering less power from input to output. When the output current further reduces, the current
through the inductor decreases to zero during the off-time. The high-side N-MOSFET is not turned off even if the
current through the MOSFET is zero. Thus, the inductor current changes its direction after it runs to zero. The
power flow is from output side to input side. The efficiency is low in this mode. But with the fixed switching
frequency, there is no audible noise and other problems which might be caused by low switching frequency in
light load condition.
7.4.1.2 PFM Mode
The TPS61088 improves the efficiency at light load with PFM mode. When the converter operates in light load
condition, the output of the internal error amplifier decreases to make the inductor peak current down, delivering
less power to the load. When the output current further reduces, the current through the inductor decrease to
zero during the off-time. Once the current through the high side N-MOSFET is zero, the high-side MOSFET is
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turned off until the beginning of the next switching cycle. When the output of the error amplifier continuously
goes down and reaches a threshold with respect to the peak current of ILIM / 12, the output of the error amplifier
is clamped at this value and does not decrease any more. If the load current is smaller than what the TPS61088
delivers, the output voltage increases above the nominal setting output voltage. The TPS61088 extends its off-
time of the switching period to deliver less energy to the output and regulate the output voltage to 0.7% higher
than the nominal setting voltage. With PFM operation mode, the TPS61088 keeps the efficiency above 80%
even when the load current decreases to 1 mA. In addition, the output voltage ripple is much smaller at light load
due to low peak current. Refer to 图7-2.
Output Voltage
PFM mode at light load
1.007 × VOUT_NOM
VOUT_NOM
PWM mode at heavy load
图7-2. PFM Mode Diagram
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8 Application and Implementation
Note
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The TPS61088 is designed for outputting voltage up to 12.6 V with 10-A switch current capability to deliver more
than 30-W power. The TPS61088 operates at a quasi-constant frequency pulse-width modulation (PWM) in
moderate-to-heavy load condition. In light load condition, the converter can either operate in PFM mode or in
forced PWM mode according to the mode selection. The PFM mode brings high efficiency over entire load
range, but PWM mode can avoid the acoustic noise as the switching frequency is fixed. The converter uses the
adaptive constant off-time peak current control scheme, which provides excellent transient line and load
response with minimal output capacitance. The TPS61088 can work with different inductor and output capacitor
combination by external loop compensation. It also supports adjustable switching frequency ranging from 200
kHz to 2.2 MHz.
8.2 Typical Application
C6
0.1 µF
VOUT = 9 V
IOUT = 3 A
1.2 µH
L1
VIN = 3.3 to 4.2 V
VOUT
FB
BOOT
C9
C4
SW
R1
360 kꢀ
R2
R3
1 µF
3× 22 µF
FSW
VIN
255 kꢀ
C1
56 kꢀ
C8
10 µF
R5
R4
C2
C5
COMP
ILIM
VCC
C3
0.1 µF
100 kꢀ
ON
2.2 µF
EN
OFF
C7
PGND
SS
47 nF
AGND
MODE
图8-1. TPS61088 3.3 V to 9-V/3-A Output Converter
8.2.1 Design Requirements
表8-1. Design Parameters
DESIGN PARAMETERS
Input voltage range
EXAMPLE VALUES
3.3 to 4.2 V
Output voltage
9 V
100 mV peak to peak
3 A
Output voltage ripple
Output current rating
Operating frequency
Operation mode at light load
600 kHz
PFM
8.2.2 Detailed Design Procedure
8.2.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS61088 device with the WEBENCH® Power Designer.
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1. Start by entering your VIN, VOUT and IOUT requirements.
2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you will also be able to:
• Run electrical simulations to see important waveforms and circuit performance,
• Run thermal simulations to understand the thermal performance of your board,
• Export your customized schematic and layout into popular CAD formats,
• Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
8.2.2.2 Setting Switching Frequency
The switching frequency is set by a resistor connected between the FSW pin and the SW pin of the TPS61088.
The resistor value required for a desired frequency can be calculated using 方程式5.
VOUT
1
4ì(
- tDELAY
ì
)
ƒSW
V
IN
RFREQ
=
CFREQ
(5)
where
• RFREQ is the resistance connected between the FSW pin and the SW pin
• CFREQ is 23 pF
• ƒSW is the desired switching frequency
• tDELAY is 89 ns
• VIN is the input voltage
• VOUT is the output voltage
8.2.2.3 Setting Peak Current Limit
The peak input current is set by selecting the correct external resistor value correlating to the required current
limit. Since the TPS61088 is configured to work in PFM mode in light load condition, use 方程式 6 to calculate
the correct resistor value:
1190000
I
=
LIM
R
ILIM
(6)
where
• RILIM is the resistance connected between the ILIM pin and ground
• ILIM is the switching peak current limit
For a typical current limit of 11.9 A, the resistor value is 100 kΩ. Considering the device variation and the
tolerance over temperature, the minimum current limit at the worst case can be 1.3 A lower than the value
calculated by 方程式 6. The minimum current limit must be higher than the required peak switch current at the
lowest input voltage and the highest output power to make sure the TPS61088 does not hit the current limit and
can still regulate the output voltage in these conditions.
8.2.2.4 Setting Output Voltage
The output voltage is set by an external resistor divider (R1, R2 in 图 8-1). Typically, a minimum current of 20
μA flowing through the feedback divider gives good accuracy and noise covering. A standard 56-kΩ resistor is
typically selected for low-side resistor R2.
The value of R1 is then calculated as:
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(VOUT - VREF )ìR2
VREF
R1 =
(7)
8.2.2.5 Inductor Selection
Because the selection of the inductor affects the steady state operation of the power supply, transient behavior,
loop stability, and boost converter efficiency, the inductor is the most important component in switching power
regulator design. Three most important specifications to the performance of the inductor are the inductor value,
DC resistance, and saturation current.
The TPS61088 is designed to work with inductor values between 0.47 and 10 µH. A 0.47-µH inductor is typically
available in a smaller or lower-profile package, while a 10-µH inductor produces lower inductor current ripple. If
the boost output current is limited by the peak current protection of the IC, using a 10-µH inductor can maximize
the output current capability of the controller.
Inductor values can have ±20% or even ±30% tolerance with no current bias. When the inductor current
approaches saturation level, its inductance can decrease 20% to 35% from the value at 0-A current depending
on how the inductor vendor defines saturation. When selecting an inductor, make sure its rated current,
especially the saturation current, is larger than its peak current during the operation.
Follow 方程式 8 to 方程式 10 to calculate the peak current of the inductor. To calculate the current in the worst
case, use the minimum input voltage, maximum output voltage, and maximum load current of the application. To
leave enough design margin, TI recommends using the minimum switching frequency, the inductor value with –
30% tolerance, and a low-power conversion efficiency for the calculation.
In a boost regulator, calculate the inductor DC current as in 方程式8.
VOUT ìIOUT
IDC
=
V ì h
IN
(8)
where
• VOUT is the output voltage of the boost regulator
• IOUT is the output current of the boost regulator
• VIN is the input voltage of the boost regulator
• ηis the power conversion efficiency
Calculate the inductor current peak-to-peak ripple as in 方程式9.
1
IPP
=
1
1
L ì(
+
)ì ƒSW
VOUT - V
V
IN
IN
(9)
where
• IPP is the inductor peak-to-peak ripple
• L is the inductor value
• ƒSW is the switching frequency
• VOUT is the output voltage
• VIN is the input voltage
Therefore, the peak current, ILpeak, seen by the inductor is calculated with 方程式10.
IPP
ILpeak = IDC
+
2
(10)
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Set the current limit of the TPS61088 higher than the peak current ILpeak. Then select the inductor with saturation
current higher than the setting current limit.
Boost converter efficiency is dependent on the resistance of its current path, the switching loss associated with
the switching MOSFETs, and the core loss of the inductor. The TPS61088 has optimized the internal switch
resistance. However, the overall efficiency is affected significantly by the DC resistance (DCR) of the inductor,
equivalent series resistance (ESR) at the switching frequency, and the core loss. Core loss is related to the core
material and different inductors have different core loss. For a certain inductor, larger current ripple generates
higher DCR and ESR conduction losses and higher core loss. Usually, a data sheet of an inductor does not
provide the ESR and core loss information. If needed, consult the inductor vendor for detailed information.
Generally, TI would recommend an inductor with lower DCR and ESR. However, there is a tradeoff among the
inductance of the inductor, DCR and ESR resistance, and its footprint. Furthermore, shielded inductors typically
have higher DCR than unshielded inductors. 表 8-2 lists recommended inductors for the TPS61088. Verify
whether the recommended inductor can support your target application with the previous calculations and bench
evaluation. In this application, the Sumida's inductor CDMC8D28NP-1R2MC is selected for its small size and
low DCR.
表8-2. Recommended Inductors
PART NUMBER
L (µH)
1.2
DCR MAX
(mΩ)
SATURATION CURRENT /
HEAT RATING CURRENT (A)
SIZE MAX
(L × W × H mm)
VENDOR
Sumida
CDMC8D28NP-1R2MC
744311150
7.0
7.2
12.2 / 12.9
14.0 / 11.0
18 / 12
9.5 x 8.7 x 3.0
7.3 x 7.2 x 4.0
1.5
2.2
2.2
2.2
Wurth
Cyntec
Cyntec
Cyntec
PIMB104T-2R2MS
PIMB103T-2R2MS
PIMB065T-2R2MS
7.0
11.2 × 10.3 × 4.0
11.2 × 10.3 × 3.0
7.4 × 6.8 × 5.0
9.0
16 / 13
12.5
12 / 10.5
8.2.2.6 Input Capacitor Selection
For good input voltage filtering, TI recommends low-ESR ceramic capacitors. The VIN pin is the power supply for
the TPS61088. A 0.1-μF ceramic bypass capacitor is recommended as close as possible to the VIN pin of the
TPS61088. The VCC pin is the output of the internal LDO. A ceramic capacitor of more than 1.0 μF is required
at the VCC pin to get a stable operation of the LDO.
For the power stage, because of the inductor current ripple, the input voltage changes if there is parasite
inductance and resistance between the power supply and the inductor. It is recommended to have enough input
capacitance to make the input voltage ripple less than 100mV. Generally, 10-μF input capacitance is sufficient
for most applications.
Note
DC bias effect: High-capacitance ceramic capacitors have a DC bias effect, which has a strong
influence on the final effective capacitance. Therefore, the right capacitor value must be chosen
carefully. The differences between the rated capacitor value and the effective capacitance result from
package size and voltage rating in combination with material. A 10-V rated 0805 capacitor with 10 μF
can have an effective capacitance of less 5 μF at an output voltage of 5 V.
8.2.2.7 Output Capacitor Selection
For small output voltage ripple, TI recommends a low-ESR output capacitor like a ceramic capacitor. Typically,
three 22-μF ceramic output capacitors work for most applications. Higher capacitor values can be used to
improve the load transient response. Take care when evaluating the derating of a capacitor under DC bias. The
bias can significantly reduce capacitance. Ceramic capacitors can lose most of their capacitance at rated
voltage. Therefore, leave margin on the voltage rating to ensure adequate effective capacitance. From the
required output voltage ripple, use the following equations to calculate the minimum required effective
capacitance COUT
:
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(VOUT - VIN_MIN)ìIOUT
V
=
ripple _ dis
VOUT ì ƒSW ìCOUT
(11)
(12)
V
= ILpeak ìRC _ESR
ripple _ESR
where
• Vripple_dis is output voltage ripple caused by charging and discharging of the output capacitor
• Vripple_ESR is output voltage ripple caused by ESR of the output capacitor
• VIN_MIN is the minimum input voltage of boost converter
• VOUT is the output voltage
• IOUT is the output current
• ILpeak is the peak current of the inductor
• ƒSW is the converter switching frequency
• RC_ESR is the ESR of the output capacitors
8.2.2.8 Loop Stability
The TPS61088 requires external compensation, which allows the loop response to be optimized for each
application. The COMP pin is the output of the internal error amplifier. An external compensation network
comprised of resistor R5, ceramic capacitors C5 and C8 is connected to the COMP pin.
The power stage small signal loop response of constant off-time (COT) with peak current control can be
modeled by 方程式13.
≈
∆
«
’≈
÷∆
’
÷
S
S
1 +
1 -
RO ì 1 - D
2 ì p ì ƒESRZ ◊«
2 ì p ì ƒRHPZ ◊
(
)
ì
GPS (S) =
S
2 ì Rsense
1 +
2 ì p ì ƒP
(13)
where
• D is the switching duty cycle
• RO is the output load resistance
• Rsense is the equivalent internal current sense resistor, which is 0.08 Ω
2
ƒP
=
2p ì RO ì CO
(14)
(15)
where
• CO is output capacitor
1
ƒESRZ
=
2p ì RESR ì CO
where
• RESR is the equivalent series resistance of the output capacitor
2
RO ì 1 - D
(
)
ƒRHPZ
=
2p ì L
(16)
The COMP pin is the output of the internal transconductance amplifier. 方程式17 shows the small signal transfer
function of compensation network.
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Gc(S) =
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≈
∆
«
’
÷
S
1 +
2 ì p ì ƒCOMZ ◊
GEA ì REA ì VREF
VOUT
ì
≈
∆
«
’≈
’
÷
S
S
1 +
1 +
÷∆
2 ì p ì ƒCOMP1 ◊«
2 ì p ì ƒCOMP2 ◊
(17)
where
• GEA is the transconductance of the amplifier
• REA is the output resistance of the amplifier
• VREF is the reference voltage at the FB pin
• VOUT is the output voltage
• ƒCOMP1, ƒCOMP2 are the poles' frequency of the compensation network
• ƒCOMZ is the zero's frequency of the compensation network
The next step is to choose the loop crossover frequency, ƒC. The higher in frequency that the loop gain stays
above zero before crossing over, the faster the loop response is. It is generally accepted that the loop gain cross
over no higher than the lower of either 1/10 of the switching frequency, ƒSW, or 1/5 of the RHPZ frequency,
ƒRHPZ
.
Then set the value of R5, C5, and C8 (in 图8-1) by following these equations.
2pì VOUT ìRsense ì ƒC ìCO
R5 =
(1 œ D)ì VREF ìGEA
(18)
where
• ƒC is the selected crossover frequency
The value of C5 can be set by 方程式19.
RO ìCO
C5 =
2R5
(19)
(20)
The value of C8 can be set by 方程式20.
RESR ì CO
R5
C8 =
If the calculated value of C8 is less than 10 pF, it can be left open.
Designing the loop for greater than 45° of phase margin and greater than 10-dB gain margin eliminates output
voltage ringing during the line and load transient.
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8.2.3 Application Curves
Vout(AC)
20 mV/div
Vout(AC)
100 mV/div
Inductor
Current
2 A/div
SW
5 V/div
SW
5 V/div
Inductor
Current
1 A/div
图8-3. Switching Waveforms in DCM
图8-2. Switching Waveforms in CCM
Vout(AC)
20 mV/div
EN
1 V/div
SW
5 V/div
Vout
2 V/div
Inductor
Current
1 A/div
Inductor
Current
2 A/div
图8-4. Switching Waveforms in PFM Mode
图8-5. Startup Waveforms
EN
1 V/div
Output
Current
1 A/div
Vout
2 V/div
Inductor
Current
2 A/div
Vout(AC)
500 mV/div
图8-7. Load Transient (VOUT = 9 V, IOUT = 1 to 2 A)
图8-6. Shutdown Waveforms
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Input
Voltage
500 mV/div
Vout(AC)
100 mV/div
图8-8. Line Transient (VOUT = 9 V, VIN = 3.3 to 3.6 V)
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9 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 2.7 V to 12 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. A typical choice is an electrolytic or
tantalum capacitor with a value of 47 μF.
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10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those running at high switching frequency and high currents,
layout is an important design step. If layout is not carefully done, the regulator could suffer from instability and
noise problems. To maximize efficiency, switch rise and fall times are very fast. To prevent radiation of high-
frequency noise (for example, EMI), proper layout of the high-frequency switching path is essential. Minimize the
length and area of all traces connected to the SW pin, and always use a ground plane under the switching
regulator to minimize interplane coupling.
The input capacitor needs to be close to the VIN pin and GND pin in order to reduce the Iinput supply ripple.
The layout should also be done with well consideration of the thermal as this is a high power density device. A
thermal pad that improves the thermal capabilities of the package should be soldered to the large ground plate,
using thermal vias underneath the thermal pad.
10.2 Layout Example
The bottom layer is a large ground plane connected to the PGND plane and AGND plane on top layer by vias.
AGND
L1
EN
FSW
SW
ILIM
VIN
COMP
FB
SW
VOUT
VOUT
VOUT
MODE
NC
SW
SW
VOUT
BOOT
VIN
PGND
CIN
COUT
PGND
图10-1. Bottom Layer
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10.3 Thermal Considerations
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions.
Calculate the maximum allowable dissipation, PD(max), and keep the actual power dissipation less than or equal
to PD(max). The maximum-power-dissipation limit is determined using 方程式21.
125 - TA
RqJA
PD(max)
=
(21)
where
• TA is the maximum ambient temperature for the application.
• RθJA is the junction-to-ambient thermal resistance given in the Thermal Information table.
The TPS61088 comes in a thermally-enhanced VQFN package. This package includes a thermal pad that
improves the thermal capabilities of the package. The real junction-to-ambient thermal resistance of the package
greatly depends on the PCB type, layout, and thermal pad connection. Using thick PCB copper and soldering
the thermal pad to a large ground plate enhance the thermal performance. Using more vias connects the ground
plate on the top layer and bottom layer around the IC without solder mask also improves the thermal capability.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
11.1.2 Development Support
11.1.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS61088 device with the WEBENCH® Power Designer.
1. Start by entering your VIN, VOUT and IOUT requirements.
2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you will also be able to:
• Run electrical simulations to see important waveforms and circuit performance,
• Run thermal simulations to understand the thermal performance of your board,
• Export your customized schematic and layout into popular CAD formats,
• Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.4 Trademarks
Bluetooth™ is a trademark of Bluetooth SIG.
TI E2E™ is a trademark of Texas Instruments.
WEBENCH® are registered trademarks of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2021 Texas Instruments Incorporated
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25
Product Folder Links: TPS61088
重要声明和免责声明
TI 提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没
有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更，恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对TI 及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受TI 的销售条款(https:www.ti.com/legal/termsofsale.html) 或ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI
提供这些资源并不会扩展或以其他方式更改TI 针对TI 产品发布的适用的担保或担保免责声明。重要声明
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021，德州仪器(TI) 公司
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS61088RHLR
TPS61088RHLT
ACTIVE
ACTIVE
VQFN
VQFN
RHL
RHL
20
20
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
S61088A
S61088A
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2023
OTHER QUALIFIED VERSIONS OF TPS61088 :
Automotive : TPS61088-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS61088RHLR
TPS61088RHLT
VQFN
VQFN
RHL
RHL
20
20
3000
250
330.0
180.0
12.4
12.4
3.71
3.71
4.71
4.71
1.1
1.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS61088RHLR
TPS61088RHLT
VQFN
VQFN
RHL
RHL
20
20
3000
250
367.0
210.0
367.0
185.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
VQFN - 1 mm max height
RHL0020A
PLASTIC QUAD FLATPACK- NO LEAD
A
3.6
3.4
B
PIN 1 INDEX AREA
4.6
4.4
C
1 MAX
SEATING PLANE
0.08 C
2.05±0.1
2X 1.5
SYMM
0.5
0.3
20X
(0.2) TYP
10
11
14X 0.5
9
12
SYMM
21
2X
3.05±0.1
3.5
19
2
0.29
20X
0.19
0.1
0.05
20
1
PIN 1 ID
(OPTIONAL)
C A B
C
4X (0.2)
2X (0.55)
4219071 / A 05/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RHL0020A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
(2.05)
2X (1.5)
SYMM
1
20
2X (0.4)
20X (0.6)
19
2
20X (0.24)
14X (0.5)
SYMM
21
(3.05) (4.3)
6X (0.525)
2X (0.75)
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
9
12
(R0.05) TYP
(Ø0.2) VIA
TYP)
10
11
4X (0.2)
4X
(0.775)
2X (0.55)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 18X
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
0.07 MIN
ALL AROUND
EXPOSED METAL
EXPOSED METAL
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4219071 / A 05/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments
literature number SLUA271 (www.ti.com/lit/slua271)
.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
6. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to theri
locations shown on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RHL0020A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
2X (1.5)
(0.55)
TYP
(0.56)
TYP
1
20
SOLDER MASK EDGE
TYP
20X (0.6)
2
19
20X (0.24)
14X (0.5)
SYMM
(1.05)
TYP
(4.3)
21
6X
(0.85)
(R0.05) TYP
METAL
TYP
12
9
2X
(0.775)
2X (0.25)
6X (0.92)
11
10
4X (0.2)
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1mm THICK STENCIL
EXPOSED PAD
75% PRINTED COVERAGE BY AREA
SCALE: 20X
4219071 / A 05/2017
NOTES: (continued)
7.
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations..
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
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