TPS63061DSCT [TI]
HIGH INPUT VOLTAGE BUCK-BOOST CONVERTER WITH 2A SWITCH CURRENT; 具有2A开关电流高输入电压降压 - 升压型转换器
| 型号： | TPS63061DSCT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HIGH INPUT VOLTAGE BUCK-BOOST CONVERTER WITH 2A SWITCH CURRENT |
| 文件： | 总31页 (文件大小：2015K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS63060
TPS63061
www.ti.com
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
HIGH INPUT VOLTAGE BUCK-BOOST CONVERTER WITH 2A SWITCH CURRENT
Check for Samples: TPS63060, TPS63061
1
FEATURES
2
•
Up to 93% Efficiency
•
•
•
•
Load Disconnect During Shutdown
Overtemperature Protection
•
•
2A/1A Output Current at 5V in Buck Mode
1.3A Output Current at 5V in Boost Mode
(VIN>4V)
Overvoltage Protection
Available in a 3-mm × 3-mm, SON-10 Package
•
•
Automatic Transition Between Step Down and
Boost Mode
APPLICATIONS
Typical Device Quiescent Current less than
30μA
•
•
•
•
•
•
•
Dual LI-Ion Application
DSC's and Camcorders
•
•
Input Voltage Range: 2.5V to 12V
Notebook Computer
Fixed and Adjustable Output Voltage Options
from 2.5V to 8V
Industrial Metering Equipment
Ultra Mobile PC's and Mobile Internet Devices
Personal Medical Products
High Power LED's
•
•
Power Save Mode for Improved Efficiency at
Low Output Power
Forced Fixed Frequency Operation at 2.4MHz
and Synchronization Possible
•
•
Power Good Output
Buck-Boost Overlap Control™
DESCRIPTION
The TPS6306x devices provide a power supply solution for products powered by either three-cell up to six-cell
alkaline, NiCd or NiMH battery, or a one-cell or dual-cell Li-Ion or Li-polymer battery. Output currents can go as
high as 2A while using a dual-cell Li-Ion or Li-Polymer Battery, and discharge it down to 5V or lower. The
buck-boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous
rectification to obtain maximum efficiency. At low load currents, the converter enters Power Save mode to
maintain high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the
converter to operate at a fixed switching frequency. The maximum average current in the switches is limited to a
typical value of 2.25A. The output voltage is programmable using an external resistor divider, or is fixed internally
on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is disconnected
from the battery. The device is packaged in a 10-pin SON PowerPAD™ package measuring 3mm × 3mm (DSC).
L1
1µH
VOUT
VIN
L1
L2
VOUT
FB
5V
/800mA
2.5 V to 12V
VIN
R1
R3
C1
2X10µF
EN
C2
1MΩ
1MΩ
3X22µF
C3
0.1µF
VAUX
PS/SYNC
R2
PG
C4
10pF
111kΩ
GND
PGND
Power Good
Output
TPS63060
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Buck-Boost Overlap Control, PowerPAD are trademarks of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
TPS63060
TPS63061
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE DEVICE OPTIONS(1)
OUTPUT VOLTAGE
TA
PACKAGE MARKING
PACKAGE
PART NUMBER(2)
DC/DC
Adjustable
5 V
QUJ
QUK
TPS63060DSC
TPS63061DSC
–40°C to 85°C
10-Pin SON
(1) Contact the factory to check availability of other fixed output voltage versions.
(2) For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this data sheet.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
UNIT
MIN
–0.3
-0.3
-0.3
–40
-65
MAX
17
Voltage range
VIN, VOUT, PS/SYNC, EN, FB
V
V
L1, L2
VIN+0.3
7.5
FB, VAUX
V
Operating virtual junction temperature range, TJ
Storage temperature range Tstg
150
150
3
°C
°C
kV
V
Human Body Model - (HBM)
ESD rating(2)
Machine Model - (MM)
200
1.5
Charge Device Model - (CDM)
kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TPS63060,
TPS63061
THERMAL METRIC(1)
UNITS
DSC (10 PINS)
θJA
Junction-to-ambient thermal resistance
48.7
54.8
19.8
1.1
θJC(TOP)
θJB
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
ψJB
19.6
4.2
θJC(BOTTOM)
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
12
UNIT
V
Supply voltage at VIN
2.5
Output Current Iout with VIN = 10V to 12V
Operating free air temperature range, TA
Operating virtual junction temperature range, TJ Output Current Iout
1
A
–40
–40
85
°C
°C
125
2
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Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
www.ti.com
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
ELECTRICAL CHARACTERISTICS
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
2.5
TYP
MAX
UNIT
DC/DC STAGE
VIN
Input voltage range
12
2.5
8
V
V
V
VIIN
VOUT
Minimum input voltage for startup
TPS63060 output voltage range
2.5
Minimum duty cycle in step down
conversion
10%
20%
VFB
VFB
f
TPS63060 feedback voltage
TPS63061 output voltage
TPS63060 feedback voltage
TPS63061 output voltage
Oscillator frequency
495
4.95
500
5.0
505
5.05
5%
mV
V
PS/SYNC = VIN
PS/SYNC = GND Referenced to 500mV
PS/SYNC = GND Referenced to 5V
0.6%
0.6%
2200
2200
2000
5%
2400
2400
2250
90
2600
2600
2500
kHz
kHz
mA
mΩ
mΩ
Frequency range for synchronization
Average inductance current limit
High side switch on resistance
Low side switch on resistance
Line regulation
ISW
VIN = 5V, TA = 25°C
VIN = 5V
VIN = 5V
95
Power Save Mode disabled
Power Save Mode disabled
0.5%
0.5%
30
Load regulation
VIN
Quiescent current
VOUT
60
15
μA
μA
IO = 0 mA, VEN = VIN = 5V,
VOUT = 5V
Iq
7
TPS63061 FB input impedance
Shutdown current
VEN = HIGH
1.5
MΩ
μA
IS
VEN = 0 V, VIN = 5V
0.3
2
CONTROL STAGE
V
IN > VOUT
IN < VOUT
VIN
7
7
V
V
VAUX
Maximum bias voltage
V
VOUT
IAUX
Load current at VAUX
1
mA
V
UVLO
Under voltage lockout threshold
UVLO hysteresis
VIN voltage decreasing
1.8
1.2
1.9
2.2
300
mV
V
VIL
VIH
EN, PS/SYNC input low voltage
EN, PS/SYNC input high voltage
EN, PS/SYNC input current
PG output low voltage
0.4
V
Clamped on GND or VIN
0.01
0.04
0.01
0.1
0.4
0.1
16
μA
V
VOUT = 5V, IPGL = 10 μA
PG output leakage current
Output overvoltage protection
Overtemperature protection
Overtemperature hysteresis
μA
V
12
140
20
°C
°C
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
www.ti.com
PIN ASSIGNMENTS
DSC PACKAGE
(TOP VIEW)
L1
VIN
EN
L2
VOUT
FB
PS/SYNC
PG
GND
VAUX
Pin Functions
PIN
I/O
DESCRIPTION
NAME
EN
NO.
3
I
I
Enable input. (1 enabled, 0 disabled)
FB
8
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage
versions
GND
7
1
Control / logic ground
L1
I
I
Connection for Inductor
L2
10
4
Connection for Inductor
PS/SYNC
PG
I
Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization)
Output power good (1 good, 0 failure; open drain)
Power ground
5
O
PGND
VIN
PowerPAD™
2
9
6
I
Supply voltage for power stage
VOUT
VAUX
PowerPAD™
O
Buck-boost converter output
Connection for Capacitor
Must be soldered to achieve appropriate power dissipation. Must be connected to PGND.
4
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Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
www.ti.com
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
FUNCTIONAL BLOCK DIAGRAM (TPS63060)
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
PGND
PGND
VAUX
VAUX
VOUT
Gate
Control
_
+
VAUX
+
_
Modulator
Oscillator
FB
PG
+
VREF
-
Device
Control
PS/SYNC
EN
Temperature
Control
PGND
GND
PGND
FUNCTIONAL BLOCK DIAGRAM (TPS63061)
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
PGND
PGND
VAUX
VAUX
VOUT
Gate
Control
FB
_
+
VAUX
+
_
Modulator
Oscillator
PG
+
-
Device
Control
VREF
PS/SYNC
EN
Temperature
Control
PGND
GND
PGND
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
www.ti.com
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
DESCRIPTION
FIGURE
Maximum output current
vs Input voltage (TPS63060, VOUT = 2.5 V / VOUT = 8 V)
1
2
3
4
5
6
7
vs Input voltage (TPS63061, VOUT = 5V)
Efficiency
vs Output current (TPS63060, Power Save Enabled, VOUT = 2.5 V / VOUT = 8 V)
vs Output current (TPS63060, Power Save Disabled, VOUT = 2.5V / VOUT = 8V)
vs Output current (TPS63061, Power Save Disabled, VOUT = 5V)
vs Output current (TPS63061, Power Save Enabled, VOUT = 5V)
vs Input voltage (TPS63060, Power Save Enabled, VOUT = 2.5V, IOUT = {10; 500;
1000; 1300 mA})
vs Input voltage (TPS63060, Power Save Disabled, VOUT = 2.5V, IOUT = {10; 500;
1000; 1300 mA})
8
vs Input voltage (TPS63060, Power Save Enabled, VOUT = 8V, IOUT = {10; 500;
1000; 1300 mA})
9
vs Input voltage (TPS63060, Power Save Disabled, VOUT = 8V, IOUT = {10; 500;
1000; 1300 mA})
10
11
12
vs Input voltage (TPS63061, Power Save Enabled, VOUT = 5V, IOUT = {10; 500;
1000; 1300 mA})
vs Input voltage (TPS63061, Power Save Disabled, VOUT = 5V, IOUT = {10; 500;
1000; 1300 mA})
Output voltage
Waveforms
vs Output current (TPS63060, VOUT = 2.5 V)
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
vs Output current (TPS63061, VOUT = 5V)
vs Output current (TPS63060, VOUT = 8V)
Load Transient response ( TPS63061, Vin<Vout, Load Change from 600mA to 1A)
Load Transient response (TPS63061, Vin>Vout, Load change from 600mA to 1A)
Line Transient response (TPS63061, Vout=5V, Iout=500mA)
Startup after enable (TPS63061, Vout=5V, Vin=4.5V, Iout=1A)
Start up after enable ( TPS63061, Vout=5V, Vin=8V, Iout=2A)
Load Transient response (TPS63060, Vin<Vout, Load change from 600mA to 1A)
Load Transient response, (TPS63060, Vin>Vout, Load change from 600mA to 1A)
Line Transient response (TPS63060, Vout=8V, Iout=500mA)
Start up after enable (TPS63060, Vout=8V, Vin< Vout, Vin=5V, Iout=1A)
Startup after enable (TPS63060, Vout=8V, Vin=12V, Iout=1A)
Shutdown Current versus Input Voltage
Quiescent Current versus Input Voltage
6
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Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
www.ti.com
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
OUTPUT CURRENT
vs
MAXIMUM OUTPUT CURRENT
vs
INPUT VOLTAGE
INPUT VOLTAGE
3.2
2.7
2.2
1.7
1.2
0.7
3.5
3
TPS63060
TPS63061
V
= 2.5 V
O
V
= 5 V
O
2.5
2
V
= 8 V
O
1.5
1
0.2
2.5
0.5
4.5
6.5
8.5
10.5
12.5
2.5
4.5
6.5
8.5
10.5
12.5
V - Input Voltage - V
I
V - Input Voltage - V
I
Figure 1.
Figure 2.
EFFICIENCY
vs
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
90
80
70
60
50
40
30
20
10
0
100
V = 4.8 V V = 8 V
I
O
V = 7.2 V V = 8 V
I
O
90
80
70
60
50
40
30
20
10
0
V = 7.2 V V = 8 V
I
O
V = 4.8 V V = 2.5 V
I
O
V = 4.8 V V = 2.5 V
I
O
V = 7.2 V V = 2.5 V
I
O
V = 4.8 V V = 8 V
I
O
V = 7.2 V V = 2.5 V
I
O
TPS63060
Power Save Enabled
TPS63060
Power Save Disabled
0.0001
0.001
0.01 0.1
- Output Current - A
1
10
0.0001
0.001
0.01 0.1 1 10
- Output Current - A
I
I
O
O
Figure 3.
Figure 4.
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
www.ti.com
EFFICIENCY
vs
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
100
90
80
70
60
50
40
30
20
10
0
V = 4.8 V V = 5 V
I
O
90
80
70
60
50
40
30
20
10
V = 4.8 V V = 5 V
O
I
V = 7.2 V V = 5 V
I
O
V = 7.2 V V = 5 V
I
O
TPS63061
Power Save Enabled
TPS63061
Power Save Disabled
0
0.0001
0.001
0.01 0.1
- Output Current - A
1
10
0.0001
0.001
0.01 0.1
- Output Current - A
1
10
I
I
O
O
Figure 5.
Figure 6.
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
0
I
= 500 mA
I
= 500 mA
O
O
I
= 1000 mA
I
= 1000 mA
O
O
I
= 10 mA
I
= 1300 mA
O
O
I
= 1300 mA
O
I
= 10 mA
O
TPS63060 V = 2.5 V
O
Power Save Disabled
TPS63060 V = 2.5 V
O
Power Save Enabled
0
2.5
4.5
6.5
8.5
10.5
12.5
2.5
4.5
6.5
8.5
10.5
12.5
V - Input Voltage - V
I
V - Input Voltage - V
I
Figure 7.
Figure 8.
8
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Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
www.ti.com
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
I
= 1300 mA
I
= 10 mA
O
O
I
= 500 mA
O
I
= 1000 mA
I
= 1000 mA
O
O
I
= 1300 mA
O
I
= 500 mA
O
I
= 10 mA
O
TPS63060 V = 8 V
O
Power Save Enabled
TPS63060 V = 8 V
O
Power Save Disabled
0
2.5
2.5
4.5
6.5
8.5
10.5
12.5
4.5
6.5
8.5
10.5
12.5
V - Input Voltage - V
I
V - Input Voltage - V
I
Figure 9.
Figure 10.
EFFICIENCY
vs
EFFICIENCY
vs
INPUT VOLTAGE
INPUT VOLTAGE
100
100
90
80
70
60
50
40
30
20
10
0
I
= 10 mA
I
= 500 mA
O
O
90
80
70
60
50
40
30
20
10
0
I
= 1300 mA
O
I
= 1300 mA
O
I
= 1000 mA
O
I
= 1000 mA
O
I
= 500 mA
O
I
= 10 mA
O
TPS63061 V = 5 V
O
Power Save Enabled
TPS63061 V = 5 V
O
Power Save Disabled
2.5
4.5
6.5
8.5
10.5
12.5
2.5
4.5 6.5
8.5
10.5
12.5
V - Input Voltage - V
I
V - Input Voltage - V
I
Figure 11.
Figure 12.
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Product Folder Link(s): TPS63060 TPS63061
TPS63060
TPS63061
SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
www.ti.com
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
2.80
5.30
5.25
5.20
5.15
5.10
V = 7.2 V PWM
I
V = 7.2 V PWM
I
2.75
2.70
2.65
2.60
V = 7.2 V PFM
I
V = 7.2 V PFM
I
2.55
2.50
5.05
5.00
2.45
2.40
4.95
4.90
TPS63061
0.001
TPS63060 V = 2.5 V
O
0.0001
0.001
0.01 0.1
- Output Current - A
1
10
0.0001
0.01
0.1
1
10
I
I
- Output Current - A
O
O
Figure 13.
Figure 14.
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
LOAD TRANSIENT RESPONSE
8.40
8.35
Vin=4.5V, Iload=600mA to 1A
V = 7.2 V PWM
I
V = 7.2 V PFM
I
Vout 200mV/div
Offset=5V
8.30
8.25
8.20
8.15
8.10
8.05
8.00
Iout 200mA/div
Offset=600mA
IL 1A/div
7.95
7.90
TPS63060, V = 8 V
TPS63061, Vo=5V
100us/div
O
0.0001
0.001
0.01
0.1
1
10
I
- Output Current - A
O
Figure 15.
Figure 16.
10
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Product Folder Link(s): TPS63060 TPS63061
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TPS63061
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SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
LOAD TRANSIENT RESPONSE
Vin=8V, Iload=600mA to 1A
LINE TRANSIENT RESPONSE
Vin=4.5V to 5.5V, Iout=500mA
Vout 200mV/div
Offset=5V
Input Voltage
500mV/div, Offset=4.5V
Iout 200mA/div
Offset=600mA
Output Voltage
50mV/div, Offset=5V
IL 1A/div
TPS63061, Vo=5V
200us/div
TPS63061, Vo=5V
200us/div
Figure 17.
Figure 18.
STARTUP AFTER ENABLE
STARTUP AFTER ENABLE
Enable 5V/div
Enable 5V/div
PG 5V/div
PG 5V/div
Output Voltage 2V/div
Output Voltage 2V/div
Inductor Current 1A/div
Inductor Current 1A/div
TPS63061, Vo=5V
100us/div
Vin=4.5V, Io=1A
TPS63061, Vo=5V
100us/div
Vin=8V, Io=2A
Figure 19.
Figure 20.
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LOAD TRANSIENT
LOAD TRANSIENT
Vin=12V,
Iload=600mA to 1A
Vin=5V, Iload=600mA to 1A
Vout 200mV/div
Offset=8V
Vout 200mV/div
Offset=8V
Vout 200mA/div
Offset=600mA
Iout 200mA/div
Offset=600mA
IL 1A/div
IL 1A/div
TPS63060, Vo=8V
200us/div
TPS63060, Vo=8V
200us/div
Figure 21.
Figure 22.
LINE TRANSIENT
STARTUP AFTER ENABLE
Vin=8V to 8.6V, Iout=500mA
Input Voltage
Enable
5V/div
PG 5V/div
200mV/div, offset=8V
Output Voltage 5V/div
Inductor Current 1A/div
Output Voltage
50mV/div, offset=8V
TPS63060, Vo=8V
100us/div
TPS63060 Vo=8V
200us/div
Io=1A
Vin=5V,
Figure 23.
Figure 24.
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STARTUP AFTER ENABLE
Shutdown Current versus Input Voltage
1
0.9
0.8
0.7
0.6
0.5
0.4
Enable 5V/div
PG 5V/div
Output Voltage 5V/div
Inductor Current 1A/div
0.3
0.2
Io=1A
Vin=12V
TPS63060, Vo=8V
100us/div
2
3
4
5
6
7
8
9
10 11 12
V - Input Voltage - V
I
Figure 25.
Figure 26.
Quiescent Current versus Input Voltage
55
50
45
40
35
2
3
4
5
6
7
8
9
10 11 12
V - Input Voltage - V
I
Figure 27.
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PARAMETER MEASUREMENT INFORMATION
L1
1µH
VOUT
VIN
L1
L2
VOUT
FB
5V
/800mA
2.5 V to 12V
VIN
EN
R1
R3
C1
2X10µF
C2
1MΩ
1MΩ
3X22µF
C3
0.1µF
VAUX
PS/SYNC
R2
PG
C4
10pF
111kΩ
GND
PGND
Power Good
Output
TPS6306X
Table 1. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
Texas Instruments
TPS63060 and TPS63061
L1
1μH, 3 mm x 3 mm x 1.5 mm
Coilcraft , XFL4020-102
C1
2 x 10 μF 16V, 0805, X5R ceramic
3 × 22 μF 16V, 0805, X5R ceramic
0.1 μF, X5R ceramic
Taiyo Yuden, EMK212BJ
Taiyo Yuden, LMK212BJ
C2
C3
C4
10pF, ceramic
R1, R2
Depending on the output voltage at TPS63060 and TPS63061: R1=0, C4 and R2 n.a.
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DETAILED DESCRIPTION
DETAILED DESCRIPTION
The controller circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change
the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its
feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to
that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed
output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the
internal reference voltage to generate a stable and accurate output voltage.
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND
and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect
the device from overheating an internal temperature sensor is implemented.
Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches from
buck operation to boost operation and back as required. It always uses one active switch, one rectifying switch,
one switch permanently on, and one switch permanently off. Therefore, it operates as a step down converter
(buck) when the input voltage is higher than the output voltage, and as a boost converter when the input voltage
is lower than the output voltage. There is no mode of operation in which all 4 switches are permanently
switching. Controlling the switches this way allows the converter to maintain high efficiency at the most important
point of operation, when the input voltage is close to the output voltage. The RMS current through the switches
and the inductor is kept at a minimum, to minimize switching and conduction losses.
Control Loop Description
The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control
loop. Figure 28 shows the control loop.
The non inverting input of the transconductance amplifier Gmc can be assumed to be constant. The output of
Gmv defines the average inductor current. The current through resistor RS, which represents the actual inductor
current, is compared to the desired value and the difference, or current error, is amplified and compared to the
sawtooth ramp of either the Buck or the Boost.
The Buck-Boost Overlap Control™ makes sure that the classical buck-boost function, which would cause two
switches to be on every half a cycle, is avoided. Thanks to this block whenever all switches becomes active
during one clock cycle, the two ramps are shifted away from each other. However, when there is no switching
activities because there is a gap between the ramps, the ramps are moved closer together. As a result the
number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values are
achieved.
Slope compensation is not required to avoid subharmonic oscillation which are otherwise observed when working
with peak current mode control with D>0.5.
Nevertheless the amplified inductor current downslope at one input of the PWM comparator must not exceed the
oscillator ramp slope at the other comparator input. This purpose is reached limiting the gain of the current
amplifier.
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TM
Figure 28. Average Current Mode Control
Power-save mode and synchronization
The PS/SYNC pin can be used to select different operation modes. Power Save Mode is used to improve
efficiency at light load. To enable Power-Save, PS/SYNC must be set low. If PS/SYNC is set low then Power
Save Mode is entered when the average inductor current gets lower then about 100mA. At this point the
converter operates with reduced switching frequency and with a minimum quiescent current to maintain high
efficiency.
During the Power Save Mode, the output voltage is monitored with a comparator by the threshold comp low and
comp high. When the device enters Power Save Mode, the converter stops operating and the output voltage
drops. The slope of the output voltage depends on the load and the value of output capacitance. As the output
voltage falls below the comp low threshold set to 2.5% typical above Vout, the device ramps up the output
voltage again, by starting operation using a programmed average inductor current higher than required by the
current load condition. Operation can last for one or several pulses. The converter continues these pulses until
the comp high threshold, set to typically 3.5% above Vout nominal, is reached and the average inductor current
gets lower than about 100mA. When the load increases above the minimum forced inductor current of about
100mA, the device will automatically switch to PWM mode.
The Power Save Mode can be disabled by programming the PS/SYNC high. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency.
Synchronization is done by a PLL to lower and higher frequencies compared to the internal clock. The PLL can
also tolerate missing clock pulses without the converter malfunctioning. The PS/SYNC input supports standard
logic thresholds.
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Heavy Load transient step
PFM mode at light load
current
3.5%
Comparator High
3%
2.5%
Comparator low
PWM mode
Vo
Absolute Voltage drop
with positioning
Figure 29. Power-Save Mode Thresholds and Dynamic Voltage Positioning
Dynamic voltage positioning
As detailed in Figure 29, the output voltage is typically 3% above the nominal output voltage at light load
currents, as the device is in Power Save Mode. This gives additional headroom for the voltage drop during a load
transient from light load to full load. This allows the converter to operate with a small output capacitor and still
have a low absolute voltage drop during heavy load transient changes. See Figure 29 for detailed operation of
the Power Save Mode
Dynamic Current limit
In order to keep the output voltage regulated when the power source becomes weaker the device has
implemented a dynamic current limit function. The maximum current allowed through the switch depends on the
voltage applied at the input terminal of the TPS6306X. The curve in Figure 30 shows this dependency, and the
ISW versus VIN. The dynamic current limit has its lowest value when reaching the minimum recommended supply
voltage at VIN.
Given the ISW value from Figure 30, is then possible to calculate the output current reached in boost mode using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
V
- V
IN
OUT
V
Duty Cycle Boost
D =
OUT
(1)
(2)
Maximum Output Current Boost
I
= h x I
SW
x (1 - D)
OUT
V
OUT
V
Duty Cycle Buck
D =
IN
(3)
(4)
Maximum Output Current Buck
I
= I
SW
OUT
With,
η = Estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption)
f = Converter switching frequency (typical 2.4 MHz)
L = Selected inductor value
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If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. The current limit is reduced with temperature increasing.
3.2
3
2.8
2.5
2.2
2
1.8
1.5
2
3
4
5
6
7
8
Input Voltage (V)
9
10
11
12
G000
Figure 30. Average Inductance Current versus Input Voltage
Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This means that the output voltage can drop below the input voltage during
shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high
peak currents flowing from the input.
Power Good
The device has a built in power good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current gets limited to a value below the current the voltage regulator demands for
maintaining the output voltage the power good output gets low impedance. The output is open drain, so its logic
function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the
supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides
the earliest indication possible for an output voltage break down and leaves the connected application a
maximum time to safely react.
Softstart and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial 400mA
following the output voltage increasing. At an output voltage of about 1.2V, the current limit is at its nominal
value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented.
Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device
ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. When
the output voltage does not increase above 1.2V, the device assumes a short circuit at the output, and keeps the
current limit low to protect itself and the application. At a short on the output during operation, the current limit is
also kept under 2A typically (minimum average inductance current).
Overvoltage Protection
If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the
output voltage will not work anymore. Therefore, overvoltage protection is implemented to avoid the output
voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented
overvoltage protection circuit monitors the output voltage internally as well. If it reaches the overvoltage
threshold, the voltage amplifier regulates the output voltage to this value.
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Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VIN is lower than
approximately its threshold (see the Electrical Characteristics table). When in operation, the device automatically
enters the shutdown mode if the voltage on VIN drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see the Electrical Characteristics table) the device stops operating. As soon
as the IC temperature has decreased below the programmed threshold, it starts operating again. There is a
built-in hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
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APPLICATION INFORMATION
DESIGN PROCEDURE
The TPS6306x series of buck-boost converter has internal loop compensation. Therefore, the external L-C filter
has to be selected to work with the internal compensation. When selecting the output filter a low limit for the
inductor value exists to avoid subharmonic oscillation which could be caused by a far too fast ramp up of the
amplified inductor current. For the TPS6306x series, the minimum inductor value should be kept at 1µH.
Selecting a larger output capacitor value is less critical because the corner frequency moves to lower
frequencies. To simplify this process, Table 2 outlines possible inductor and capacitor value combinations.
Table 2. Output Filter Selection (Average Inductance current up to 2A)
OUTPUT CAPACITOR VALUE [µF](2)
INDUCTOR VALUE [µH](1)
44
√
66
100
√
(3)
1.0
1.5
√
√
√
√
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20%
and –30%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
20% and –50%.
(3) Typical application. Other check mark indicates recommended filter combinations
Inductor Selection
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies the core material has a higher impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, with the chosen
inductance value, the peak current for the inductor in steady state operation can be calculated. Equation 1 and
Equation 5 show how to calculate the peak current IPEAK. Only the equation which defines the switch current in
boost mode is reported because this is providing the highest value of current and represents the critical current
value for selecting the right inductor.
Iout
Vin ´ D
IPEAK
=
+
η ´ (1 - D)
2 ´ f ´ L
(5)
With,
D =Duty Cycle in Boost mode
f = Converter switching frequency (typical 2.4 MHz)
L = Selected inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption)
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
Consideration must be given to the load transients and error conditions that can cause higher inductor currents.
This must be taken into consideration when selecting an appropriate inductor. See Table 3 for typical inductors.
The size of the inductor can also affect the stability of the feedback loop. In particular the boost transfer function
exhibits a right half-plane zero, whose frequency is inverse proportional to the inductor value and the load
current. This means higher is the value of inductance and load current more possibilities has the right half plane
zero to be moved at lower frequency. This could degrade the phase margin of the feedback loop. It is
recommended to choose the inductor's value in order to have the frequency of the right half plane zero >400kHz.
The frequency of the RHPZ can be calculated using Equation 6.
(1 - D)2 ´ Vout
f
RHPZ
=
2p ´Iout ´ L
(6)
With,
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D =Duty Cycle in Boost mode
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
Table 3. Inductor Selection
INDUCTOR VALUE
COMPONENT SUPLIER
Coilcraft XFL4020-102
SIZE (LxWxH mm)
4 x 4 x 2.1
Isat/DCR
5.1A/10.8 mΩ
2.7A/27 mΩ
1 µH
1 µH
TOKO DEM2815 1226AS-H-1R0N
Coilcraft XFL4020-152
3 x 3.2 x 1.5
4 x 4 x 2.1
1.5µH
4.4A/ 14.40mΩ
Capacitor selection
Input Capacitor
At least a 20μF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of
the IC is recommended.
Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. If, for any reason, the application requires the use of large capacitors which can
not be placed close to the IC, use a smaller ceramic capacitor in parallel to the large capacitor. The small
capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. The recommended
typical output capacitor value is 66µF with a variance as outlined in Table 2.
There is also no upper limit for the output capacitance value. Larger capacitors will cause lower output voltage
ripple as well as lower output voltage drop during load transients.
When choosing input and output capacitors, it needs to be kept in mind, that the value of capacitance
experiences significant losses from their rated value depending on the operating temperature and the operating
DC voltage. It's not uncommon for a small surface mount ceramic capacitor to lose 50% and more of it's rated
capacitance. For this reason, it is important to use a larger value of capacitance or a capacitor with higher
voltage rating in order to ensure the required capacitance at the full operating voltage.
Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor is
connected between VAUX and GND. Using a ceramic capacitor with a value of 0.1μF is recommended. The
capacitor needs to be placed close to the VAUX pin. The value of this capacitor should not be higher than
0.22μF.
Setting the Output Voltage
When the adjustable output voltage version TPS63060 is used, the output voltage is set by the external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated properly, the typical value of the voltage at the FB pin is 500mV. The maximum recommended value
for the output voltage is 8V. The current through the resistive divider should be about 100 times greater than the
current into the FB pin. The typical current into the FB pin is 0.01μA, and the voltage across the resistor between
FB and GND, R2, is typically 500 mV. Based on these two values, the recommended value for R2 should be
lower than 500kΩ, in order to set the divider current at 3μA or higher. It is recommended to keep the value for
this resistor in the range of 200kΩ. From that, the value of the resistor connected between VOUT and FB, R1,
depending on the needed output voltage (VOUT), can be calculated using Equation 7:
æ
ç
è
ö
VOUT
VFB
R1 = R2 ×
- 1
÷
ø
(7)
A small capacitor C4=10pF, in parallel with R2 needs to be placed when using the Power Save Mode and the
adjustable version, to provide filtering and improve the efficiency at light load.
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LAYOUT CONSIDERATIONS
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB by soldering the PowerPAD™
Introducing airflow in the system
For more details on how to use the thermal parameters in the dissipation ratings table please check the Thermal
Characteristics Application Note (SZZA017) and the IC Package Thermal Metrics Application Note (SPRA953).
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SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
TYPICAL APPLICATION
L1
1µH
VOUT
VIN
L1
L2
VOUT
FB
5V
/500mA
2.5 V to 12V
VIN
R1
R3
C1
2X10µF
EN
C2
1MΩ
1MΩ
2X22µF
C3
0.1µF
VAUX
PS/SYNC
R2
PG
C4
10pF
111kΩ
GND
PGND
Power Good
Output
TPS6306X
Figure 31. 5V and 500mA from 1 or 2 cell Li-Ion
L1
1.5 µH
VOUT
VIN
L1
L2
VOUT
FB
5V
/1A
4.5 V to 12V
VIN
R1
R3
C1
2X10µF
EN
C2
1MΩ
1MΩ
3X22µF
C3
0.1µF
VAUX
PS/SYNC
R2
PG
C4
10pF
111kΩ
GND
PGND
Power Good
Output
TPS63060
Figure 32. 5V and 1A from Input Voltage up to 12V
L1
1.5 µH
VOUT
VIN
L1
L2
VOUT
FB
8V
/1.3A
10V
7 V to
VIN
R1
R3
C1
2X10µF
EN
C2
1MΩ
1MΩ
3X22µF
C3
0.1µF
VAUX
PS/SYNC
R2
66.5kΩ
PG
C4
10pF
GND
PGND
Power Good
Output
TPS63060
Figure 33. 8V and 1.3A from 2 cell Li-Ion
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L1
1µH
VOUT
VIN
L1
L2
5V
/800mA
2.5 V to 12V
VIN
EN
VOUT
R3
C2
C1
2X10µF
C3
1MΩ
PG
3X22µF
VAUX
0.1µF
PS/SYNC
GND
PGND
Power Good
Output
TPS63061
Figure 34. TPS63061 5V Fixed Output Voltage
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Feb-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPS63060DSCR
TPS63060DSCT
TPS63061DSCR
TPS63061DSCT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SON
SON
SON
SON
DSC
DSC
DSC
DSC
10
10
10
10
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
3000
250
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS63060DSCR
TPS63060DSCT
TPS63061DSCR
TPS63061DSCT
SON
SON
SON
SON
DSC
DSC
DSC
DSC
10
10
10
10
3000
250
330.0
180.0
330.0
180.0
12.4
12.4
12.4
12.4
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1.1
1.1
1.1
1.1
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
Q2
Q2
Q2
Q2
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS63060DSCR
TPS63060DSCT
TPS63061DSCR
TPS63061DSCT
SON
SON
SON
SON
DSC
DSC
DSC
DSC
10
10
10
10
3000
250
367.0
210.0
367.0
210.0
367.0
185.0
367.0
185.0
35.0
35.0
35.0
35.0
3000
250
Pack Materials-Page 2
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