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TPS79530DCQRG4N/S [TI]

IC VREG 3 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6, GREEN, PLASTIC, SOT-223, 6 PIN, Fixed Positive Single Output LDO Regulator;
TPS79530DCQRG4N/S
型号： TPS79530DCQRG4N/S
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

IC VREG 3 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6, GREEN, PLASTIC, SOT-223, 6 PIN, Fixed Positive Single Output LDO Regulator

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TPS795xx  
www.ti.com  
SLVS350G–OCTOBER 2002–REVISED JULY 2006  
ULTRALOW-NOISE, HIGH-PSRR, FAST, RF, 500-mA  
LOW-DROPOUT LINEAR REGULATORS  
FEATURES  
DESCRIPTION  
•
500-mA Low-Dropout Regulator With Enable  
The TPS795xx family of low-dropout (LDO),  
low-power linear voltage regulators features high  
power-supply rejection ratio (PSRR), ultralow noise,  
fast start-up, and excellent line and load transient  
responses in small outline, SOT223-6 and 3 x 3 SON  
packages. Each device in the family is stable with a  
small 1-µF ceramic capacitor on the output. The  
family uses an advanced, proprietary BiCMOS  
fabrication process to yield extremely low dropout  
voltages (for example, 110 mV at 500 mA). Each  
device achieves fast start-up times (approximately 50  
•
Available in Fixed and Adjustable (1.2-V to  
5.5-V) Versions  
•
•
•
•
•
•
High PSRR (50 dB at 10 kHz)  
Ultralow Noise (33 µVRMS, TPS79530)  
Fast Start-Up Time (50 µs)  
Stable With a 1-µF Ceramic Capacitor  
Excellent Load/Line Transient Response  
Very Low Dropout Voltage (110 mV at Full  
Load, TPS79530)  
µs with  
a
0.001-µF bypass capacitor) while  
consuming very low quiescent current (265 µA,  
typical). Moreover, when the device is placed in  
standby mode, the supply current is reduced to less  
than 1 µA. The TPS79530 exhibits approximately 33  
µVRMS of output voltage noise at 3.0 V output with a  
0.1-µF bypass capacitor. Applications with analog  
components that are noise-sensitive, such as  
portable RF electronics, benefit from the high-PSRR  
and low-noise features, as well as from the fast  
response time.  
•
6-Pin SOT223 and 3 × 3 SON Packages  
APPLICATIONS  
•
•
•
•
•
RF: VCOs, Receivers, ADCs  
Audio  
Bluetooth®, Wireless LAN  
Cellular and Cordless Telephones  
Handheld Organizers, PDAs  
TPS79530  
RIPPLE REJECTION  
vs  
TPS79530  
OUTPUT SPECTRAL NOISE DENSITY  
vs  
DRB PACKAGE  
3mm x 3mm SON  
(TOP VIEW)  
FREQUENCY  
FREQUENCY  
80  
70  
0.5  
V
= 4 V  
IN  
V
= 5.5 V  
IN  
C
C
= 10 mF  
IN  
IN  
1
2
3
4
8
7
6
5
EN  
OUT  
C
OUT  
= 2.2 mF  
= 0.01 mF  
NR  
I
= 1 mA  
0.4  
0.3  
C
NR  
= 0.1 mF  
OUT  
NC  
60  
50  
40  
30  
OUT  
OUT  
GND  
NR/FB  
DCQ PACKAGE  
SOT223-6  
(TOP VIEW)  
I
= 1 mA  
OUT  
I
= 500 mA  
OUT  
0.2  
1
2
EN  
IN  
20  
10  
0
6
I
= 0.5 A  
OUT  
3
4
5
GND  
OUT  
0.1  
0
GND  
NR/FB  
1
10  
100  
1 k 10 k 100 k 1 M 10 M  
100  
1 k  
Frequency (Hz)  
10 k  
100 k  
Frequency (Hz)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Bluetooth is a registered trademark of Bluetooth SIG, Inc.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–2006, Texas Instruments Incorporated  
TPS795xx  
www.ti.com  
SLVS350G–OCTOBER 2002–REVISED JULY 2006  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be  
more susceptible to damage because very small parametric changes could cause the device not to meet its published  
specifications.  
ORDERING INFORMATION(1)  
(2)  
PRODUCT  
VOUT  
TPS795xxyyyz  
XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable).  
YYY is package designator.  
Z is package quantity.  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Output voltages from 1.3 V to 5.0 V in 100 mV increments are available; minimum order quantities may apply. Contact factory for details  
and availability.  
ABSOLUTE MAXIMUM RATINGS  
over operating temperature (unless otherwise noted)(1)  
VALUE  
VIN range  
– 0.3 V to 6 V  
–0.3 V to VIN + 0.3 V  
6 V  
VEN range  
VOUT range  
Peak output current  
ESD rating, HBM  
Internally limited  
2 kV  
ESD rating, CDM  
500 V  
Continuous total power dissipation  
Junction temperature range, TJ  
Storage temperature range, Tstg  
See Dissipation Rating Table  
–40°C to +150°C  
–65°C to +150°C  
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may  
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond  
those specified is not implied.  
DISSIPATION RATING TABLE  
PACKAGE  
SOT223  
BOARD  
Low K(1)  
High-K(2)  
RθJC  
RθJA  
15°C/W  
1.2°C/W  
53°C/W  
40°C/W  
3 x 3 SON  
(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3-inch (7.5 cm × 7.5cm), two-layer board with 2-ounce  
copper traces on top of the board.  
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch × 3-inch (7,5-cm × 7,5-cm), multilayer board with 1-ounce  
internal power and ground planes and 2-ounce copper traces on top and bottom of the board.  
2
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TPS795xx  
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
ELECTRICAL CHARACTERISTICS  
Over recommended operating temperature range (TJ = –40°C to +125°C), VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1 mA,  
COUT = 10 µF, CNR = 0.01 µF, unless otherwise noted. Typical values are at +25°C.  
PARAMETER  
TEST CONDITIONS  
MIN  
2.7  
TYP  
MAX  
5.5  
UNIT  
V
(1)  
Input voltage, VIN  
Internal reference, VFB (TPS79501)  
Continuous output current, IOUT  
1.200  
0
1.225  
1.250  
V
500  
mA  
V
Output voltage range  
Output  
TPS79501  
TPS79501(2) 0 µA ≤ IOUT ≤ 500 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V(1)  
1.225  
5.5 – VDO  
0.98(VOUT  
)
VOUT 1.02(VOUT  
)
V
voltage  
Accuracy  
Fixed VOUT  
0 µA ≤ IOUT ≤ 500 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V(1)  
VOUT + 1 V ≤ VIN ≤ 5.5 V  
0 µA ≤ IOUT ≤ 500 mA,  
IOUT = 500 mA  
–2.0  
+2.0  
0.12  
%
(1)  
Output voltage line regulation (∆VOUT%/∆VIN  
)
0.05  
3
%/V  
mV  
Load regulation (∆VOUT%/∆IOUT  
)
TPS79530  
TPS79533  
110  
105  
2.8  
170  
160  
4.2  
385  
1
Dropout voltage(3)  
VIN = VOUT(nom) - 0.1 V  
mV  
IOUT = 500 mA  
Output current limit  
Ground pin current  
Shutdown current(4)  
FB pin current  
VOUT = 0 V  
2.4  
A
0 µA ≤ IOUT ≤ 500 mA  
VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V  
VFB = 1.225 V  
265  
0.07  
µA  
µA  
µA  
1
f = 100 Hz, IOUT = 10 mA  
f = 100 Hz, IOUT = 500 mA  
f = 10 kHz, IOUT = 500 mA  
f = 100 kHz, IOUT = 500 mA  
CNR = 0.001 µF  
59  
58  
50  
39  
46  
41  
35  
33  
50  
75  
110  
Power-supply ripple rejection  
TPS79530  
dB  
CNR = 0.0047 µF  
BW = 100 Hz to 100 kHz,  
Output noise voltage (TPS79530)  
Time, start-up (TPS79530)  
µVRMS  
IOUT = 500 mA  
CNR = 0.01 µF  
CNR = 0.1 µF  
CNR = 0.001 µF  
RL = 6 Ω, COUT = 1 µF  
CNR = 0.0047 µF  
CNR = 0.01 µF  
µs  
High-level enable input voltage  
Low-level enable input voltage  
EN pin current  
2.7 V ≤ VIN ≤ 5.5 V  
2.7 V ≤ VIN ≤ 5.5 V  
VEN = 0 V  
1.7  
VIN  
0.7  
1
V
V
1
µA  
V
UVLO threshold  
VCC rising  
2.25  
2.65  
UVLO hysteresis  
100  
mV  
(1) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater.  
(2) Tolerance of external resistors not included in this specification.  
(3) Dropout is not measured for the TPS79501 and TPS79525 since minimum VIN = 2.7 V.  
(4) For adjustable version, this applies only after VIN is applied; then VEN transitions high to low.  
3
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TPS795xx  
www.ti.com  
SLVS350G–OCTOBER 2002–REVISED JULY 2006  
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION  
IN  
OUT  
Ω
300  
Current  
Sense  
UVLO  
Overshoot  
Detect  
GND  
EN  
ILIM  
SHUTDOWN  
R1  
R2  
FB  
UVLO  
Thermal  
Shutdown  
Quickstart  
External to  
the Device  
Bandgap  
Reference  
1.225 V  
VREF  
VIN  
Ω
250 k  
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION  
IN  
OUT  
Ω
300  
Current  
Sense  
UVLO  
Overshoot  
Detect  
GND  
EN  
ILIM  
SHUTDOWN  
R1  
R2  
UVLO  
Thermal  
Shutdown  
Ω
R2 = 40 k  
Quickstart  
Bandgap  
Reference  
1.225 V  
VREF  
VIN  
NR  
Ω
250 k  
Table 1. Terminal Functions  
SOT223 (DCQ)  
PIN NO.  
3x3 SON (DRB)  
PIN NO.  
NAME  
IN  
DESCRIPTION  
2
3, 6  
1
1, 2  
6
Unregulated input to the device  
Regulator ground  
GND  
EN  
8
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into  
shutdown mode. EN can be connected to IN if not used.  
NR  
5
5
Noise-reduction pin for fixed versions only. Connecting an external capacitor to this pin bypasses  
noise generated by the internal bandgap, which improves power-supply rejection and reduces  
output noise. (Not available on adjustable versions.)  
FB  
5
4
–
5
3, 4  
7
Feedback input voltage for the adjustable device. (Not available on fixed voltage versions.)  
OUT  
NC  
Regulator output.  
Not connected  
4
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TPS795xx  
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
TYPICAL CHARACTERISTICS  
TPS79530  
TPS79530  
TPS79530  
OUTPUT VOLTAGE  
OUTPUT VOLTAGE  
GROUND CURRENT  
vs OUTPUT CURRENT  
vs JUNCTION TEMPERATURE  
vs JUNCTION TEMPERATURE  
3.005  
3.02  
3.01  
276  
V
C
= 4 V  
V
= 4 V  
IN  
IN  
274  
272  
270  
268  
266  
264  
= 10 µF  
C
OUT  
= 10 µF  
OUT  
3
I
= 1 mA  
OUT  
2.995  
I
= 1 mA  
OUT  
2.99  
2.985  
2.98  
3
I
= 0.5 A  
OUT  
I
= 0.5 A  
OUT  
2.99  
2.98  
2.975  
2.97  
262  
260  
0
0.1  
0.2  
0.3  
(mA)  
0.4  
0.5  
−40 −25 −10 5 20 35 50 65 80 95 110 125  
(°C)  
−40 −25−10 5 20 35 50 65 80 95 110 125  
I
T
J
(°C)  
OUT  
T
J
Figure 1.  
Figure 2.  
Figure 3.  
TPS79530  
TPS79530  
TPS79530  
OUTPUT SPECTRAL  
NOISE DENSITY  
vs FREQUENCY  
OUTPUT SPECTRAL  
NOISE DENSITY  
vs FREQUENCY  
OUTPUT SPECTRAL  
NOISE DENSITY  
vs FREQUENCY  
2.5  
2
0.6  
0.5  
0.4  
0.3  
V
= 5.5 V  
= 500 mA  
IN  
V
C
C
= 5.5 V  
V
C
C
= 5.5 V  
IN  
IN  
I
OUT  
= 2.2 µF  
= 10 µF  
OUT  
= 0.1 µF  
OUT  
= 0.1 µF  
0.5  
0.4  
0.3  
0.2  
0.1  
0
C
= 10 µF  
OUT  
NR  
NR  
C
NR  
= 0.001 µF  
I
= 1 mA  
OUT  
C
NR  
= 0.0047 µF  
I
= 1 mA  
OUT  
1.5  
1
C
NR  
= 0.01 µF  
0.2  
C
= 0.1 µF  
NR  
I
= 0.5 A  
OUT  
I
= 0.5 A  
OUT  
0.5  
0
0.1  
0
100  
1 k  
10 k  
100 k  
100  
1 k  
10 k  
100 k  
100  
1 k  
10 k  
100 k  
Frequency (Hz)  
Frequency (Hz)  
Frequency (Hz)  
Figure 4.  
Figure 5.  
Figure 6.  
TPS79530  
ROOT MEAN SQUARED  
OUTPUT NOISE vs CNR  
TPS79530  
TPS79530  
RIPPLE REJECTION  
vs FREQUENCY  
DROPOUT VOLTAGE  
vs JUNCTION TEMPERATURE  
80  
70  
60  
50  
40  
30  
20  
50  
175  
150  
125  
100  
75  
V
= 2.9 V  
= 10 µF  
OUT  
= 500 mA  
V
C
C
= 4 V  
IN  
IN  
I
C
= 500 mA  
OUT  
C
I
= 10 µF  
OUT  
= 0.1 µF  
= 10 µF  
OUT  
NR  
OUT  
40  
30  
20  
I
= 1 mA  
OUT  
I
= 500 mA  
OUT  
50  
10  
0
25  
0
10  
0
BW = 100 Hz to 100 kHz  
−40−25−10  
5
20 35 50 65 80 95 110 125  
(°C)  
1
10  
100 1 k 10 k 100 k 1 M 10 M  
0.001  
0.01  
0.1  
0.0047  
T
J
Frequency (Hz)  
C
(µF)  
NR  
Figure 7.  
Figure 8.  
Figure 9.  
5
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TPS795xx  
www.ti.com  
SLVS350G–OCTOBER 2002–REVISED JULY 2006  
TYPICAL CHARACTERISTICS (continued)  
TPS79530  
RIPPLE REJECTION  
vs FREQUENCY  
TPS79530  
RIPPLE REJECTION  
vs FREQUENCY  
TPS79530  
RIPPLE REJECTION  
vs FREQUENCY  
80  
70  
60  
50  
40  
30  
20  
10  
0
80  
70  
80  
70  
60  
50  
40  
30  
20  
V = 4 V  
IN  
V
C
C
= 4 V  
V
C
C
= 4 V  
IN  
IN  
C
C
= 2.2 µF  
= 2.2 µF  
= 10 µF  
OUT  
= 0.1 µF  
OUT  
OUT  
= 0.01 µF  
= 0.01 µF  
NR  
NR  
NR  
I
= 1 mA  
OUT  
I
= 1 mA  
OUT  
I
= 1 mA  
60  
50  
40  
30  
OUT  
I
= 500 mA  
OUT  
I
= 500 mA  
I
= 500 mA  
OUT  
OUT  
20  
10  
0
10  
0
1
10  
100 1 k 10 k 100 k 1 M 10 M  
1
10  
100  
1 k 10 k 100 k 1 M 10 M  
1
10  
100 1 k 10 k 100 k 1 M 10 M  
Frequency (Hz)  
Frequency (Hz)  
Frequency (Hz)  
Figure 10.  
Figure 11.  
TPS79518  
Figure 12.  
TPS79530  
TPS79530  
START-UP TIME  
LINE TRANSIENT RESPONSE  
LINE TRANSIENT RESPONSE  
3
20  
30  
20  
10  
0
C
= 0.001 µF  
NR  
2.75  
2.50  
2.25  
2
10  
0
C
= 0.0047 µF  
NR  
C
= 0.01 µF  
NR  
Enable  
1.75  
1.50  
1.25  
1
−10  
−20  
4
−10  
−20  
5
C
I
= 10 µF, C = 0.01 µF,  
NR  
OUT  
= 0.5 A, dv/dt = 1 V/µs  
C
OUT  
= 10 µF, C = 0.01 µF,  
NR  
OUT  
OUT  
= 0.5 A, dv/dt = 1 V/µs  
I
0.75  
0.50  
0.25  
0
V
= 4 V  
= 10 µF  
= 0.5 A  
IN  
3
2
C
OUT  
4
3
I
OUT  
0
100  
200  
300  
400  
500 600  
0
50  
100  
150  
200  
0
50  
100  
t (µs)  
150  
200  
t (µs)  
t (µs)  
Figure 13.  
Figure 14.  
Figure 15.  
TPS79530  
DROPOUT VOLTAGE  
vs OUTPUT CURRENT  
TPS79530  
LOAD TRANSIENT RESPONSE  
TPS79525  
POWER UP/POWER DOWN  
4.5  
180  
160  
140  
120  
100  
80  
60  
40  
20  
V
R
= 2.5 V,  
= 10 Ω  
OUT  
4
L
3.5  
V
IN  
T
J
= 125°C  
3
0
−20  
−40  
−60  
T
J
= 25°C  
2.5  
2
1.5  
60  
C
V
= 10 µF, C = 0.01 µF,  
NR  
V
OUT  
= 3.8 V, dv/dt = 0.5 A/µs  
OUT  
1
T
J
= −40°C  
L
40  
0.5  
0
0.5  
20  
0
−0.5  
−0.5  
0
0
0
400  
800  
1200  
1600  
2000  
200  
400  
t (µs)  
600  
800  
1000  
0
100  
200  
300  
400  
500  
Time (µs)  
I
(mA)  
OUT  
Figure 16.  
Figure 17.  
Figure 18.  
6
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
TYPICAL CHARACTERISTICS (continued)  
TPS79530  
TYPICAL REGIONS OF STABILITY  
EQUIVALENT SERIES RESISTANCE  
(ESR)  
TPS79530  
TYPICAL REGIONS OF STABILITY  
EQUIVALENT SERIES RESISTANCE  
(ESR)  
TPS79501  
DROPOUT VOLTAGE  
vs INPUT VOLTAGE  
vs OUTPUT CURRENT  
vs OUTPUT CURRENT  
100  
200  
150  
100  
100  
C
OUT  
= 1 µF  
C
C
= 10 µF,  
= 0.01 µF,  
= 50 mA  
C
OUT  
= 2.2 µF  
OUT  
Region of  
Instability  
NR  
I
OUT  
Region of  
Instability  
10  
10  
1
T
J
= 125°C  
1
T
= 25°C  
J
Region of Stability  
Region of Stability  
0.1  
0.1  
50  
0
T
J
= −40°C  
0.01  
0.01  
0
100  
200  
300  
(mA)  
400  
500  
1
10  
100  
1000  
2.5  
3
3.5  
4
4.5  
5
I
V
(V)  
OUT  
I
(mA)  
OUT  
IN  
Figure 19.  
Figure 20.  
Figure 21.  
TPS79530  
TYPICAL REGIONS OF STABILITY  
EQUIVALENT SERIES RESISTANCE  
(ESR)  
vs OUTPUT CURRENT  
100  
C
OUT  
= 10 µF  
10  
1
Region of  
Instability  
Region of Stability  
0.1  
0.01  
0
100  
200  
300  
(A)  
400  
500  
I
OUT  
Figure 22.  
7
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
APPLICATION INFORMATION  
because any leakage current creates an IR drop  
across the internal resistor, thus creating an output  
error. Therefore, the bypass capacitor must have  
minimal leakage current. The bypass capacitor  
should be no more than 0.1-µF in order to ensure  
that it is fully charged during the quickstart time  
provided by the internal switch shown in the  
Functional Block Diagram.  
The TPS795xx family of low-dropout (LDO)  
regulators has been optimized for use in  
noise-sensitive equipment. The device features  
extremely low dropout voltages, high PSRR, ultralow  
output noise, low quiescent current (265 µA  
typically), and an enable input to reduce supply  
currents to less than 1 µA when the regulator is  
turned off.  
For example, the TPS79530 exhibits only 33 µVRMS  
of output voltage noise using a 0.1-µF ceramic  
A typical application circuit is shown in Figure 23.  
bypass capacitor and  
a 10-µF ceramic output  
VIN  
VOUT  
capacitor. Note that the output starts up slower as  
the bypass capacitance increases because of the RC  
time constant at the bypass pin that is created by the  
internal 250-kΩ resistor and external capacitor.  
IN  
OUT  
TPS795xx  
GND  
1mF  
1mF  
EN  
NR  
0.01mF  
BOARD LAYOUT RECOMMENDATION TO  
IMPROVE PSRR AND NOISE  
PERFORMANCE  
Figure 23. Typical Application Circuit  
To improve ac measurements such as PSRR, output  
noise, and transient response, it is recommended  
that the board be designed with separate ground  
planes for VIN and VOUT, with each ground plane  
connected only at the ground pin of the device. In  
addition, the ground connection for the bypass  
capacitor should connect directly to the ground pin of  
the device.  
EXTERNAL CAPACITOR REQUIREMENTS  
Although not required, it is good analog design  
practice to place a 0.1µF — 2.2µF capacitor near the  
input of the regulator to counteract reactive input  
sources. A higher-value input capacitor may be  
necessary if large, fast-rise-time load transients are  
anticipated and the device is located several inches  
from the power source.  
REGULATOR MOUNTING  
Like most low-dropout regulators, the TPS795xx  
requires an output capacitor connected between  
OUT and GND to stabilize the internal control loop.  
The minimum recommended capacitor is 1 µF. Any 1  
µF or larger ceramic capacitor is suitable.  
The tab of the SOT223-6 package is electrically  
connected to ground. For best thermal performance,  
the tab of the surface-mount version should be  
soldered directly to a circuit-board copper area.  
Increasing the copper area improves heat  
dissipation.  
The internal voltage reference is a key source of  
noise in an LDO regulator. The TPS795xx has an  
NR pin which is connected to the voltage reference  
through a 250-kΩ internal resistor. The 250-kΩ  
internal resistor, in conjunction with an external  
bypass capacitor connected to the NR pin, creates a  
low-pass filter to reduce the voltage reference noise  
and, therefore, the noise at the regulator output. In  
order for the regulator to operate properly, the  
current flow out of the NR pin must be at a minimum,  
Solder pad footprint recommendations for the  
devices are presented in Application Report  
SBFA015, Solder Pad Recommendations for  
Surface-Mount Devices, available from the TI web  
site (www.ti.com).  
8
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
PROGRAMMING THE TPS79501  
ADJUSTABLE LDO REGULATOR  
The approximate value of this capacitor can be  
calculated as Equation 3:  
(3   10*7)   (R1 ) R2)  
The output voltage of the TPS79501 adjustable  
regulator is programmed using an external resistor  
divider as shown in Figure 24. The output voltage is  
calculated using Equation 1:  
C1 +  
(R1   R2)  
(3)  
The suggested value of this capacitor for several  
resistor ratios is shown in the table within Figure 24.  
If this capacitor is not used (such as in a unity-gain  
configuration), then the minimum recommended  
output capacitor is 2.2 µF instead of 1 µF.  
R1  
R2  
ǒ1 ) Ǔ  
VOUT + VREF  
 
(1)  
where:  
REGULATOR PROTECTION  
•
VREF = 1.2246 V typ (the internal reference  
voltage)  
The TPS795xx PMOS-pass transistor has a built-in  
back diode that conducts reverse current when the  
input voltage drops below the output voltage (for  
example, during power down). Current is conducted  
from the output to the input and is not internally  
limited. If extended reverse voltage operation is  
anticipated, external limiting might be appropriate.  
Resistors R1 and R2 should be chosen for  
approximately 40-µA divider current. Lower value  
resistors can be used for improved noise  
performance, but the device wastes more power.  
Higher values should be avoided, as leakage current  
at FB increases the output voltage error.  
The TPS795xx features internal current limiting and  
thermal protection. During normal operation, the  
TPS795xx limits output current to approximately 2.8  
A. When current limiting engages, the output voltage  
scales back linearly until the overcurrent condition  
ends. While current limiting is designed to prevent  
gross device failure, care should be taken not to  
exceed the power dissipation ratings of the package.  
If the temperature of the device exceeds  
approximately 165°C, thermal-protection circuitry  
shuts it down. Once the device has cooled down to  
below approximately 140°C, regulator operation  
resumes.  
The recommended design procedure is to choose  
R2 = 30.1 kΩ to set the divider current at 40 µA,  
C1 = 15 pF for stability, and then calculate R1 using  
Equation 2:  
VOUT  
ǒ Ǔ  
R1 +  
* 1   R2  
VREF  
(2)  
In order to improve the stability of the adjustable  
version, it is suggested that a small compensation  
capacitor be placed between OUT and FB.  
OUTPUT VOLTAGE  
PROGRAMMING GUIDE  
VIN  
VOUT  
IN  
OUT  
FB  
TPS79501  
R1  
R2  
C1  
1mF  
EN  
OUTPUT  
VOLTAGE  
1mF  
R1  
R2  
C1  
GND  
1.8 V  
3.6 V  
14.0 kW  
57.9 kW  
30.1 kW  
30.1 kW  
33 pF  
15 pF  
Figure 24. TPS79501 Adjustable LDO Regulator Programming  
9
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
THERMAL INFORMATION  
The amount of heat that an LDO linear regulator  
generates is directly proportional to the amount of  
power it dissipates during operation. All integrated  
T
T
A
J
R
CIRCUIT BOARD COPPER AREA  
θ
JC  
circuits have  
a
maximum allowable junction  
temperature (TJmax) above which normal operation  
is not assured. A system designer must design the  
operating environment so that the operating junction  
temperature (TJ) does not exceed the maximum  
junction temperature (TJmax). The two main  
environmental variables that a designer can use to  
improve thermal performance are air flow and  
external heatsinks. The purpose of this information is  
to aid the designer in determining the proper  
operating environment for a linear regulator that is  
operating at a specific power level.  
C
B
C
B
A
R
R
θ
CS  
C
θ
SA  
SOT223 Package  
T
A
In general, the maximum expected power (PDmax)  
consumed by a linear regulator is computed as  
shown in Equation 4:  
Figure 25. Thermal Resistances  
Equation 5 summarizes the computation:  
ǒ
Ǔ
PD max + VIN(avg) * VOUT(avg)   IOUT(avg) ) VI(avg)   IQ  
ǒ
θSAǓ  
TJ + TA ) PD max   RθJC ) RθCS ) R  
(4)  
(5)  
where:  
The RΘJC is specific to each regulator as determined  
by its package, lead frame, and die size provided in  
the regulator's data sheet. The RΘSA is a function of  
the type and size of heatsink. For example, black  
body radiator type heatsinks can have RΘCS values  
ranging from 5°C/W for very large heatsinks to  
50°C/W for very small heatsinks. The RΘCS is a  
function of how the package is attached to the  
heatsink. For example, if a thermal compound is  
used to attach a heatsink to a SOT223 package,  
RΘCS of 1°C/W is reasonable.  
•
•
•
•
VIN(avg) is the average input voltage  
VOUT(avg) is the average output voltage  
IOUT(avg) is the average output current  
IQ is the quiescent current  
For most TI LDO regulators, the quiescent current is  
insignificant compared to the average output current;  
therefore, the term VIN(avg) x IQ can be neglected. The  
operating junction temperature is computed by  
adding the ambient temperature (TA) and the  
increase in temperature due to the regulator's power  
dissipation. The temperature rise is computed by  
multiplying the maximum expected power dissipation  
by the sum of the thermal resistances between the  
junction and the case (RΘJC), the case to heatsink  
(RΘCS), and the heatsink to ambient (RΘSA). Thermal  
resistances are measures of how effectively an  
object dissipates heat. Typically, the larger the  
device, the more surface area available for power  
dissipation and the lower the object's thermal  
resistance.  
Even if no external black body radiator type heatsink  
is attached to the package, the board on which the  
regulator is mounted provides some heatsinking  
through the pin solder connections. Some packages,  
like the DDPAK and SOT223 packages, use a  
copper plane underneath the package or the circuit  
board ground plane for additional heatsinking to  
improve their thermal performance. Computer-aided  
thermal modeling can be used to compute very  
accurate approximations of an integrated circuit's  
thermal  
performance  
in  
different  
operating  
environments (for example, different types of circuit  
boards, different types and sizes of heatsinks,  
different air flows, etc.). Using these models, the  
three thermal resistances can be combined into one  
thermal resistance between junction and ambient  
(RΘJA). This RΘJA is valid only for the specific  
operating environment used in the computer model.  
Figure 25 illustrates these thermal resistances for a  
SOT223 package mounted in a JEDEC low-K board.  
10  
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SLVS350G–OCTOBER 2002–REVISED JULY 2006  
Equation 5 simplifies into Equation 6:  
TJ + TA ) PD max   RθJA  
To illustrate, the TPS79525 in a SOT223 package  
was chosen. For this example, the average input  
voltage is 3.3 V, the output voltage is 2.5 V, the  
(6)  
(7)  
Rearranging Equation 6 gives Equation 7:  
average output current is  
1
A, the ambient  
temperature 55°C, no air flow is present, and the  
operating environment is the same as documented  
below. Neglecting the quiescent current, the  
maximum average power is Equation 8:  
TJ * TA  
PD max  
RθJA  
+
Using Equation 6 and the computer model generated  
curves shown in Figure 26, a designer can quickly  
(
)
PD max + 3.3 * 2.5 V   1A + 800mW  
(8)  
compute  
resistance/board area for  
the  
required  
heatsink  
thermal  
Substituting TJmax for TJ into Equation 4 gives  
Equation 9:  
a
given ambient  
temperature, power dissipation, and operating  
environment.  
R
θJA max + (125 * 55)°Cń800mW + 87.5°CńW  
(9)  
From Figure 26, RθJA vs PCB Copper Area, the  
ground plane needs to be 0.55 in2 for the part to  
dissipate 800 mW. The operating environment used  
to construct Figure 26 consisted of a board with 1 oz.  
copper planes. The package is soldered to a 1 oz.  
copper pad on the top of the board. The pad is tied  
through thermal vias to the 1 oz. ground plane.  
180  
No Air Flow  
160  
140  
120  
100  
80  
From the data in Figure 26 and rearranging equation  
6, the maximum power dissipation for a different  
60  
ground plane area and  
temperature can be computed, as shown in  
Figure 27.  
a
specific ambient  
40  
20  
0
0.1  
1
10  
6
2
PCB Copper Area (in )  
T
A
= 25°C  
5
4
3
2
1
0
Figure 26. SOT223 Thermal Resistance vs PCB  
Copper Area  
2
4 in PCB Area  
SOT223 POWER DISSIPATION  
2
0.5 in PCB Area  
The SOT223 package provides an effective means  
of managing power dissipation in surface-mount  
applications. The SOT223 package dimensions are  
provided in the Mechanical Data section at the end  
of the data sheet. The addition of a copper plane  
directly underneath the SOT223 package enhances  
the thermal performance of the package.  
0
25  
50  
75  
100  
125  
150  
T
A
− Ambient Temperature (°C)  
Figure 27. SOT223 Maximum Power Dissipation  
vs Ambient Temperature  
11  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
8-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
TPS79501DCQ  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOT-223  
DCQ  
6
6
6
6
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
TPS79501DCQG4  
TPS79501DCQR  
TPS79501DCQRG4  
TPS79501DRBR  
TPS79501DRBRG4  
TPS79501DRBT  
TPS79501DRBTG4  
TPS79516DCQ  
SOT-223  
SOT-223  
SOT-223  
SON  
DCQ  
DCQ  
DCQ  
DRB  
DRB  
DRB  
DRB  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SON  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SON  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SON  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
TPS79516DCQG4  
TPS79516DCQR  
TPS79516DCQRG4  
TPS79518DCQ  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
TPS79518DCQG4  
TPS79518DCQR  
TPS79518DCQRG4  
TPS79525DCQ  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
TPS79525DCQG4  
TPS79525DCQR  
TPS79525DCQRG4  
TPS79530DCQ  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
TPS79530DCQG4  
TPS79530DCQR  
TPS79530DCQRG4  
TPS79533DCQ  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
8-Oct-2007  
Orderable Device  
TPS79533DCQG4  
TPS79533DCQR  
TPS79533DCQRG4  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOT-223  
DCQ  
6
6
6
78 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SOT-223  
SOT-223  
DCQ  
DCQ  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Apr-2009  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
TPS79501DCQR  
TPS79501DRBR  
TPS79501DRBT  
TPS79516DCQR  
TPS79518DCQR  
TPS79525DCQR  
TPS79530DCQR  
TPS79533DCQR  
SOT-223 DCQ  
6
8
8
6
6
6
6
6
2500  
3000  
250  
330.0  
330.0  
180.0  
330.0  
330.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
6.8  
3.3  
3.3  
6.8  
6.8  
6.8  
6.8  
6.8  
7.3  
3.3  
3.3  
7.3  
7.3  
7.3  
7.3  
7.3  
1.88  
1.1  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q3  
Q2  
Q2  
Q3  
Q3  
Q3  
Q3  
Q3  
SON  
SON  
DRB  
DRB  
1.1  
SOT-223 DCQ  
SOT-223 DCQ  
SOT-223 DCQ  
SOT-223 DCQ  
SOT-223 DCQ  
2500  
2500  
2500  
2500  
2500  
1.88  
1.88  
1.88  
1.88  
1.88  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Apr-2009  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS79501DCQR  
TPS79501DRBR  
TPS79501DRBT  
TPS79516DCQR  
TPS79518DCQR  
TPS79525DCQR  
TPS79530DCQR  
TPS79533DCQR  
SOT-223  
SON  
DCQ  
DRB  
DRB  
DCQ  
DCQ  
DCQ  
DCQ  
DCQ  
6
8
8
6
6
6
6
6
2500  
3000  
250  
358.0  
346.0  
190.5  
358.0  
358.0  
358.0  
358.0  
358.0  
335.0  
346.0  
212.7  
335.0  
335.0  
335.0  
335.0  
335.0  
35.0  
29.0  
31.8  
35.0  
35.0  
35.0  
35.0  
35.0  
SON  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
2500  
2500  
2500  
2500  
2500  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
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