TPS7H2221-SEP [TI]
抗辐射、1.6V 至 5.5V 输入、1.25A 负载开关;
| 型号： | TPS7H2221-SEP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 抗辐射、1.6V 至 5.5V 输入、1.25A 负载开关 开关 |
| 文件： | 总29页 (文件大小：1480K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS7H2221-SEP
ZHCSPJ5A –AUGUST 2022 –REVISED OCTOBER 2022
TPS7H2221-SEP 抗辐射、5.5V、1.25A、115mΩ 负载开关
1 特性
3 说明
• 提供供应商项目图，VID V62/22609
• 电离辐射总剂量(TID) 为30krad(Si)
TPS7H2221-SEP 器件是一款压摆率可控的小型单通
道负载开关。此器件包含一个可在 1.6V 至 5.5V 输入
电压范围内运行的 N 沟道 MOSFET，并且支持 1.25A
的最大持续电流。
– 每个晶圆批次的TID RLAT（辐射批次验收测
试）：20krad (Si)
• 确定了单粒子效应(SEE)
开关导通状态由数字输入控制，此输入可与低压控制信
号直接连接。首次加电时，此器件使用智能下拉电阻来
保持 ON 引脚不悬空，直到系统定序完成。按计划将
该引脚驱动为高电平(VON>VIH) 之后，便会断开智能下
拉电阻，以防止不必要的功率损耗。
– 单粒子闩锁(SEL)、单粒子烧毁(SEB) 和单粒子
栅穿(SEGR) 对于有效线性能量传递(LETEFF
的抗扰度为43MeV–cm2/mg。
– 单粒子瞬变(SET) 和单粒子功能中断(SEFI) 对
于LETEFF 的额定抗扰度为43MeV–cm2/mg。
• 输入电压范围(VIN)：1.6 至5.5V
)
TPS7H2221-SEP 负载开关也具有自保护特性，因此
可保护自己免受输出短路事件的影响。
• 建议持续电流(IMAX)：1.25A
• 导通电阻(RON
)
TPS7H2221-SEP 采用标准 SC-70 封装，工作环境温
度范围为-55°C 至125°C。
– VIN = 5V 时典型值为116mΩ
– VIN = 3.3V 时典型值为115mΩ
– VIN = 1.8V 时典型值为133mΩ
• 输出短路保护(ISC)：3A（典型值）
• 低功耗：
器件型号(1)
封装(2)
等级
20krad(Si)
RLAT，
特征值为
SC-70 (6)
2.10mm × 2.00mm
质量= 6.9mg
TPS7H2221MDCKTSEP
TPS7H2221EVM
30krad(Si)
– 导通状态(IQ)：8.3µA（典型值）
– 关闭状态(ISD)：3nA（典型值）
EVM
评估板
• 可限制浪涌电流的慢速导通时序(tON)：
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
(2) 尺寸和质量为标称值。
– 5V 时的tON：3.61mV/μs 下为1.68ms
– 3.3V 时的tON：2.91mV/μs 下为1.51ms
– 1.8V 时的tON：2.15mV/μs 下为1.32ms
• 可调节输出放电和下降时间：
TPS7H2221-SEP
1.6 to 5.5 V
1.6 to 5.5 V @ 1.25 A
IN
OUT
RQOD
– VIN = 3.3V 时内部QOD 电阻= 9.2Ω（典型值）
• 增强型航天塑料(SEP)
+
H
VIN
ON
GND
QOD
CIN
COUT
ROUT
–
L
– 受控基线
– 金键合线
– NiPdAu 铅涂层
– 一个组装和测试基地
– 一个制造基地
– 军用级（-55°C 到125°C）温度范围
– 延长了产品生命周期
– 延长了产品变更通知(PCN)
– 产品可追溯性
典型应用原理图
– 采用增强型塑封实现低释气
2 应用
• 航天卫星电源管理和配电
• 抗辐射电源树应用
• 为控制器上电和断电启用开关电源轨
• 卫星电力系统(EPS)
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSGP1
TPS7H2221-SEP
ZHCSPJ5A –AUGUST 2022 –REVISED OCTOBER 2022
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Table of Contents
8.3 Feature Description...................................................15
8.4 Device Functional Modes..........................................16
9 Application and Implementation..................................17
9.1 Application Information............................................. 17
9.2 Typical Application ................................................... 17
9.3 Application Curves....................................................19
9.4 Power Supply Recommendations.............................20
9.5 Layout....................................................................... 20
10 Device and Documentation Support..........................21
10.1 Related Documentation.......................................... 21
10.2 接收文档更新通知................................................... 21
10.3 支持资源..................................................................21
10.4 Electrostatic Discharge Caution..............................21
10.5 术语表..................................................................... 21
10.6 Export Control Notice..............................................21
10.7 第三方产品免责声明................................................21
11 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................4
6.6 Switching Characteristics............................................6
6.7 Derating Curves..........................................................6
6.8 Typical Characteristics ...............................................8
7 Parameter Measurement Information..........................13
7.1 Test Circuit and Timing Waveforms Diagrams.......... 13
8 Detailed Description......................................................14
8.1 Overview...................................................................14
8.2 Functional Block Diagram.........................................14
Information.................................................................... 22
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (August 2022) to Revision A (September 2022)
Page
• 将销售状态从“预告信息”更新为“初始发行版”.............................................................................................1
• 添加了VID 数据表、TID、SEE 报告的链接。更新了tON 在不同VIN 和RPD,QOD 条件下的典型值....................1
• Added RPD,QOD typical values for VIN= 1.8 V, 3.3 V and 5 V.............................................................................. 4
• Added tFALL with ROUT=Open, COUT=10 μF, RQOD=100 Ω, ROUT=Open, COUT=100 μF and RQOD=0 Ω....... 4
• Added links to related documentation...............................................................................................................21
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5 Pin Configuration and Functions
OUT
QOD
NC
IN
GND
ON
1
2
3
6
5
4
图5-1. DCK Package
6-Pin SC-70
(Top View)
表5-1. Pin Functions
PIN
I/O(1)
DESCRIPTION
NO.
1
NAME
IN
I
Switch input.
Device ground.
2
GND
ON
—
3
I
Active high switch control input. Do not leave floating.
No connect. This pin is not internally connected. It is recommended to connect this pin
to GND to prevent charge buildup; however, this pin can also be left open or tied to any
voltage between GND and IN.
4
NC
—
Quick Output Discharge pin. This pin can be utilized in one of three ways:
•
•
•
Placing an external resistor between VOUT and QOD
Tying QOD directly to VOUT and using the internal resistor value (RPD
Disabling QOD by leaving pin floating
)
5
6
QOD
OUT
O
O
See the Fall Time (tFALL) and Quick Output Discharge (QOD) section for more
information.
Switch output.
(1) I = Input, O = Output, —= Other
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6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
–0.3
MAX
6
UNIT
V
VIN
Maximum Input Voltage Range (IN to GND)
Maximum Output Voltage Range (OUT to GND)
Maximum ON Pin Voltage Range (ON to GND)
Maximum QOD Pin Voltage Range (QOD to GND)
Maximum Continuous Current
VOUT
VON
VQOD
IMAX
IPLS
TJ
6
V
6
V
6
V
1.5
2.5
150
150
A
Maximum Pulsed Current (ts=2 ms, 2% Duty Cycle)
Junction temperature
A
-55
°C
°C
TSTG
Storage temperature
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged device model (CDM), per per ANSI/ESDA/JEDEC JS-002(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.6
0
TYP
MAX
5.5
UNIT
VIN
Input Voltage Range (IN to GND)
Output Voltage Range (OUT to GND)
ON Voltage Range (ON to GND)
Maximum Continuous Current
Junction temperature
VOUT
VON
IMAX
TJ
5.5
V
0
5.5
0
1.25
125
A
°C
–55
6.4 Thermal Information
TPS7H2221-SEP
DCK (SC-70)
6 PINS
237.7
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ΨJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
173.7
93.9
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
74.4
93.6
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
Over VIN = 1.6 to 5.5 -V, VON ≥VIH , over the temperature range (TA=-55 ℃to 125 ℃), unless otherwise specified. All
voltage levels are reference to GND.
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
Input Supply (VIN)
VOUT = Open,
VOUT = Open,
8.3
8.7
3
15
20
25 ℃
25 ℃
IQ, VIN
VIN Quiescent Current
VIN Shutdown Current
µA
nA
20
V
ON ≤VIL, VOUT = GND
ON ≤VIL, VOUT = GND
ISD, VIN
800
V
ON-Resistance (RON)
90
116
150
89
150
150
200
150
150
250
300
300
350
-55 ℃
25 ℃
VIN = 5 V, IOUT = -200 mA
VIN = 3.3 V, IOUT = -200 mA
VIN = 1.8 V, IOUT = -200 mA
mΩ
mΩ
125 ℃
-55 ℃
25 ℃
RON
ON-State Resistance
115
150
103
133
173
125 ℃
-55 ℃
25 ℃
mΩ
125 ℃
Output Short Protection (ISC)
3
A
V
V
OUT ≤VIN - 1.5 V
OUT ≤VSC
ISC
Short Circuit Current Limit
30
512
900 mA
VSC
TSD
Output Short Detection Threshold
Thermal Shutdown
0.22
0.36 0.57
180
V
25 ℃
Rising
Falling
℃
145
Enable Pin (ON)
ION
ON Pin Leakage
100 nA
V
V
ON ≥VIH
ON ≤VIL
RPD, ON
VIH,ON
VIL,ON
Smart Pull Down Resistance
ON Pin Input High (VIH Rising)
ON Pin Input Low (VIL Falling)
499
kΩ
1
V
0.35
Quick-output Discharge (QOD)
VIN = 1.8-V
VIN = 3.3-V
VIN = 5-V
45.4
8.5
6
RPD, QOD
QOD Pin Internal Discharge Resistance
V
ON ≤VIL
Ω
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6.6 Switching Characteristics
Unless otherwise noted, the typical characteristics in the following table apply to an input voltage of 3.3V, an ambient
temperature of 25°C, RQOD= 0 Ω and a load of COUT= 0.1 µF, ROUT = 100 Ω. See 图7-2
PARAMETER
TEST CONDITIONS
MIN
TYP
1680
1510
1320
1120
915
MAX
UNIT
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 5.0 V
tON
Turn ON Time
µs
tR
Output Rise Time
µs
674
3.61
2.91
2.15
5.22
9.6
SRON
Turn ON Slew Rate VIN = 3.3 V
VIN = 1.8 V
mV/µs
tOFF
Turn OFF Time
VIN = 1.8 V to 5.0V
µs
µs
ROUT = 100Ω, COUT = 0.1uF
0.35
3.12
4.3
ms
ms
ms
COUT = 10uF, RQOD=0 Ω
COUT = 10uF, RQOD=100 Ω
COUT = 100uF; RQOD=0 Ω
tFALL
Output Fall Time (1)
ROUT = Open (2)
(1) Output may not discharge completely if QOD is not connected to VOUT
(2) See the Timing Application section for information on how ROUT and COUT affect Fall Time.
6.7 Derating Curves
FIT = 50
图6-1. Estimated Life Rating Due to Electromigration vs Junction Temperature at 50% Duty Cycle
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60
55
50
45
40
35
30
25
20
15
10
5
IOUT= 1.25-A
IOUT= 0.57-A
0
75
80
85
90
95
100
105
110
115
120
125
Junction Temperature (C)
FIT=50
图6-2. Estimated Life Rating Due to Electromigration vs Junction Temperature at 100% Duty Cycle
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6.8 Typical Characteristics
200
15
13.5
12
10.5
9
-55 C
180
-40 C
25 C
160
85 C
125 C
140
120
100
80
7.5
6
4.5
3
-55 C
-40 C
25 C
85 C
125 C
60
40
1.5
0
20
0
1.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
V
ON ≥VIH
V
ON ≤VIL
图6-4. Quiescent Current vs Input Voltage
图6-3. Shutdown Current vs Input Voltage
V
ON ≤VIL
ILOAD = –200 mA
图6-6. QOD Resistance vs Input Voltage
图6-5. On-Resistance vs Junction Temperature
520
VIN=1.8-V
VIN=3.3-V
VIN=5-V
510
500
490
480
-60 -40 -20
0
20
40
60
80 100 120 140
Temperature (°C)
V
ON ≤VIL
图6-7. VIH/VIL vs Junction Temperature
图6-8. ON Pull Down Resistance vs Junction
Temperature
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2500
3000
2500
2000
1500
1000
500
-55 C
-40 C
25 C
85 C
125 C
2000
1500
1000
500
0
-55 C
-40 C
25 C
85 C
125 C
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
COUT = 0.1 μF
ROUT = 100 Ω
RQOD = 0 Ω
COUT = 0.1 μF
ROUT = 100 Ω
RQOD = 0 Ω
图6-9. Turn ON Time vs Input Voltage
图6-10. Rise Time vs Input Voltage
5.5
5
2000
4.5
4
1800
1600
1400
3.5
3
2.5
2
-55 C
-40 C
1.5
COUT = 0.1 F
1
0.5
0
25 C
85 C
125 C
COUT = 1 F
COUT = 10 F
1200
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
TJ = 25°C
ROUT = 100 Ω
RQOD = 0 Ω
COUT = 0.1 μF
ROUT = 100 Ω RQOD = 0 Ω
图6-12. Turn ON Time vs Input Voltage Across
图6-11. Output Slew Rate vs Input Voltage
Load Capacitance
1400
1200
1000
800
4
3.5
3
2.5
600
2
COUT = 0.1s
COUT = 0.1 F
COUT = 1 s
COUT = 1 F
COUT = 10 s
COUT = 10 F
400
1.5
1.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
TJ = 25°C
ROUT = 100 Ω
RQOD = 0 Ω
TJ = 25°C
ROUT = 100 Ω
RQOD = 0 Ω
图6-13. Rise Time vs Input Voltage Across Load
图6-14. Slew Rate vs Input Voltage Across Load
Capacitance
Capacitance
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1400
1200
1000
800
600
ROUT=100
ROUT= Open
400
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
TJ = 25°C
COUT = 0.1 μF
RQOD = 0 Ω
TJ = 25°C
COUT = 0.1 μF
RQOD = 0 Ω
图6-16. Rise Time vs Input Voltage Across Load
图6-15. Turn ON Time vs Input Voltage Across
Resistance
Load Resistance
10
8
6
4
-55 C
-40 C
2
25 C
85 C
125 C
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
TJ = 25°C
COUT = 0.1 μF
RQOD = 0 Ω
COUT = 0.1 μF
ROUT = 100 Ω
RQOD = 0 Ω
图6-17. Output Slew Rate vs Input Voltage Across
图6-18. Turn OFF Time vs Input Voltage
Load Resistance
13.5
-55 C
13
12.5
12
-40 C
25 C
85 C
125 C
11.5
11
10.5
10
9.5
9
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
COUT = 0.1 μF
ROUT = 100 Ω
RQOD = 0 Ω
图6-19. Fall Time vs Input Voltage
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CIN = 1 μF
COUT = 0.1 μF
ROUT = 100 Ω
RQOD = 0 Ω
CIN = 1 μF
ROUT = 100 Ω
RQOD = 0 Ω
COUT = 0.1 μF
图6-20. Rise Time with VIN = 1.8 V
图6-21. Rise Time with VIN = 3.3 V
CIN = 1 μF
ROUT = 100 Ω
RQOD = 0 Ω
CIN = 1 μF
ROUT = 100 Ω
RQOD = 2k Ω
COUT = Open
COUT = 0.1 μF
图6-23. Turn Off with a Small Load Capacitance
图6-22. Rise Time with VIN = 5 V
CIN = 1 μF
ROUT = 100 Ω
RQOD = 2k Ω
CIN = 58 μF
ROUT = 4m Ω
RQOD = 0 Ω
VIN = 3.3 V
COUT = 10 μF
COUT = 10 μF
图6-24. Turn Off with a Large Load Capacitance
图6-25. Turn On Into an Output Short
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CIN = 58 μF
ROUT = 300m Ω
RQOD = 0 Ω
CIN = 58 μF
ROUT = 300m Ω
RQOD = 0 Ω
VIN = 3.3 V
VON=VIN
VIN = 3.3 V
VON=VIN
COUT = 10 μF
COUT = 10 μF
图6-26. Hot Short Event when ON
图6-27. Hot Short Event when ON and Recovery
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7 Parameter Measurement Information
7.1 Test Circuit and Timing Waveforms Diagrams
TPS7H2221-SEP
IN
OUT
RQOD
+
–
H
VIN
ON
GND
CIN
COUT
ROUT
QOD
L
A. Rise and fall times of the control signal are 100 ns.
B. Turn-off times and fall times are dependent on the time constant at the load. For the TPS7H2221-SEP, the internal pull-down resistance
QOD is enabled when the switch is disabled. When QOD is connected to OUT using a resistor (RQOD), the time constant is (RQOD
+
RPD,QOD || ROUT) × COUT
.
图7-1. Test Circuit
VIL
VIH
VON
ttON
t
ttOFF
t
ttFALLt
ttRISE
t
90%
ttDELAY
t
90%
VOUT
10%
10%
SRON
图7-2. Timing Waveforms
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8 Detailed Description
8.1 Overview
The TPS7H2221-SEP device is a 5.5-V, 1.25-A load switch in a 6-pin SOT-23 package. To reduce voltage drop
for low voltage and high current rails, the device implements a low resistance N-channel MOSFET that reduces
the drop out voltage across the device.
The TPS7H2221-SEP device has a slow slew rate, which helps reduce or eliminate power supply droop because
of large inrush currents during power up. Furthermore, the device features a Quick-Output-Discharge (QOD) pin,
which allows the configuration of the discharge rate of VOUT once the switch is disabled. During shutdown, the
device has very low leakage currents, thereby reducing unnecessary leakages for downstream devices during
standby. Integrated control logic, driver, charge pump, and output discharge FET eliminates the need for any
external components, which reduces solution size and bill of materials (BOM) count.
The TPS7H2221-SEP load switch is also self-protected, meaning that it will protect from short circuit events on
the output of the device. It also has thermal shutdown to prevent thermal runaway.
8.2 Functional Block Diagram
Short
Circuit
Protection
IN
OUT
Charge
Pump
Control Logic
Driver
ON
Smart
Pull
Down
QOD
GND
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8.3 Feature Description
表8-1. Smart-ON Pull Down
VON
PULL DOWN
Connected
≤VIL,ON
≥VIH,ON
Disconnected
8.3.1 On and Off Control
The ON pin controls the state of the switch. The ON pin is compatible with standard CMOS logic threshold so it
can be used in a wide variety of applications. When power is first applied to VIN a Smart Pull Down is used to
keep the ON pin from floating until the system sequencing is complete. Once the ON pin is deliberately driven
high (≥VIH,ON), the Smart Pull Down is disconnected to prevent unnecessary power loss. See 表 8-1 to
determine the state of the ON Pin Smart Pull Down state as function of ON pin voltage.
8.3.2 Output Short Circuit Protection (ISC
)
The device will limit current to the output in case of output shorts. When a short occurs, the large VIN to VOUT
voltage drop causes the switch to limit the output current (ISC). When the output is below the hard short threshold
(VSC), a lower limit is used to minimize the power dissipation while the fault is present. The device will continue
to limit the current until it reaches thermal shutdown temperature. At this time, the device will turn off until its
temperature has lowered by the thermal hysteresis (35°C typical) before turning on again.
ISC (Higher-Limit)
ISC (Lower-Limit)
V
OUT (V)
VIN
VSC
1.5
ROUT Decremen ng
图8-1. Output Short Circuit Current Limit
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8.3.3 Fall Time (tFALL) and Quick Output Discharge (QOD)
The TPS7H2221-SEP device includes a QOD pin that can be configured in one of three ways:
• QOD pin shorted to VOUT pin. Using this method, after the switch becomes disabled the discharge rate is
controlled with the value of the internal resistance QOD (RPD,QOD).
• QOD pin connected to VOUT pin using an external resistor RQOD. After the switch becomes disabled, the
discharge rate is controlled by the value of the total discharge resistance. To adjust the total discharge
resistance, 方程式1 can be used:
RDIS = RPD,QOD + RQOD
(1)
where:
– RDIS is the total output discharge resistance (Ω)
– RPD,QOD (6 Ωtyp.) is the internal pulldown resistance (Ω)
– RQOD is the external resistance placed between the VOUT and QOD pins (Ω)
• QOD pin is unused and left floating. Using this method, there will be no quick output discharge functionality
and the output will remain floating after the switch is disabled.
The fall times of the device depend on many factors including the total discharge resistance (RDIS) and the
output capacitance (COUT). To calculate the approximate fall time of VOUT use 方程式2.
tFALL = 2.2 × (RDIS || ROUT) × COUT
(2)
where:
• tFALL is the output fall time from 90% to 10% (µs)
• RDIS is the total QOD + RQOD resistance (Ω)
• ROUT is the output load resistance (Ω)
• COUT is the output load capacitance (µF)
8.3.3.1 QOD When System Power is Removed
The adjustable QOD can be used to control the power down sequencing of a system even when the system
power supply is removed. When the power is removed, the input capacitor discharges at VIN. Past a certain VIN
level, the strength of the RPD will be reduced. If there is still remaining charge on the output capacitor, this will
result in longer fall times. For further information regarding this condition, see the Setting Fall Time for Shutdown
Power Sequencing section.
8.4 Device Functional Modes
表 8-2 describes the connection of the VOUT pin depending on the logical state of the ON pin as well as the
various QOD pin configurations.
表8-2. VOUT Connection
ON
Low
Low
Low
High
QOD CONFIGURATION
QOD pin connected to VOUT with RQOD
QOD pin tied to VOUT directly
QOD pin left open
VOUT
Pull-down with (RPD, QOD + RQOD
)
Pull-down with (RPD, QOD
)
Floating
VIN
N/A
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9 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
This section highlights some of the design considerations when implementing this device in various applications.
9.2 Typical Application
This typical application demonstrates how the TPS7H2221-SEP devices can be used to power downstream
modules.
TPS7H2221-SEP
IN
OUT
RQOD
+
–
H
VIN
ON
GND
CIN
COUT
ROUT
QOD
L
图9-1. Typical Application Schematic
9.2.1 Design Requirements
For this design example, use the values listed in Design Parameters as the design parameters:
表9-1. Design Parameters
DESIGN PARAMETER
Input voltage (VIN
Load current resistance (ROUT
EXAMPLE VALUE
)
3.3 V
1 kΩ
)
Load capacitance (COUT
Minimum fall time (tF)
)
47 µF
40 ms
150 mA
Maximum inrush current (IRUSH
)
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9.2.2 Detailed Design Procedure
9.2.2.1 Limiting Inrush Current
Use 方程式3 to find the maximum slew rate value to limit inrush current for a given capacitance:
(Slew Rate) = IRUSH ÷ COUT
where
(3)
• IINRUSH = maximum acceptable inrush current (mA)
• COUT = capacitance on VOUT (μF)
• Slew Rate = Output Slew Rate during turn on (mV/μs)
Based on 方程式 3, the required slew rate to limit the inrush current to 150 mA is 3.2 mV/μs. The TPS7H2221-
SEP has a slew rate of 2.3 mV/μs, so the inrush current will be below 150 mA.
9.2.2.2 Setting Fall Time for Shutdown Power Sequencing
Microcontrollers and processors often have a specific shutdown sequence in which power must be removed.
Using the adjustable Quick Output Discharge function of the TPS7H2221-SEP device, adding a load switch to
each power rail can be used to manage the power down sequencing. To determine the QOD values for each
load switch, first confirm the power down order of the device you wish to power sequence. Be sure to check if
there are voltage or timing margins that must be maintained during power down.
Once the required fall time is determined, the maximum external discharge resistance (RDIS) value can be found
using 方程式2:
tFALL(min) = 2.2 × (RDIS || ROUT) × COUT
(4)
(5)
RDIS(min) = 630 Ω
方程式1 can then be used to calculate the RQOD resistance needed to achieve a particular discharge value:
RDIS = QOD + RQOD
(6)
RQOD = 624 Ω
(7)
To ensure a fall time greater than, choose an RQOD value greater than 624 Ω.
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9.2.2.3 Application Curves
CIN = 58.1 µF
COUT = 47.1 µF
ROUT = 1 kΩ
图9-2. Fall Time (RQOD = 1 kΩ)
9.3 Application Curves
CIN = 58.1 µF
COUT = 47.1 µF
ROUT = 1 kΩ
图9-3. Fall Time (RQOD = 1 kΩ)
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9.4 Power Supply Recommendations
The device is designed to operate with a VIN range of 1.6 V to 5.5 V. The VIN power supply must be well
regulated. The power supply must be able to withstand all transient load current steps. In most situations, using
an minimum input capacitance (CIN) of 1 μF is sufficient to prevent the supply voltage from dipping when the
switch is turned on. In cases where the power supply is slow to respond to a large transient current or large load
current step, additional bulk capacitance may be required on the input.
9.5 Layout
9.5.1 Layout Guidelines
For best performance, all traces must be as short as possible. To be most effective, the input and output
capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for IN, OUT, and GND helps minimize the parasitic electrical effects.
9.5.2 Layout Example
GND Plane
IN
1
2
3
6
5
4
OUT
CIN
RROD
COUT
QOD
GND
GND Plane
From controller
ON
NC
GND Plane
图9-4. Recommended Board Layout
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10 Device and Documentation Support
10.1 Related Documentation
For related documentation see the following:
• Texas Intruments, TPS7H2221-SEP Total Ionizing Dose (TID)
• Texas Intruments,TPS7H2221-SEP Single-Event Effects (SEE) Test Report
• Texas Intruments, TPS7H2221-SEP Neutron Displacement Damage (NDD) Characterization
• Texas Intruments, TPS7H2221-SEP Evaluation Module (EVM)
• Texas Intruments, TPS7H2221-SEP PSpice Transient Model
• Texas Intruments, Basics of Load Switches
10.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
10.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
10.6 Export Control Notice
Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as
defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled
product restricted by other applicable national regulations, received from disclosing party under nondisclosure
obligations (if any), or any direct product of such technology, to any destination to which such export or re-export
is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S.
Department of Commerce and other competent Government authorities to the extent required by those laws.
10.7 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
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11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS7H2221MDCKTSEP
V62/22609-01XE
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
6
6
250
250
RoHS & Green
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
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TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS7H2221MDCKTSEP
SC70
DCK
6
250
180.0
8.4
2.47
2.3
1.25
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
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TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SC70 DCK
SPQ
Length (mm) Width (mm) Height (mm)
202.0 201.0 28.0
TPS7H2221MDCKTSEP
6
250
Pack Materials-Page 2
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