TSM102ID [TI]
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型号: | TSM102ID |
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描述: | DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR, AND VOLTAGE REFERENCE |
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TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
FEATURES
APPLICATIONS
•
•
•
•
Switch-Mode Power Supplies
Battery Chargers
Voltage and Current Sensing
Power-Good, Overvoltage, Undervoltage,
Overcurrent Detection
•
OPERATIONAL AMPLIFIERS
– Low Supply Current…200 µA/A
– Medium Speed…2.1 MHz
– Low-Level Output Voltage Close to
VCC–…0.1 V Typ (RL = 10 kΩ)
•
•
Window Comparators
Alarms, Detectors, and Sensors
– Input Common-Mode Voltage Range
Includes Ground
•
•
COMPARATORS
D (SOIC) OR PW (TSSOP) PACKAGE
(TOP VIEW)
– Low Supply Current…200 µA/A
(VCC = 5 V)
1OUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
4OUT
4IN−
4IN+
COMP
COMP
– Input Common-Mode Voltage Range
Includes Ground
1IN−
–
–
+
+
1IN+
– Low Output Saturation Voltage…
Typically 250 mV (Isink = 4 mA)
V
CC+
V
CC–
2IN+
2IN−
3IN+
VOLTAGE REFERENCE
+
–
–
+
– Adjustable Output Voltage…VREF to 36 V
– Sink Current Capability…1 mA to 100 mA
3IN−
AMP
AMP
2OUT
3OUT
– 0.4% (A Grade) and 1% (Standard Grade)
Precision
V
REF
CATHODE
– Latch-Up Immunity
DESCRIPTION/ORDERING INFORMATION
The TSM102 and TMS102A combine the building blocks of a dual operational amplifier, a dual comparator, and
a precision voltage reference, all of which often are used to implement a wide variety of power-management
functions, including overcurrent detection, undervoltage/overvoltage detection, power-good detection, window
comparators, error amplifiers, etc. Additional applications include alarm and detector/sensor applications.
The TSM102A offers a tight VREF tolerance of 0.4% at 25°C. The TSM102 and TSM102A are characterized for
operation from –40°C to 85°C.
ORDERING INFORMATION
MAX VREF
TOLERANCE (25°C)
TA
PACKAGE(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Tube of 75
TSM102AID
TSM102AI
SOIC – D
Reel of 2500
Tube of 90
TSM102AIDR
A grade:
0.4% precision
TSM102AIPW
SN102AI
TSSOP – PW
SOIC – D
Reel of 2000
Tube of 75
TSM102AIPWR
–40°C to 85°C
TSM102ID
TSM102I
Reel of 2500
Tube of 90
TSM102IDR
Standard grade:
1% precision
TSM102IPW
SN102I
TSSOP – PW
Reel of 2000
TSM102IPWR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
Absolute Maximum Ratings(1)
over free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VID
VI
Supply voltage
36
36
V
V
Input differential voltage
Input voltage range
–0.3
36
V
IKA
Voltage reference cathode current
100
73
mA
D package
θJA
Package thermal impedance(2)(3)
°C/W
PW package
108
150
150
TJ
Maximum junction temperature
Storage temperature range
°C
°C
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Selecting the maximum of 150°C can affect reliability.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
MIN
MAX UNIT
VCC+ – VCC–
Supply voltage
3
30
V
V
VID
VKA
IK
Comparator differential input voltage
Cathode-to-anode voltage
Reference cathode current
Operating free-air temperature
VCC+ – VCC–
VREF
1
36
100
85
V
mA
°C
TA
–40
Total Device Electrical Characteristics
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
0.8
1.5
mA
2
Total supply current,
ICC
VCC+ = 5 V, VCC– = 0 V, No load
excluding reference cathode current
Full range
2
Submit Documentation Feedback
TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
Operational Amplifier Electrical Characteristics
VCC+ = 5 V, VCC– = GND, R1 connected to VCC/2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
4.5
UNIT
mV
25°C
1
VIO
αVIO
IIO
Input offset voltage
Input offset voltage drift
Input offset current
Full range
25°C
6.5
10
5
µV/°C
nA
25°C
20
40
Full range
25°C
20
100
100
100
200
IIB
Input bias current
nA
Full range
25°C
50
25
VCC+ = 30 V, R1 = 10 kΩ,
VO = 5 V to 25 V
AVD
Large-signal voltage gain
Supply-voltage rejection ratio
Input common-mode voltage
V/mV
dB
Full range
25°C
kSVR
VICM
VCC+ = 5 V to 30 V
80
25°C
VCC–
VCC–
VCC+ – 1.8
VCC+ – 2.2
V
Full range
VCC+ = 30 V,
VICM = 0 V to VCC+ – 1.8 V
CMRR
ISC
Common-mode rejection ratio
Short-circuit current
25°C
25°C
70
90
dB
Source
Sink
3
3
6
6
VID = ±1 V, VO = 2.5 V
VCC+ = 30 V, RL = 10 kΩ
RL = 10 kΩ
mA
25°C
Full range
25°C
27
26
28
VOH
High-level output voltage
V
130
170
200
VOL
SR
Low-level output voltage
Slew rate
mV
Full range
VCC = ±15 V, CL = 100 pF,
VI = ±10 V, RL = 10 kΩ
25°C
1.3
1.4
2
V/µs
GBW
Φm
Gain bandwidth product
Phase margin
RL = 10 kΩ, CL = 100 pF, f = 100 kHz
RL = 10 kΩ, CL = 100 pF
25°C
25°C
25°C
25°C
2.1
45
MHz
°
%
THD
Vn
Total harmonic distortion
Equivalent input noise voltage
0.01
19
f = 1 kHz
nV/√Hz
3
Submit Documentation Feedback
TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
Comparator Electrical Characteristics
VCC+ = 5 V, VCC– = GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
25°C
5
9
VIO
VID
IIO
Input offset voltage
mV
V
Full range
Comparator differential
input voltage
Full range
VCC+
25°C
Full range
25°C
50
150
250
400
Input offset current
nA
IIB
Input bias current
nA
Full range
25°C
0.1
nA
IOH
High-level output current
Low-level output voltage
VID = 1 V, VCC = VO = 30 V
VID = –1 V, Isink = 4 mA
Full range
25°C
1
400
700
µA
250
VOL
AVD
Isink
mV
Full range
VCC+ = 15 V, R1 = 15 kΩ,
VO = 1 V to 11 V
Large-signal voltage gain
Output sink current
25°C
200
16
V/mV
mA
VO = 1.5 V, VID = –1 V
25°C
25°C
6
0
0
VCC+ – 1.5
VCC+ – 2
Input common-mode
voltage range
VICM
V
Full range
25°C
tRESP
Response time(1)
R1 = 5.1 kΩ to VCC+, VREF = 1.4 V
1.3
µs
R1 = 5.1 kΩ to VCC+, VREF = 1.4 V,
VI = TTL
tRESP,large
Large-signal response time
25°C
300
ns
(1) The response-time specification is for 100-mV input step with 5-mV overdrive. For larger overdrive signals, 300 ns can be obtained.
4
Submit Documentation Feedback
TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
Voltage-Reference Electrical Characteristics
PARAMETER
TEST CONDITIONS
TA
MIN
2.475
2.49
TYP
2.5
MAX
2.525
2.51
UNIT
TSM102
25°C
25°C
VKA = VREF, IK = 10 mA,
See Figure 1
VREF
Reference voltage(1)
V
TSM102A
2.5
Reference input voltage deviation
over temperature range(1)
VKA = VREF, IK = 10 mA,
See Figure 1
∆VREF
Full range
Full range
25°C
7
30
mV
DVREF
DT
Average temperature coefficient of
reference input voltage(2)
VKA = VREF, IK = 10 mA
±22
±100 ppm/°C
DVREF
DVKA
Ratio of change in reference voltage VKA = 3 V to 36 V, IK = 10 mA,
to change in cathode voltage
–1.1
1.5
–2
mV/V
µA
See Figure 2
25°C
2.5
3
IK = 10 mA, R1 = 10 kΩ, R2 = ∞,
See Figure 2
IREF
Reference input current
Full range
Reference input current deviation
over temperature range
IK = 10 mA, R1 = 10 kΩ, R2 = ∞,
See Figure 2
∆IREF
Full range
0.5
1
µA
Minimum cathode current
for regulation
Imin
VKA = VREF, See Figure 1
See Figure 3
25°C
25°C
0.5
1
mA
nA
IK,OFF
Off-state cathode current
180
500
(1) ∆VREF is defined as the difference between the maximum and minimum values obtained over the full temperature range.
∆VREF = VREF(MAX) – VREF(MIN)
(2) The temperature coefficient is defined as the slopes (positive and negative) of the voltage vs temperature limits within which the
reference voltage is specified.
VREF(MAX)
MAX
2.5 V
MIN
VREF(MIN)
Temperature
T1
T2
Temperature
25°C
5
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TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
PARAMETER MEASUREMENT INFORMATION
Input
VKA
IK
VREF
Figure 1. Test Circuit for VKA = VREF
Input
VKA
VKA = VREF (1 + (R1/R2)) + (IREF × R1)
IK
R1
IREF
R2
VREF
Figure 2. Test Circuit for VKA > VREF
Input
VKA
IOFF
Figure 3. Test Circuit for IOFF
6
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TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
TYPICAL CHARACTERISTICS
AMPLIFIER TOTAL HARMONIC DISTORTION
AMPLIFIER NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
400
350
300
250
200
150
100
50
1
0.1
0.01
0.001
0.0001
0
100
1k
10k
100k
10
10
1k
10k
100k
f – Frequency – Hz
f – Frequency – Hz
Figure 4.
Figure 5.
GAIN AND PHASE
vs
FREQUENCY
VREF STABILITY
vs
CAPACITANCE
60
50
40
30
20
10
0
180
140
100
60
35
30
25
20
15
10
5
Phase
20
Gain
-20
-60
-100
-140
-180
-10
-20
-30
1k
10k
100k
1M
10M
f – Frequency – Hz
0
1
10
100
1000
10000
Capacitance – pF
Figure 6.
Figure 7.
7
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TSM102, TSM102A
DUAL OPERATIONAL AMPLIFIER, DUAL COMPARATOR,
AND VOLTAGE REFERENCE
www.ti.com
SLVS602–MARCH 2006
TYPICAL CHARACTERISTICS (continued)
VREF
vs
TEMPERATURE
2.515
IO = 100 mA
2.510
2.505
2.500
IO = 10 mA
2.495
2.490
IO = 1 mA
2.485
2.480
–40 –25 –10
5
20
35 50
65 80
95 110 125
Temperature – °C
Figure 8.
8
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device
TSM102AID
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSM102AIDR
TSM102AIPW
TSM102AIPWR
TSM102ID
SOIC
TSSOP
TSSOP
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
PW
D
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSM102IDR
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSM102IPW
TSM102IPWR
TSSOP
TSSOP
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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enhancements, improvements, and other changes to its products and services at any time and to
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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