TSS521D [TI]
单芯片仪表总线收发器 | D | 16 | -25 to 85;
| 型号： | TSS521D |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 单芯片仪表总线收发器 | D | 16 | -25 to 85 仪表 总线收发器 |
| 文件： | 总17页 (文件大小：877K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSS521
www.ti.com
SLAS980 –SEPTEMBER 2013
Meter-Bus Transceiver
1
FEATURES
APPLICATIONS
•
Meter-Bus Transceiver (for Slave) Meets
Standard EN1434-3
•
•
•
•
•
E-metering
Advanced Metering Infrastructure (AMI)
Water Meters
•
Receiver Logic With Dynamic Level
Recognition
Gas Meters
•
•
•
•
•
•
Constant-Current Sink Adjustable By Resistor
Polarity Independent
Heat Meters
Power-Fail Function
DESCRIPTION
The TSS521 device is a single-chip transceiver
developed for Meter-Bus standard (EN1434-3)
applications.
Module Supply Voltage Switch
3.3-V Constant Voltage Source
Up to 9600 Baud in Half Duplex for UART
Protocol
The TSS521 interface circuit adjusts the different
potentials between a slave system and the Meter-Bus
master. The connection to the bus is polarity
independent and supports full galvanic slave isolation
with optocouplers.
•
Slave Power Support
–
–
Supply From Meter-Bus by Output VDD
Supply From Meter-Bus by Output VDD or
From Backup Battery
The circuit is supplied by the master through the bus.
Therefore, this circuit offers no additional load for the
slave battery. A power-fail function is integrated.
–
Supply From Battery – Meter-Bus Active for
Data Transmission Only
The receiver has dynamic level recognition, and the
transmitter has a programmable current sink.
A 3.3-V voltage regulator with power reserve for a
delayed switch off at bus fault is integrated.
Functional Schematic
VB
PF
CS1
IBUS
ICI2
TC2
RIDD
BAT
ICS3
VF
ISTC
BUSL1
BUSL2
BR
ISTC_use
ICI1
STC
CS2
TX
TXI
SC
TC3
VS
TC1
IMS
IVDD
VDD
REF2
1.3 V
REF1
7 V
CS3
VVDD
3.3 V
ECHO
RX
TC4
RXI
RIS
GND
RVS
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
TSS521
SLAS980 –SEPTEMBER 2013
www.ti.com
D PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BUSL2
VB
BUSL1
GND
RIS
STC
RIDD
PF
RXI
RX
SC
VDD
VS
TXI
TX
BAT
Table 1. Terminal Functions
TERMINAL
DESCRIPTION
NAME
BUSL2
VB
NO.
1
Meter-Bus
2
Differential bus voltage after rectifier
Support capacitor
STC
RIDD
PF
3
4
Current adjustment input
Power fail output
5
SC
6
Sampling capacitor
Data output inverted
Data output
TXI
7
TX
8
BAT
VS
9
Logic level adjust
10
11
12
13
14
15
16
Switch for bus or battery supply output
Voltage regulator output
Data input
VDD
RX
RXI
Data input inverted
Adjust input for modulation current
Ground
RIS
GND
BUSL1
Meter-Bus
2
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TSS521
www.ti.com
SLAS980 –SEPTEMBER 2013
Functional Description
Data Transmission, Master to Slave
The mark level on the bus lines VBUS = MARK is defined by the difference of BUSL1 and BUSL2 at the slave. It
depends on the distance from Master to Slave, which affects the voltage drop on the wire. To make the receiver
independent, a dynamic reference level on the SC pin is used for the voltage comparator TC3 (see Figure 1).
VBUS
IBUS
IBUS
VB
VMARK = 20.8 V to 42 V
VSPACE = VMARK – 10 V
IBUS = Constant
to IC
VT
TX
BUSL1
BUSL2
TC3
ISCcharge
ISCdischarge
BR
TXI
SC
VTX
CSC
GND
VTXI
CBUSL1-BUSL2 = 30 pF typ
VB = 25 V, fmeas = 1 MHz
Figure 1. Data Transmission, Master to Slave
A capacitor (CSC) at the SC pin is charged by a current (ISCcharge) and is discharged with a current (ISCdischarge
)
where:
ISCcharge
ISCdisharge
=
40 (typ)
(1)
This ratio is necessary to run any kind of UART protocol independent of the data contents (for example, if an 11-
bit UART protocol is transmitted with all data bits at 0 and only the stop bit at 1). There must be sufficient time to
recharge the capacitor CSC. The input level detector TC3 detects voltage modulations from the master
(VBUS = SPACE or MARK conditions) and switches the inverted output TXI and the noninverted output TX.
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TSS521
SLAS980 –SEPTEMBER 2013
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Data Transmission, Slave to Master
The device uses current modulation to transmit information from the slave to the master while the bus voltage
remains constant. The current source CS3 modulates the bus current and the master detects the modulation.
The constant current source CS3 is controlled by the inverted input RXI or the noninverted input RX. The current
source CS3 can be programmed by an external resistor RRIS. The modulation supply current IMS flows in addition
to the current source CS3 during the modulation time.
VRX
IBUS
VB
to IC
ICS3
IMS
VRXI
CS3
BUSL1
BUSL2
RX
BR
TC4
RXI
RIS
VBUS
IBUS
VBUS = Constant
RRIS
GND
ISPACE
IMARK
IMC
IMC = IMS + ICS3
Figure 2. Data Transmission, Slave to Master
Because the TSS521 is configured for half-duplex only, the current modulation from RX or RXI is repeated
concurrently as ECHO on the outputs TX and TXI. If the slave, as well as the master, is trying to send
information on the lines, the added signals appear on the outputs TX and TXI, which indicates the data collision
to the slave (see ).
The bus topology requires a constant current consumption by each connected slave.
To calculate the value of the programming resistor RRIS, use the formula shown in Figure 3.
IMC
(mA)
VRIS
VRIS
RRIS
=
=
ICS3 IMC – IMS
20
15
10
5
VRIS = Voltage on pin RIS
RRIS = Programming resistor
ICS3 = Programmable current
IMC = Modulation current
Typical
IMS = Modulation supply current (220 µA typ)
RRIS (kW)
0
0.1 0.2
0.5
1
Figure 3. Calculate Programming Resistor RRIS
4
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TSS521
www.ti.com
SLAS980 –SEPTEMBER 2013
Slave Supply, 3.3 V
The TSS521 has an internal 3.3-V voltage regulator. The output power of this voltage regulator is supplied by the
storage capacitor CSTC at the STC pin. The storage capacitor CSTC at the STC pin is charged with constant
current ISTC_use from the current source CS1. The maximum capacitor voltage is limited to REF1. The charge
current ISTC has to be defined by an external resistor at pin RIDD.
The adjustment resistor RRIDD can be calculated using Equation 2.
VRIDD
ISTC
VRIDD
ISTC_use + IIC1
RRID = 25
= 25
(2)
Where,
ISTC = current from current source CS1
ISTC_use = charge current for support capacitor
ICI = internal current
VRIDD = voltage on pin RIDD
RRIDD = value of adjustment resistor
The voltage level of the storage capacitor CSTC is monitored with comparator TC1. Once the voltage VSTC
reaches VVDD_on, the switch SVDD connects the stabilized voltage VVDD to pin VDD. VDD is turned off if the
voltage VSTC drops below the VVDD_off level.
Voltage variations on the capacitor CSTC create bus current changes (see Figure 4).
IBUS
(mA)
916
914
912
910
VSTC (V)
1
2
3
4
5
6
7
8
Figure 4. Single Mode Bus Load
At a bus fault the shut down time of VDD (toff) in which data storage can be performed depends on the system
current IVDD and the value of capacitor CSTC. See Figure 5, which shows a correlation between the shutdown of
the bus voltage VBUS and VDD_off and toff for dimensioning the capacitor.
The output VS is meant for slave systems that are driven by the bus energy, as well as from a battery should the
bus line voltage fail. The switching of VS is synchronized with VDD and is controlled by the comparator TC1. An
external transistor at the output VS allows switching from the Meter-Bus remote supply to battery.
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TSS521
SLAS980 –SEPTEMBER 2013
www.ti.com
Power On and Off
VBUS
VVB =VSTC + 0.6 V
typical threshold voltage
for power fail PF
ton
VSTC
VDDon
VDDoff
VVS
VVDD
toff
VPF
V
– V
VDDoff
STC
t
= C
STC
off
I
+ I
CI1
VDD
Figure 5. Power On/Off Timing
Power Fail Function
Because of the rectifier bridge BR at the input, BUSL1, and BUSL2, the TSS521 is polarity independent. The pin
VB to ground (GND) delivers the bus voltage VVB less the voltage drop over the rectifier BR. The voltage
comparator TC2 monitors the bus voltage. If the voltage VVB > VSTC + 0.6 V, then the output PF = 1. The output
level PF = 0 (power fail) provides a warning of a critical voltage drop to the microcontroller to save the data
immediately.
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TSS521
www.ti.com
SLAS980 –SEPTEMBER 2013
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VMB
Voltage, BUSL1 to BUSL2
±50 V
RX and RXI
BAT
–0.3 V to 5.5 V
–0.3 V to 5.5 V
–25°C to 150°C
–25°C to 85°C
–65°C to 150°C
8 mW/°C
VI
Input voltage range
TJ
Operating junction temperature range
Operating free-air temperature range
Storage temperature range
TA
TSTG
Power derating factor, junction to ambient
Recommended Operating Conditions
See note (1). Typical values are specified at VCC = 3.3 V and TA = 25°C (unless otherwise noted)
MIN
10.8
12
MAX UNIT
Receiver
42
V
VMB
Bus voltage, |BUSL2 – BUSL1|
Input voltage
Transmitter
VB (receive mode)
BAT(2)
42
9.3
2.5
13
VI
V
3.8
RRIDD RIDD resistor
80
kΩ
Ω
RRIS
TA
RIS resistor
100
–25
Operating free-air temperature
85
°C
(1) All voltage values are measured with respect to the GND terminal unless otherwise noted.
(2) VBAT(max) ≤ VSTC – 1 V
Electrical Characteristics
See note (1). Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
ΔVBR
Voltage drop at rectifier BR IBUS = 3 mA
1.5
V
Voltage drop at current
RRIDD = 13 kΩ
ΔVCS1
1.8
V
source CS1
RRIDD = 13 kΩ
RRIDD = 30 kΩ
3
1.5
2
VSTC = 6.5 V,
IBUS
BUS current
IMC = 0 mA
mA
ΔIBUS
BUS current accuracy
Supply current
ΔVBUS = 10 V, IMC = 0 mA, RRIDD = 13 kΩ to 30 kΩ
VSTC = 6.5 V, IMC = 0 mA, VBAT = 3.8 V, RRIDD = 13 kΩ(2)
VSTC = 6.5 V, IMC = 0 mA, VBAT = 3.8 V, RRIDD = 13 kΩ,
%
ICC
650
µA
ICI1
CI1 current
350
µA
(2)
VBUS = 6.5 V, RX/RXI = off
VVDD
RVDD
VDD voltage
–IVDD = 1 mA, VSTC = 6.5 V
–IVDD = 2 to 8 mA, VSTC = 4.5 V
VDD = on, VS = on
3.1
3.4
5
V
VDD resistance
Ω
5.6
6.4
4.3
7.5
1.1
2.4
1.33
VSTC
1
VSTC
STC voltage
VDD = off, VS = off
3.8
V
IVDD < ISTC_use
6.5
RRIDD = 30 kΩ
VSTC = 5 V
0.65
ISTC_use
STC current
mA
RRIDD = 13 kΩ
1.85
VRIDD
VVS
RIDD voltage
VS voltage
RRIDD = 30 kΩ
1.23
V
V
VDD = on, IVS = –5 µA
VDD = off
VSTC – 0.4
RVS
VS resistance
0.3
MΩ
VVB = VSTC + 0.8 V, IPF = –100 µA
VBAT – 0.6
VBAT
0.6
0.9
VPF
PF voltage
VSTC = 6.5 V
VVB = VSTC + 0.3 V, IPF = 1 µA
VVB = VSTC + 0.3 V, IPF = 5 µA
0
0
V
(1) All voltage values are measured with respect to the GND terminal unless otherwise noted.
(2) Inputs RX/RXI and outputs TX/TXI are open, ICC = ICI1 + ICI2
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TSS521
SLAS980 –SEPTEMBER 2013
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MAX UNIT
Electrical Characteristics (continued)
See note (1). Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
ton
Turn-on time
CSTC = 50 µF, Bus voltage slew rate: 1 V/µs
3
s
Receiver Section Electrical Characteristics
See note (1). Over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
MARK
– 8.2
MARK –
VT
See Figure 1
V
5.7
VVB
–40
VSC
SC voltage
SC charge current
V
ISCcharge
VSC = 24 V, VVB = 36 V
VSC = VVB = 24 V
–15
0.3
µA
–0.033 ×
ISCcharge
ISCdischarge SC discharge current
µA
V
High-level output voltage
(TX, TXI)
VBAT –
VOH
ITX, ITXI = –100 µA (see Figure 1)
VBAT
0.6
ITX, ITXI = 100 µA
ITX = 1.1 mA
0
0.5
1.5
Low-level output voltage
(TX, TXI)
VOL
V
0
ITX
TX, TXI current
ITXI
VTX = 7.5, VVB = 12 V, VSTC = 6 V, VBAT = 3.8 V
16
µA
(1) All voltage values are measured with respect to the GND terminal unless otherwise noted.
Transmitter Section Electrical Characteristics
See note (1). Over operating free-air temperature range (unless otherwise noted)
PARAMETER
MC voltage
TEST CONDITIONS
MIN
11.5
1.4
TYP
MAX UNIT
IMC
RRIS = 100 Ω
RRIS = 100 Ω
RRIS = 1000 Ω
19.5
1.7
mA
VRIS
RIS voltage
V
1.5
1.8
VBAT
–
(2)
VIH
High-level input voltage (RX, RXI)
See Figure 2, see
5.5
V
0.8
VIL
IRX
IRXI
Low-level input voltage (RX, RXI)
RX current
See Figure 2
0
0.8
-40
40
V
VRX = 0 V, VBAT = 3 V, VSTC = 6.5 V
VRXI = VBAT = 3 V, VSTC = 6.5 V
-10
10
µA
µA
RXI current
(1) All voltage values are measured with respect to the GND terminal unless otherwise noted.
(2) VIH(max) = 5.5 V is valid only when VSTC ≥ 6.5 V.
8
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TSS521
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SLAS980 –SEPTEMBER 2013
APPLICATION INFORMATION
Remote Supply
RL1
220
1
2
11
9
VDD
BAT
VS
PF
RX
RXI
TX
TXI
BUSL2
VB
10
5
TSS521
12
13
8
RL2
220
16
BUSL1
7
Sensor System
(MSP430)
CST
RIS SC GND RIDD STC
15
6
14
4
3
T1
RRIS
RRIDD
+
CSC
CSTC
Meter-Bus
RRIDD = 30 kW
RRIDD = 13 kW
single load 1UL
double load 2UL
CSTC =< 220 µF
CSTC =< 470 µF
NOTE: Transistor T1 should be a BSS84.
Figure 6. Basic Application Circuit With Support Capacitor CSTC > 50 µF
RL1
1
11
9
10
5
12
13
8
VDD
BAT
VS
PF
RX
RXI
TX
TXI
BUSL2
VB
220
2
TSS521
RL2
220
16
BUSL1
7
CSSC
BAT
Sensor System
(MSP430)
+
6
15
14
RRIS
4
3
Rload
RRIDD
CVDD
CSC
CSTC
+
Meter-Bus
CSSC = system stabilizing capacitor
CSTC = support capacitor
CSC = sampling capacitor
RRIDD = slave=current adjustment resistor
RRIS = modulation-current resistor
RL1,RL2 = protection resistors
CVDD = stabilizing capacitor (100 nF)
Rload = discharge resistor (100 kW recommended)
CSTC:CVDD ≥ 4:1
Figure 7. Basic Application Circuit for Supply From Battery
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TSS521
SLAS980 –SEPTEMBER 2013
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Remote Supply
RL1
220
11
9
10
5
12
13
8
1
VDD
BAT
VS
PF
RX
RXI
TX
TXI
BUSL2
VB
2
TSS521
RL2
220
16
BUSL1
7
CSSC
Sensor System
(MSP430)
RIS SC GND RIDD STC
15
6
14
4
3
RRIS
RRIDD
CSC
CSTC
+
Remote Supply With Battery Support
T1
RL1
220
11
9
10
5
12
13
8
1
BUSL2
VDD
BAT
VS
PF
RX
RXI
TX
2
VB
TSS521
RL2
220
16
BUSL1
7
TXI
CSSC
Sensor System
(MSP430)
+
BAT
RIS SC GND RIDD STC
15
6
14
4
3
RRIS
RRIDD
CSC
CSTC
+
RL1
220
Battery Supply
11
9
10
5
12
13
8
1
BUSL2
VDD
BAT
VS
PF
RX
RXI
TX
2
VB
TSS521
RL2
220
16
BUSL1
7
TXI
CSSC
Sensor System
(MSP430)
+
BAT
RIS
14
RRIS
GND RIDD STC
15
SC
6
4
3
RRIDD
R
load
CSC
CSTC
+
CVDD
Meter-Bus
NOTE: RDSon of the transistor T1 (BSS84) at low battery voltage must be considered during application design.
Figure 8. Basic Applications for Different Supply Modes
R3
RL1
220
RXI
11
9
10
5
12
13
8
1
VDD
BAT
VS
PF
RX
RXI
TX
TXI
BUSL2
VB
R1
OC2
R4
2
TSS521
CSSC
Sensor System
(MSP430)
+ BAT
RL2
220
16
BUSL1
7
GND
15
RIS SC
6
RIDD STC
3
OC1
14
4
TXI
R2
R
RRIS
R
load
RIDD
CVDD
CSC
CSTC
+
Meter-Bus
Figure 9. Basic Optocoupler Application
10
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TSS521D
ACTIVE
ACTIVE
SOIC
SOIC
D
D
16
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-25 to 85
-25 to 85
TSS521
TSS521
TSS521DR
2500 RoHS & Green
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TSS521DR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
350.0 350.0 43.0
TSS521DR
D
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
SOIC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
TSS521D
D
16
40
505.46
6.76
3810
4
Pack Materials-Page 3
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