TUSB522PRGER [TI]
第四代双通道 USB 3.0 转接驱动器 | RGE | 24 | 0 to 70;型号: | TUSB522PRGER |
厂家: | TEXAS INSTRUMENTS |
描述: | 第四代双通道 USB 3.0 转接驱动器 | RGE | 24 | 0 to 70 驱动 驱动器 |
文件: | 总24页 (文件大小:3339K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Support &
Community
Product
Folder
Order
Now
Tools &
Software
Technical
Documents
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
TUSB522P 3.3V 双通道 USB 3.1 GEN 1 转接驱动器、均衡器
1 特性
3 说明
1
•
USB3.1 GEN 1 5Gbps 双通道转接驱动器,由
3.3V 电源供电运行
TUSB522P 是一款支持 5Gbps 数据传输速率的第四代
双单工通道 USB 3.1 GEN 1 转接驱动器和信号调节
器。该器件采用超低功耗架构,在由 3.3V 电源供电运
行时功耗非常低。转接驱动器还支持 USB 3.1 低功耗
模式,可进一步降低空闲状态下的功耗。
•
超低功耗架构
–
–
–
–
工作:98mA
U2、U3:1.2mA
断开:265µA
关断:60µA
双通道能力使得该系统能够在发送和接收数据路径上保
持信号的完整性。接收器均衡有三种增益设置,用以克
服插入损耗和码间串扰造成的通道性能退化。这些设置
由 EQ 引脚控制。为了补偿传输线路损耗,输出驱动
器还支持使用引脚 DE 配置去加重功能。此外,自动
LFPS 去加重控制有助于实现与 USB 3.1 完全兼容。
这些设置使得 USB 3.1 第 1 代路径中的 TUSB522P
能够达到最佳性能,并延长信号传输距离以及实现灵活
安置。
•
绝佳接收器均衡
3dB、6dB 和 9dB 三种增益设置(2.5GHz 时)
–
•
•
输出驱动器去加重功能,0dB、3.5dB 和 6dB 三种
配置可供选择
自动低频周期信号 (LFPS) 去加重控制,满足 USB
3.1 认证要求
•
•
•
•
无主机/设备端要求
支持热插拔
器件信息(1)
工业级温度范围:-40ºC 至 85ºC (TUSB522PI)
商业级温度范围:0ºC 至 70ºC (TUSB522P)
器件型号
TUSB522P
TUSB522PI
封装
封装尺寸(标称值)
VQFN (24)
4.00mm x 4.00mm
2 应用
•
•
•
•
•
•
手机
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
平板电脑
笔记本电脑
台式机
扩展坞
背板和有源电缆
空白
简化原理图
Main PCB
Detect
USB
Connector
USB Host
Redriver
RX1P
RX1N
TX1P
TX1N
Receiver/
Equalizer
Driver
CHANNEL 1
LFPS
CONTROLLER
EQ1
EQ2
EQ
CNTRL
20"
Device PCB
Device
Main PCB
DE1
DE2
DEMP
CNTRL
Connector
USB Host
Redriver
TX2N
TX2N
RX2P
RX2N
Receiver/
Equalizer
Driver
CHANNEL 2
3m USB
3.0 Cable
OS
Cntrl.
1"-6"
20"
Detect
EN_RXD
OS1 OS2
Copyright © 2016, Texas Instruments Incorporated
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLLSEV9
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 10
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application ................................................. 11
Power Supply Recommendations...................... 13
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics, Power Supply .................. 5
6.6 Electrical Characteristics, DC ................................... 5
6.7 Electrical Characteristics, AC.................................... 6
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 9
8
9
10 Layout................................................................... 14
10.1 Layout Guidelines ................................................. 14
10.2 Layout Example .................................................... 14
11 器件和文档支持 ..................................................... 15
11.1 文档支持 ............................................................... 15
11.2 相关链接................................................................ 15
11.3 接收文档更新通知 ................................................. 15
11.4 社区资源................................................................ 15
11.5 商标....................................................................... 15
11.6 静电放电警告......................................................... 15
11.7 Glossary................................................................ 15
12 机械、封装和可订购信息....................................... 15
7
4 修订历史记录
Changes from Revision C (May 2019) to Revision D
Page
•
Changed pin 11 From: TX1N To: TX2N and pin 12 From: TX1P To: TX2P in Figure 2...................................................... 11
Changes from Revision B (November 2017) to Revision C
Page
•
删除了 RGE0024F 机械页面 ................................................................................................................................................ 15
Changes from Revision A (October 2016) to Revision B
Page
•
Changed the values in the FOR OS = HIGH column of Table 1 ......................................................................................... 10
Changes from Original (July 2016) to Revision A
Page
•
已将器件状态从“产品预览”更改为“量产数据” .......................................................................................................................... 1
2
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
5 Pin Configuration and Functions
RGE Package
24-Pin (VQFN)
Top View
OS2
DE2
EQ1
VCC
NC EN_RXD
6
5
4
3
2
1
NC
7
8
24 NC
23
22
21
20
19
TX1N
TX1P
RX1N
RX1P
CH1
9
PAD
(must be soldered to GND)
10
11
12
GND
TX2N
TX2P
GND
RX2N
CH2
RX2P
13
14
15
16
17
18
VCC
OS1
DE1
EQ2
NC
RSV
Pin Functions
PIN
I/O
DESCRIPTION
NAME
RX1N
RX1P
TX1N
TX1P
RX2N
RX2P
TX2N
TX2P
NO.
8
Differential I Differential input for 5 Gbps negative signal on Channel 1
Differential I Differential input for 5 Gbps positive signal on Channel 1
Differential O Differential output for 5 Gbps negative signal on Channel 1
Differential O Differential output for 5 Gbps positive signal on Channel 1
Differential I Differential input for 5 Gbps negative signal on Channel 2
Differential I Differential input for 5 Gbps positive signal on Channel 2
Differential O Differential output for 5 Gbps negative signal on Channel 2
Differential O Differential output for 5 Gbps positive signal on Channel 2
9
23
22
20
19
11
12
Sets the receiver equalizer gain for Channel 1. 3-state input with integrated pull-up and pull-
down resistors.
EQ1
2
I, CMOS
EQ1 = Low = 3 dB
EQ1 = Mid = 6 dB
EQ1 = High = 9 dB
Sets the output de-emphasis for Channel 1. 3-state input with integrated pull-up and pull-
down resistors.
DE1 = Low = 0 dB
DE1 = Mid = -3.5 dB
DE1 = High = -6.2 dB
Note: When OS = Low
DE1
16
I, CMOS
Sets the output swing (differential voltage amplitude) for Channel 1. 2-state input with an
integrated pull down resistor.
OS1 = Low = 0.9 mV
OS1 = High = 1.1 mV
OS1
EQ2
15
17
I, CMOS
I, CMOS
Sets the receiver equalizer gain for Channel 2. 3-state input with integrated pull-up and pull-
down resistors.
EQ2 = Low = 3 dB
EQ2 = Mid = 6 dB
EQ2 = High = 9 dB
Copyright © 2016–2019, Texas Instruments Incorporated
3
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
Pin Functions (continued)
PIN
I/O
DESCRIPTION
NAME
NO.
Sets the output de-emphasis for Channel 2. 3-state input with integrated pull-up and pull-
down resistors.
DE2 = Low = 0 dB
DE2 = Mid = -3.5 dB
DE2 = High = -6.2 dB
Note: When OS = Low
DE2
3
I, CMOS
Sets the output swing (differential voltage amplitude) for Channel 2. 2-state input with an
integrated pull down resistor.
OS2 = Low = 0.9 mV
OS2 = High = 1.1 mV
OS2
4
5
I, CMOS
I, CMOS
Enable. The device has a 660-kΩ pulldown resistor. Device is active when EN_RXD = High.
Drive actively high or install a pullup resistor (recommend 4.7 KΩ) for normal operation. Does
reset state machine.
EN_RXD
RSV
VCC
14
I, CMOS
P
Reserved. Can be left as No-connect.
1, 13
Positive Power Supply. Power Supply is 3.3 V.
Ground. PAD must be connected to Ground. Pins 10, 21 can be connected to Ground or left
unconnected.
GND
NC
10, 21, PAD
6, 7, 18, 24
G
No Connection. These pins can be tied to any desired voltages including connecting them to
GND.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
MAX
4
UNIT
V
Supply Voltage Range(2)
VCC
Differential I/O
CMOS Inputs
1.5
4
V
Voltage Range at any input or output terminal
V
Junction temperature, TJ
Storage temperature, Tstg
105
150
°C
°C
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the GND terminals.
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
3.6
UNIT
V
Main power supply
3
3.3
VCC
Supply Ramp Requirement
Supply Noise on VCC Terminals
100
100
70
ms
mV
°C
V(PSN)
TA
TUSB522P
TUSB522PI
0
–40
75
Operating free-air temperature
AC coupling capacitor
85
°C
C(AC)
100
200
nF
4
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
6.4 Thermal Information
TUSB522P
THERMAL METRIC(1)
RGE (VQFN)
24 PINS
51.2
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
55.9
28.3
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.0
ψJB
28.3
RθJC(bot)
9.7
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics, Power Supply
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Link in U0 with GEN1 data transmission.
RSV, EQ cntrl pins = NC, EN_RXD = VCC
k28.5 pattern at 5 Gbps,
,
ICC(ACTIVE)
Average active current
98
mA
VID = 1000 mVpp, OS = 900 mV and DE =
3.5 dB
ICC(U2U3)
Average current in U2/U3
Link in U2 or U3
1.2
265
60
mA
µA
µA
ICC(NC)
Average current disconnect mode
Average shutdown current
Link in Disconnect mode
EN_RXD = L
ICC(SHUTDOWN)
6.6 Electrical Characteristics, DC
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3-State CMOS Inputs(EQ1/2, DE1/2)
VIH
VIM
VIL
VF
High-level input voltage
Mid-level input voltage
Low-level input voltage
Floating voltage
VCC x 0.8
V
V
VCC / 2.
VCC x 0.2
V
VIN = High impedance
0.36 x VCC
410
V
RPU
RPD
IIH
Internal pull-up resistance
Internal pull-down resistance
High-level input current
Low-level input current
kΩ
kΩ
µA
µA
240
VIN = 3.6 V
26
IIL
VIN = GND, VCC = 3.6.V
–26
2-State CMOS Input (OS1/2, EN_RXD)
VIH
VIL
RPD
IIH
High-level input voltage
Low-level input voltage
Internal pull-down resistance
Low-level input current
Low-level input current
VCC x 0.7
V
VCC x 0.3
25
V
660
kΩ
µA
µA
VIN = 3.6 V
IIL
VIN = GND, VCC = 3.6.V
–10
Copyright © 2016–2019, Texas Instruments Incorporated
5
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
6.7 Electrical Characteristics, AC
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Differential Receiver (RXP, RXN)
AC-coupled differential peak-to-peak
signal measured post CTLE through a
reference channel
Input differential voltage swing.
100
1200
mVpp
V(RX-DIFF-PP)
V(RX-DC-CM)
R(RX-DIFF-DC)
R(RX-CM-DC)
Common-mode voltage bias in the
receiver (DC)
0.7
V
Ω
Ω
Differential input impedance (DC)
72
18
120
30
Present after a GEN1 device is
detected on TXP/TXN
Receiver DC Common Mode
impedance
Present when no GEN1 device is
detected on TXP/TXN. Measured over
the range of 0-500 mV with respect to
GND.
Z(RX-HIGH-IMP-DC-POS)
25
kΩ
Common-mode input impedance with
termination disabled (DC)
Input Differential peak-to-peak Signal
Detect Assert Level
V(RX-SIGNAL-DET-DIFF-PP)
V(RX-IDLE-DET-DIFF-PP)
85
85
mV
mV
At 5 Gbps, no input channel loss clock
pattern
Input Differential peak-to-peak Signal
Detect De-assert Level
Low Frequency Periodic Signaling
(LFPS) Detect Threshold
V(RX-LFPS-DET-DIFF-PP)
V(RX-CM-AC-P)
V(detect)
Below the minimum is squelched.
Measured at package pin
100
300
150
600
0.99
mV
mV
mV
Peak RX AC common mode voltage
Voltage change to allow receiver detect
Positive voltage to sense receiver
termination
C(RX-PARASITIC)
Voltage change to allow receiver detect At 2.5 GHz
0.17
0.63
–19
–14
–13
pF
dB
dB
dB
50 MHz – 1.25 GHz at 90 Ω
RL(RX-DIFF)
RL(RX-CM)
Differential Return Loss
2.5 GHz at 90 Ω
Common Mode Return Loss
50 MHz – 1.25 GHz at 90 Ω
Differential Transmitter (TXP, TXN)
OS Low, 0dB DE
OS High, 0dB DE
OS Low, High
DE = Low
0.8
0.8
0.9
1.1
Vpp
Vpp
Vpp
dB
Transmitter differential voltage swing
(transition-bit)
V(TX-DIFF-PP)
1.2
1.2
V(TX-DIFF-PP-LFPS)
LFPS differential voltage swing
0
–3.5
–6.2
Transmitter differential voltage De-
Emphasis ratio
V(TX-DE-RATIO)
DE = Floating
DE = High
dB
dB
Amount of voltage change allowed
during Receiver Detection
V(TX-RCV-DETECT)
600
600
mV
mV
Transmitter idle common-mode voltage
change while in U2/U3 and not actively
transmitting LFPS
V(TX-CM-IDLE-DELTA)
–600
Common-mode voltage bias in the
transmitter (DC)
V(TX-DC-CM)
0.7
V
mVpp
mV
Max mismatch from Txp + Txn for both
time and amplitude
V(TX-CM-AC-PP-ACTIVE)
V(TX-IDLE-DIFF-AC-PP)
V(TX-IDLE-DIFF-DC)
Tx AC Common-mode voltage active
100
10
AC Electrical idle differential peak-to-
peak output voltage
At package pins
0
0
DC Electrical idle differential output
voltage
At package pins after low pass filter to
remove AC component
10
mV
V(TX-CM-DC-ACTIVE-IDLE-
Absolute DC common mode voltage
between U1 and U0
At package pin
At 2.5 GHz
200
mV
DELTA)
C(TX)
TX input capacitance to GND
1.25
120
pF
R(TX-DIFF)
Differential impedance of the driver
72
18
Ω
Common-mode impedance of the
driver
Measured with respect to AC ground
over 0-500 mV
R(TX-CM)
30
Ω
I(TX-SHORT)
TX short circuit current
TX± shorted to GND
Package Pins
60
mA
F
C(TX-PARASITIC)
TX input capacitance for return loss
0.63
12
8
1.02
50 MHz – 1.25 GHz at 90 Ω
1.25 – 2.5 GHz at 90 Ω
dB
dB
RL(RX-DIFF)
Differential Return Loss
6
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
Electrical Characteristics, AC (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
13
MAX
UNIT
dB
50 MHz – 1.25 GHz at 90 Ω
RL(RX-CM)
Common Mode Return Loss
1.25 –2.5 GHz
11
dB
AC Characteristic
Differential Cross Talk between TX and
RX signal Pairs
Xtalk
At 2.5 GHz
–40
dB
mVpp
V
AC Common-mode voltage swing in
active mode
V(CM-TX-AC)
Within U0 and within LFPS
Tested with a high-pass filter
100
10
Differential voltage swing during
electrical idle
V(TX-IDLE-DIFF -AC-PP)
0
f = 50 MHz - 1.25 GHz
1.25 –2.5 Ghz
12
8
dB
dB
dB
dB
RL(TX-DIFF)
Differential Return Loss
f = 50 MHz - 1.25 GHz
1.25 –2.5 GHz
16
13
RL(TX-CM)
Common Mode Return Loss
Total Jitter
Minimum input and output trace at 2.5
GHz, VCC = 3.3 V
tJ
15
ps
Absolute delta of DC CM voltage during
active and idle states
V(TX-CM-ΔU1-U0)
V(TX-IDLE-DIFF-DC)
100
12
mV
mV
DC Electrical idle differential output
voltage
Voltage must be low pass filtered to
remove any AC component
0
Copyright © 2016–2019, Texas Instruments Incorporated
7
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
7 Detailed Description
7.1 Overview
The TUSB522P is designed to overcome channel loss due to inter-symbol interference and crosstalk when 5
Gbps USB3.1 GEN1 signals travel across a PCB or cable. The dual channel architecture is a one-chip, low-
power solution, extending the possible channel length for transmit and receive data paths in an application. For a
Host application, this enables the system to pass both transmitter compliance and receiver jitter tolerance tests.
The re-driver recovers incoming data by applying equalization that compensates for channel loss, and drives out
signals with a high differential voltage. Each channel has a receiver equalizer with selectable gain settings. The
equalization should be set based on the amount of insertion loss in channel 1 or 2 before the TUSB522P
receivers. Likewise, the output drivers support configuration of De-Emphasis. Independent equalization and de-
emphasis control for each channel can be set using EQ1/2 and DE1/2 pins.
The TUSB522P advanced state machine makes it transparent to hosts and devices. After power up, the
TUSB522P periodically performs receiver detection on the TX pairs. If it detects a USB3.1 GEN1 receiver, the
RX termination is enabled, and the TUSB522P is ready to re-drive.
The device ultra-low-power architecture operates at a 3.3-V power supply and achieves Enhanced performance.
The automatic LFPS De-Emphasis control further enables the system to be USB3.1 compliant.
7.2 Functional Block Diagram
EQ1
DE1
OS1
RX1+
TX1+
Receiver/
Equalizer
CHANNEL 1
Driver
RX11-
TX1-
th
VCC
GND
4
Generation
State Machine
LFPS
Controller
TX2-
RX2-
Receiver/
Equalizer
Driver
CHANNEL 2
TX2+
RX2+
OS2
DE2
EQ2
8
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
7.3 Feature Description
7.3.1 Receiver Equalization
The purpose of receiver equalization is to compensate for channel insertion loss and inter-symbol interference in
the system before the input of the TUSB522P. The receiver overcomes these losses by attenuating the low
frequency components of the signals with respect to the high frequency components. The proper gain setting
should be selected to match the channel insertion loss before the input of the TUSB522P receivers. The gain
setting may differ for channel 1 and channel 2.
7.3.2 De-Emphasis Control and Output Swing
The differential driver output provides selectable de-emphasis and output swing control in order to achieve
USB3.1 compliance. The TUSB522P offers a unique way to adjust output de-emphasis and transmitter swing
based on the OS1/2 and DE1/2 pins. The level of de-emphasis required in the system depends on the channel
length after the output of the re-driver. The output swing and de-emphasis levels may differ for channel 1 and
channel 2.
Figure 1. Transmitter Differential Voltage, OS = Floating
7.3.3 Automatic LFPS Detection
The TUSB522P features an intelligent low frequency periodic signaling (LFPS) controller. The controller senses
the low frequency signals and automatically disables the driver de-emphasis, for full USB3.1 compliance.
Copyright © 2016–2019, Texas Instruments Incorporated
9
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
7.4 Device Functional Modes
7.4.1 Device Configuration
Table 1. Control Pin Settings (Typical Values)
PIN
DESCRIPTION
LOGIC STATE
Low
GAIN
3 dB
6 dB
9 dB
EQ1/EQ2
Equalization Amount
Floating
High
OUTPUT DIFFERENTIAL VOLTAGE FOR
THE TRANSISTION BIT
PIN
DESCRIPTION
LOGIC STATE
LOW
HIGH
0.9 Vpp
1.1 Vpp
OS1/OS2
Output Swing Amplitude
DE-EMPHASIS RATIO
PIN
DESCRIPTION
LOGIC STATE
FOR OS = LOW
0 dB
FOR OS = HIGH
0 dB
Low
Floating
High
DE1/DE2
De-Emphasis Amount
–3.5 dB
–3.5 dB
–6.2 dB
–6.2 dB
7.4.2 Power Modes
The TUSB522P has 3 primary power modes:
7.4.2.1 U0 Mode (Active Power Mode)
During active power mode, U0, the device is transmitting USB SS data or USB LFPS signaling. The U0 mode is
the highest power state of the TUSB522P. Anytime super-speed traffic is being received, the TUSB522P remains
in this mode.
7.4.2.2 U2/U3 (Low Power Mode)
While in this mode, the TUSB522P periodically performs far-end receiver detection.
7.4.2.3 Disconnect Mode - RX Detect
In this state, the TUSB522P periodically checks for far-end receiver termination on both TX. Upon detection of
the far-end receiver’s termination on both ports, the TUSB522P will transition to U0 mode.
7.4.2.4 Shutdown Mode
Shutdown mode is entered when the EN_RXD pin is driven low. This is lowest power setting for the device.
10
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TUSB522P is a dual-channel single-lane re-driver and signal conditioner designed to compensate for ISI
jitter caused by attenuation through passive mediums such as traces or cables. The TUSB522P has two
independent channels to allow optimization in both upstream and downstream directions through three EQ and
six De-Emphasis settings.
8.2 Typical Application
2
DN
DP
DN
DP
3
0.1 mF
0.1 mF
0.1 mF
0.1 mF
23
22
8
9
8
9
TX1N
TX1P
SSTXN
SSTXP
RX1N
RX1P
TXN
TXP
USB Host
11
12
20
19
5
6
0.1 mF
0.1 mF
TX2N
TX2P
RXN
RXP
SSRXN
SSRXP
RX2N
RX2P
3.3 V
3.3 V
TUSB522P
1
13
V
CC
47 kW
7
24
6
3.3 V
15
16
2
NC
OS1
DE1
NC
NC
NC
NC
USB3.1 Type-A
Receptacle
0.1 mF
10 mF
0.1 mF
18
14
EQ1
OS2
4
NC
3
RSV
GND
DE2
EQ2
Thermal Pad
17
5
10
21
EN_RXD
47 kW
Figure 2. Embedded Host Application
Copyright © 2016–2019, Texas Instruments Incorporated
11
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
Typical Application (continued)
8.2.1 Design Requirements
For this design example, use the parameters shown in Table 2.
Table 2. Design Parameters
PARAMETERS
VCC Supply (3 V – 3.6 V)
VALUE
3.3 V
AC Coupling Capacitor (75nF to 265nF)
Host to TUSB522P FR4 Length (Inches)
Host to TUSB522P FR4 Trace Width (mils)
TUSB522P to Connector FR4 Length (Inches)
TUSB522P to Connector FR4 Trace Width (mils)
EQ1 (RX1P/RX1N)
100 nF
20
4
6
4
9 dB (EQ1 = High)
-6.2 dB (OS2 = Low, DE2 = High)
6 dB (EQ2 = Floating)
-3.5 dB (OS1 = Low, DE1 = Floating)
900 mV (OS1 = Low)
900 mV (OS2 = Low)
De-Emphasis 2 (TX2P/TX2N)
EQ2 (RX2P/RX2N)
De-Emphasis 1 (TX1P/TX1N)
Output Swing 1 (OS1)
Output Swing 2 (OS2)
8.2.2 Detailed Design Procedure
The TUSB522P differential receivers and transmitters have internal BIAS and termination. Due to this, the
TUSB522P must be connected to the USB Host and receptacle through ac-coupling capacitors. In this example,
as depicted in Table 1, 100 nF capacitors are placed on TX2P, TX2N, RX1P, RX1N, TX1P and TX1N. No ac-
coupling capacitors are placed on the RX2P and RX2N pins because it is assumed the device downstream of the
TUSB522P will have ac-coupling capacitors on its transmitter as defined by the USB 3.1 specification.
12
Copyright © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
8.2.3 Application Curves
BERT > 24"6mil > char-board > RX2-to-TX2 > char-board > Scope
1ft SMP-SMP cable
1ft SMP-SMP cable
1ft SMP-SMP cable
TUSB522
RX2 > TX2
Input PCB trace
MP1800 BERT
Output PCB trace
1.0" FR-4
DCAX
35GHz BW
PTB
5Gbps, 680mVpp
PRBS7
25" FR-4
-10.5dB Loss
-0.8dB Loss
EQ = H, OS = L, DE = L
9 Power Supply Recommendations
The TUSB522P is designed to operate with a 3.3-V power supply. Levels above those listed in the Absolute
Ratings table should not be used. If using a higher voltage system power supply, a voltage regulator can be used
to step down to 3.3 V. Decoupling capacitors should be used to reduce noise and improve power supply integrity.
A 0.1-µF capacitor should be used on each power pin.
Copyright © 2016–2019, Texas Instruments Incorporated
13
TUSB522P
ZHCSFL6D –JULY 2016–REVISED MAY 2019
www.ti.com.cn
10 Layout
10.1 Layout Guidelines
•
•
•
•
•
•
RXP/N and TXP/N pairs should be routed with controlled 90-Ω differential impedance (±15%).
Keep away from other high speed signals.
Intra-pair routing should be kept to within 2mils.
Length matching should be near the location of mismatch.
Each pair should be separated at least by 3 times the signal trace width.
The use of bends in differential traces should be kept to a minimum. When bends are used, the number of left
and right bends should be as equal as possible and the angle of the bend should be ≥ 135 degrees. This will
minimize any length mismatch causes by the bends and therefore minimize the impact bends have on EMI.
•
•
•
•
•
Route all differential pairs on the same of layer.
The number of VIAS should be kept to a minimum. It is recommended to keep the VIAS count to 2 or less.
Keep traces on layers adjacent to ground plane.
Do NOT route differential pairs over any plane split.
Adding Test points will cause impedance discontinuity; and will therefore, negatively impact signal
performance. If test points are used, they should be placed in series and symmetrically. They must not be
placed in a manner that causes a stub on the differential pair.
•
•
The 100-nF capacitors on the TXP and SSTXN nets must be placed close to the USB connector (Type A,
Type B, and so forth).
The ESD and EMI protection devices (if used) must also be placed as close as possible to the USB
connector.
•
•
Place voltage regulators as far away as possible from the differential pairs.
In order to minimize crosstalk, TI recommends keeping high-speed signals away from each other. Each pair
must be separated by at least 5 times the signal trace width. Separating with ground also helps minimize
crosstalk.
10.2 Layout Example
Figure 3. Example Layout
14
版权 © 2016–2019, Texas Instruments Incorporated
TUSB522P
www.ti.com.cn
ZHCSFL6D –JULY 2016–REVISED MAY 2019
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
请参阅如下相关文档:
11.2 相关链接
下表列出了快速访问链接。类别包括技术文档、支持与社区资源、工具和软件,以及申请样片或购买产品的快速链
接。
11.3 接收文档更新通知
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.4 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2016–2019, Texas Instruments Incorporated
15
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TUSB522PIRGER
TUSB522PIRGET
TUSB522PRGER
TUSB522PRGET
ACTIVE
VQFN
VQFN
VQFN
VQFN
RGE
24
24
24
24
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 85
-40 to 85
0 to 70
TUSB
522P
ACTIVE
ACTIVE
ACTIVE
RGE
NIPDAU
NIPDAU
NIPDAU
TUSB
522P
RGE
TUSB
522P
RGE
0 to 70
TUSB
522P
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TUSB522PIRGER
TUSB522PIRGET
TUSB522PRGER
TUSB522PRGET
VQFN
VQFN
VQFN
VQFN
RGE
RGE
RGE
RGE
24
24
24
24
3000
250
330.0
180.0
330.0
180.0
12.4
12.4
12.4
12.4
4.25
4.25
4.25
4.25
4.25
4.25
4.25
4.25
1.15
1.15
1.15
1.15
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
Q2
Q2
Q2
Q2
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TUSB522PIRGER
TUSB522PIRGET
TUSB522PRGER
TUSB522PRGET
VQFN
VQFN
VQFN
VQFN
RGE
RGE
RGE
RGE
24
24
24
24
3000
250
356.0
210.0
356.0
210.0
356.0
185.0
356.0
185.0
35.0
35.0
35.0
35.0
3000
250
Pack Materials-Page 2
GENERIC PACKAGE VIEW
RGE 24
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4204104/H
PACKAGE OUTLINE
VQFN - 1 mm max height
RGE0024C
PLASTIC QUAD FLATPACK- NO LEAD
4.1
3.9
A
B
4.1
3.9
PIN 1 INDEX AREA
1 MAX
C
SEATING PLANE
0.08 C
0.05
0.00
2X 2.5
2.1±0.1
(0.2) TYP
12
7
20X 0.5
6
13
SYMM
25
2X
2.5
1
18
0.30
PIN 1 ID
(OPTIONAL)
24X
0.18
0.1
24
19
0.50
C A B
C
SYMM
0.05
24X
0.30
4224376 / C 07/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RGE0024C
PLASTIC QUAD FLATPACK- NO LEAD
(3.8)
2.1)
(
24
19
24X (0.6)
24X (0.24)
1
18
20X (0.5)
25
SYMM
(3.8)
2X
(0.8)
(Ø0.2) VIA
TYP
6
13
(R0.05)
7
12
2X(0.8)
SYMM
LAND PATTERN EXAMPLE
SCALE: 20X
0.07 MIN
0.07 MAX
ALL AROUND
ALL AROUND
METAL
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4224376 / C 06/2021
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments
literature number SLUA271 (www.ti.com/lit/slua271).
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RGE0024C
PLASTIC QUAD FLATPACK- NO LEAD
(3.8)
4X ( 0.94)
24
19
24X (0.6)
24X (0.24)
1
18
20X (0.5)
SYMM
(3.8)
(0.57)
TYP
6
13
25
(R0.05) TYP
METAL
TYP
7
12
(0.57)
TYP
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
80% PRINTED COVERAGE BY AREA
SCALE: 20X
4224376 / C 06/2021
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations..
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,
不保证没有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更,恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务,TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022,德州仪器 (TI) 公司
相关型号:
©2020 ICPDF网 联系我们和版权申明