TPD7101F [TOSHIBA]
2 channel High-Side N-ch Power MOSFET Gate Driver; 2通道高侧N沟道功率MOSFET栅极驱动器
| 型号： | TPD7101F |
| 厂家： | 
TOSHIBA |
| 描述： | 2 channel High-Side N-ch Power MOSFET Gate Driver |
| 文件： | 总9页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPD7101F
TOSHIBA Intelligent Power Device
Silicon Monolithic Power MOS Integrated Circuit
TPD7101F
2 channel High-Side N-ch Power MOSFET Gate Driver
The TPD7101F is a 2 channel high-side N-ch power MOSFET gate driver.
This IC contains a power MOSFET driver and power MOSFET protective
and diagnostic functions, allowing easy configuration of a high-side switch
for large-current applications.
Features
z The large-current charge pump allows for fast switching
z Power MOSFET protective and diagnostic functions are built-in.
Protective functions: Overvoltage
(internal device protection), overcurrent
protection, V
voltage drop detection
DD
Weight: 0.29g(typ.)
* Overvoltage is internally limited. No detection or shutdown functions
are included.
Diagnostic functions: Overcurrent
z The level of overcurrent detection can set by external resistor.
z Package: SSOP-24 (300 mil) with embossed-tape packing
Due to its MOS structure, this product is sensitive to static electricity. Handle with care.
Pin Assignment
Marking
Lot No.
A dot indicates
lead (Pb)-free package or
lead (Pb)-free finish.
T P D 7 1 0 1 F
Part No. (or abbreviation code)
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TPD7101F
Block Diagram
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TPD7101F
Pin Description
Pin No.
Symbol
Pin Description
1
2
3
4
CP2 −
CP 1−
CP1 +
CP2+
Negative side connecting pin for the charge pump’s second capacitor
Negative side connecting pin for the charge pump’s first capacitor
Positive side connecting pin for the charge pump’s first capacitor
Positive side connecting pin for the charge pump’s second capacitor
Positive side connecting pin for the charge pump’s third capacitor: Although about three times the
5
6
CPV+
V
voltage is generated, it is limited to about 28 V by a voltage clamping circuit.
DD
N.C.
⎯
External power MOSFET gate drive pin for ch1: This pin controls the external power MOSFET. Also,
when overcurrent flows in the external power MOSFET, it shuts down the gate and is latched. It is
unlatched by a low on-input.
7
8
V
GS1
External power MOSFET monitor pin for ch1: Overcurrent is detected by comparing the difference
between this and the VDD2 pin with the reference voltage.
Vsense1
External power MOSFET gate drive pin for ch2: This pin controls the external power MOSFET. Also,
when overcurrent flows in the external power MOSFET, it shuts down the gate and is latched. It is
unlatched by a low on input.
9
V
GS2
External power MOSFET monitor pin for ch2: Overcurrent is detected by comparing the difference
between this and the VDD2 pin with the reference voltage.
10
Vsense2
11
12
GND
GND
Ground pin : shared internally with pin 12.
Shared internally with pin 11.
Input pin for ch2 (active high) : This pin has a pull-down resistor (100 kΩ typ.), so that even when it is
open-circuited, output will not turn on inadvertently.
13
14
15
16
17
18
19
IN2
Input pin for ch1 (active high) : This pin has a pull-down resistor (100 kΩ typ.), so that even when it is
open-circuited, output will not turn on inadvertently.
IN1
Diagnostic output pin for ch2 (N-ch open-drain): When the overcurrent condition is detected, its output
goes low. Also, when overcurrent is detected, it remains latched until the next rising edge of input.
DIAG2-1
DIAG2-2
DIAG1-1
DIAG1-2
ENB
Diagnostic output pin for ch2 (N-ch open-drain): By comparing the voltage between V
Vsense2 pins with the set overcurrent level, it outputs external power MOSFET on / off state.
and
DD2
Diagnostic output pin for ch1 (N-ch open-drain): When overcurrent condition is detected, its output
goes low; in this case, it also remains latched until the next rising edge of input.
Diagnostic output pin for ch1 (N-ch open-drain): By comparing the voltage between V
Vsense1 pins with the set overcurrent level, it outputs external power MOSFET on / off state.
and
DD2
Chip inhibit pin (active low): By driving this pin high, all outputs can be turned off regardless of input
signals. This pin has a pull-up resistor (100 kΩ typ.).
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TPD7101F
Pin No.
20
Symbol
RlSref2
Pin Description
Overcurrent detection level setup pin for ch2: The voltage determined by the constant current set by
the resistor connected to the Rref pin and the resistance of an external resistor connected to the
RISref2 pin is referenced to detect overcurrent.
Overcurrent detection level setup pin for ch1: The voltage determined by the constant current set by
the resistor connected to the Rref pin and the resistance of an external resistor connected to the
RISref1 pin is referenced to detect overcurrent.
21
22
RlSref1
Rref
Resistor connection pin:
This resistor determines the constant current used for the overcurrent detection circuit. Connect 62kΩ
(recommended) between this pin and GND.
23
24
V
V
External power MOSFET drain voltage detection pin.
DD2
DD1
Power supply pin: the internal device is protected when overvoltage is applied.
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Power supply voltage
Input voltage
V
30
− 0.5 ~ 6
2
V
V
DD
V
IN
Diagnosis output current
Power dissipation
IDIAG
mA
W
P
0.8
D
Operating temperature
Storage temperature
T
− 40 ~ 110
− 55 ~ 150
°C
°C
opr
T
stg
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
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TPD7101F
Electrical Characteristics
(Unless otherwise specified, V = 8~18V, T = − 40 to 110°C)
DD
j
Characteristics
Operating supply voltage
Supply current
Rating
Pin No.
Test Condition
Min
8
Typ.
⎯
Max
18
Unit
V
V
V
V
⎯
DD
DD
DD
DD
V
= 12 V, V = 0 V,
DD IN
CP = 0.01 μF
I
⎯
⎯
10
mA
V
V
V
V
V
V
= 12 V, V
= 12 V, V
= “H”
= “L”
3.5
⎯
⎯
⎯
⎯
⎯
⎯
1.5
200
1
IN (1)
IN (2)
IN (1)
IN (2)
DD
DD
DD
DD
GS
GS
Input voltage
IN1, IN2
IN1, IN2
V
I
I
= 12 V, V = 5 V
IN
⎯
= 12 V, V = 0 V
IN
− 1
Input current
μA
(1)
(2)
I
V
= 12 V,
= 12 V,
= 5 V
− 45
⎯
⎯
⎯
⎯
ENB
V
ENB
DD
DD
ENB
V
= 0 V
I
− 250
V
ENB
ENB
Vsense Vsense
Output voltage
Output current
V
A
V
V
= 12 V, V = 5 V
IN
⎯
⎯
⎯
OH
DD
+ 15*
+ 19*
V
V
V
= 12 V, V = 0 V
IN
⎯
0.4
OL
DD
V
GS1
V
GS2
= 12 V, V = 5 V,
IN
DD
I
0.1
0.1
⎯
OH
CP = 0.01 μF
V
DD
= 12 V, V = 0 V,
IN
I
⎯
⎯
OL
CP = 0.01 μF
Overcurrent detection
resistance setup range
RlSref
VRref
RlSref
Rref
⎯
10
20
40
KΩ
Constant current source
setup pin voltage
Rref = 62 kΩ
Rref = 62 kΩ
1.17
0.16
0.32
0.64
1.30
0.20
0.40
0.80
1.43
0.24
0.48
0.96
V
V
V
V
DS(ON)(1)
DS(ON)(2)
DS(ON)(3)
RlSref = 10 kΩ
V
DD2
Rref = 62 kΩ
Overcurrent detection voltage
Vsense1
Vsense2
V
RlSref = 20 kΩ
Rref = 62 kΩ
RlSref = 40 kΩ
V
= 12 V,
DD
VDIAG = 5 V
Diagnostic output current
Diagnostic output voltage
I
DIAG1
DIAG2
⎯
⎯
⎯
⎯
10
0.6
7.3
μA
DH
V
V
DD
= 12 V, I = 1 mA
DL
V
DL
Power supply drop
detection voltage
VDDUV1−
⎯
6.3
6.7
V
V
Power supply drop
detection reset voltage
DD
VDDUV1+
⎯
⎯
6.6
7.2
7.8
Undervoltage protection
VDDUV2
⎯
⎯
⎯
⎯
2
4.5
5
t
V
V
ON
GS1
Switching time
V
DD
= 12V, C = 3000 pF
μs
t
2
5
GS2
OFF
*: Vsense denotes the Vsense pin voltage.
The following equation is used to calculate overcurrent detection resistance (RISref):
RlSref = Rref × R
DS (ON)
× I / Vrref = Rref × V / VRref
DS (ON)
D
where R
: ON-resistance of external power MOSFET
: drain current of external power MOSFET
: ON-voltage of external power MOSFET
: external resistor connected to Rref pin (used to set constant current)
: Rref pin voltage
DS (ON)
I
D
V
DS (ON)
Rref
VRref
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TPD7101F
Truth Table
In
ENB
V
GS
DIAG -1
DIAG -2
*
State
*
L
H
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
L
Normal
H
L
H
L
H (Note 1)
H
H
L
Overvoltage
H
L
H
L
H (Note 1)
L (Note 1 / Note 2)
H
H
H
H
H
H
L
Overcurrent
H
L
L
L (Note 1)
L
H
H
H
H
H
H
Supply voltage drop
Undervoltage protection
Power MOSFET shorted
H
L
H
L
H
L
L
L
H
H
L
Note 1: Since overcurrent is detected by checking the drain-to-source voltage of the power MOSFET, there is a
possibility of erroneous detection of overcurrent for a while after the input is driven high but before the power
MOSFET is turned on, during which interval the drain-to-source voltage is high. To prevent this erroneous
detection, DIAG detection is disabled for 15 μs (typ.) by a mask circuit. This masking time depends on the
constant current determined by the internal capacitor and Rref. (The masking time is 15 μ when Rref = 62
kΩ.)
Note 2: After overcurrent is detected, DIAG remains latched until the next rising edge of input.
Timing Chart
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TPD7101F
Application Circuit 1
Monitoring Power MOSFET drain-source voltage
TPD7101F
Application Circuit 2
Monitoring voltage between shunt resistors (for detecting overcurrent with high accuracy)
TPD7101F
Moisture-proof Packing
After the pack is opened, use the devices in a 30°C, 60% RH environment, and within 48 hours.
Embossed-tape packing cannot be baked. Devices so packed must be used within their allowable time limits
after unpacking, as specified on the packing.
Standard tape packing quantity: 2000 devices / reel (EL1)
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TPD7101F
Package Dimensions
SSOP24-P-300-1.00C
Unit : mm
Weight: 0.29g (typ.)
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TPD7101F
RESTRICTIONS ON PRODUCT USE
20070701-EN
• The information contained herein is subject to change without notice.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc.
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his
document shall be made at the customer’s own risk.
• The products described in this document shall not be used or embedded to any downstream products of which
manufacture, use and/or sale are prohibited under any applicable laws and regulations.
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patents or other rights of
TOSHIBA or the third parties.
• Please contact your sales representative for product-by-product details in this document regarding RoHS
compatibility. Please use these products in this document in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses
occurring as a result of noncompliance with applicable laws and regulations.
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