TESDC24VRRG [TSC]
Bi-directional TVS Diode Array;
| 型号： | TESDC24VRRG |
| 厂家： | 
TAIWAN SEMICONDUCTOR COMPANY, LTD |
| 描述： | Bi-directional TVS Diode Array 局域网 光电二极管 电视 |
| 文件： | 总5页 (文件大小：118K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TESDC24V
Taiwan Semiconductor
Small Signal Product
Bi-directional TVS Diode Array
FEATURES
- Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
- Meet IEC61000-4-4 (EFT) rating. 40A (5/50ns)
- Protects one Bi-directional I/O line
- Working Voltage : 24V
4
- Pb free version, RoHS compliant, and Halogn free
MECHANICAL DATA
- Case: SOD-323 small outline plastic package
- High temperature soldering guaranteed: 260°C/10s
- Weight: 48±5 mg (approximately)
SOD-323
- Terminal : Matte tin plated, lead free,
solderable per MIL-STD-202, method 208 guaranteed
- Mounting position : Any
APPLICATION
- Cell Phone Handsets and Accessories
- Notebooks, Desktops, and Servers
- Keypads, Side Keys
- Portable Instrumentation
- Microprocessor Based Equipment
- Peripherals
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS (TA=25℃ unless otherwise noted)
PARAMETER
SYMBOL
VALUE
UNIT
± 15
IEC61000-4-2 ESD Voltage
Air model
Contact Model
± 8
VESD
kV
W
(Note 1)
JESD22-A114-B ESD Voltage
ESD Voltage
Per Human Body Model
Machine Model
-
-
Peak Pulse Power
PPP (Note 2)
500
oC
oC
Junction Temperature
Storage Temperature Range
TJ
150
TSTG
-55 ~ 150
Note 1: Devide stressed with ten repetitive ESD pulses, per channel(I/O to GND)
VALUE
PARAMETER
SYMBOL
UNIT
MIN
MAX
VRWM
Reverse Stand-Off Voltage
24
V
(Note 1)
IR = 1 mA
VR = 24 V
IPP = 5 A
IPP = 17 A
Reverse Breakdown Voltage
Reverse Leakage Current
V(BR)
IR
26.7
V
1
µA
40
52
VC
Clamping Voltage
V
(Note 2)
VR = 0 V , f = 1.0 MHz
Junction Capacitance
CJ
50 (Typ.)
pF
Note 1: Other voltages available upon request
Note 2: Non-repetitive currect pulse 8/20μs exponential decay waveform according to IEC61000-4-5
Note 3: Per channel(I/O to GND unless otherwise specified)
Version: E14
Document Number: DS_S1405025
TESDC24V
Taiwan Semiconductor
Small Signal Product
RATINGS AND CHARACTERISTICS CURVES
(TA=25℃ unless otherwise noted)
Fig. 1 Admissible Power Dissipation Curve
Fig. 2 Pulse Waveform
120
110
100
90
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
td = Ipp / 2
0
20
40
60
80
100 120 140 160 180
0
5
10
Time (us)
15
20
25
30
Ambient Temperature (oC)
Fig. 3 Clamping Voltage VS. Peak Pulse Current
Fig. 4 Typical Junction Capacitance
50
60
50
40
30
20
10
0
40
30
20
10
0
f = 1.0 MHz
Waveform parameters:
tr = 8 µs , td = 20 µs
0
1
2
3
4
5
0
2
4
6
8
10
Reverse Voltage (V)
Peak Pulse Current (A)
Fig. 5 Non-Repetitive Peak Pulse Powe VS. Pulse Time
10
1
0.1
0.01
0.1
1.0
10.0
100.0
1000.0
Pulse Duration (us)
Version: E14
Document Number: DS_S1405025
TESDC24V
Taiwan Semiconductor
Small Signal Product
ORDERING INFORMATION
GREEN
COMPOUND
CODE
MANUFACTURE
CODE (Note 1)
PACKING
CODE
PACKAGE
PACKING
MARKING
PART NO.
RR
G
SOD-323
3K / 7" Reel
2H
TESDC24V
Note 1: Indicator of manufacturing site for manufacture special control, if empty means no special control requirement
EXAMPLE
MANUFACTURE
CODE
GREEN COMPOUND
PREFERRED P/N
PACKING CODE
DESCRIPTION
PART NO.
CODE
TESDC24V RRG
RR
RR
G
Green compound
Green compound
TESDC24V
TESDC24V
TESDC24V-E0 RRG
E0
G
Version: E14
Document Number: DS_S1405025
TESDC24V
Taiwan Semiconductor
Small Signal Product
DIMENSIONS
B
Unit (mm)
Min
Unit (inch)
DIM.
Max
1.40
2.70
0.45
1.80
1.00
0.17
Min
0.045
0.091
0.010
0.063
0.031
0.002
Max
0.055
0.106
0.018
0.071
0.039
0.007
A
B
C
D
E
F
1.15
2.30
0.25
1.60
0.80
0.05
C
A
D
E
H
0.475 REF
0.10
0.19 REF
G
H
F
G
-
-
0.004
SUGGESTED PAD LAYOUT
Unit (mm)
Unit (inch)
DIM.
Typ.
0.63
0.83
1.60
2.85
Typ.
0.025
0.033
0.063
0.112
A
B
C
D
APPLICATION INFROMATION
- Designed to protect one data, I/O, or power supply line
- Designed to protect sensitive electronics from damage or latch-up due to ESD
- Designed to replace multilayer varistors (MLVs) in portable applications
- Features large cross-sectional area junctions for conducting high transient currents
- Offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to MLVs
- The combination of small size and high ESD surge capability makes them ideal for use in portable applications
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Good circuit board layout is critical for the suppression of ESD induced transients
- Place the ESD Protection Diode near the input terminals or connectors to restrict transient coupling
- Minimize the path length between the ESD Protection Diode and the protected line
- Minimize all conductive loops including power and ground loops
- The ESD transient return path to ground should be kept as short as possible
- Never run critical signals near board edges
- Use ground planes whenever possible
Version: E14
Document Number: DS_S1405025
TESDC24V
Taiwan Semiconductor
Small Signal Product
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no
responsibility or liability for any errors inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual
property rights is granted by this document. Except as provided in TSC's terms and conditions of sale for such products, TSC assumes
no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or
warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual
property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or seling
these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from
such improper use or sale.
Version: E14
Document Number: DS_S1405025
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