TSM038N04LCP [TSC]

N-Channel Power MOSFET;
TSM038N04LCP
型号: TSM038N04LCP
厂家: TAIWAN SEMICONDUCTOR COMPANY, LTD    TAIWAN SEMICONDUCTOR COMPANY, LTD
描述:

N-Channel Power MOSFET

文件: 总6页 (文件大小:340K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TSM038N04LCP  
Taiwan Semiconductor  
N-Channel Power MOSFET  
40V, 135A, 3.8mΩ  
FEATURES  
KEY PERFORMANCE PARAMETERS  
Low RDS(ON) to minimize conductive losses  
Logic level  
PARAMETER  
VALUE  
UNIT  
VDS  
40  
3.8  
5
V
Low gate charge for fast power switching  
VGS = 10V  
VGS = 4.5V  
100% UIS and Rg tested  
Compliant to RoHS directive 2011/65/EU and in  
accordance to WEEE 2002/96/EC  
RDS(on) (max)  
Qg  
mΩ  
53  
nC  
Halogen-free according to IEC 61249-2-21  
APPLICATIONS  
BLDC Motor Control  
Battery Power Management  
DC-DC converter  
Secondary Synchronous Rectification  
(DPAK)  
TO-252  
Note: MSL 3 (Moisture Sensitivity Level) per J-STD-020  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)  
PARAMETER  
SYMBOL  
VDS  
LIMIT  
UNIT  
Drain-Source Voltage  
40  
V
Gate-Source Voltage  
VGS  
±20  
V
TC = 25°C  
TA = 25°C  
135  
19  
Continuous Drain Current (Note 1)  
Pulsed Drain Current  
Single Pulse Avalanche Current (Note 2)  
Single Pulse Avalanche Energy (Note 2)  
ID  
A
IDM  
IAS  
540  
38  
A
A
EAS  
217  
mJ  
TC = 25°C  
TC = 125°C  
TA = 25°C  
TA = 125°C  
125  
25  
Total Power Dissipation  
Total Power Dissipation  
PD  
W
2.6  
PD  
W
0.5  
Operating Junction and Storage Temperature Range  
TJ, TSTG  
- 55 to +150  
°C  
THERMAL PERFORMANCE  
PARAMETER  
SYMBOL  
RӨJC  
LIMIT  
UNIT  
°C/W  
°C/W  
Junction to Case Thermal Resistance  
1
Junction to Ambient Thermal Resistance  
RӨJA  
49  
Thermal Performance Note: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case-  
thermal reference is defined at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is  
determined by the user’s board design.  
1
Version: A1701  
TSM038N04LCP  
Taiwan Semiconductor  
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)  
PARAMETER  
CONDITIONS  
SYMBOL  
MIN  
TYP  
MAX UNIT  
Static  
Drain-Source Breakdown Voltage  
Gate Threshold Voltage  
Gate-Source Leakage Current  
VGS = 0V, ID = 250µA  
VGS = VDS, ID = 250µA  
VGS = ±20V, VDS = 0V  
VGS = 0V, VDS = 40V  
BVDSS  
VGS(TH)  
IGSS  
40  
1.2  
--  
--  
1.5  
--  
--  
2.5  
±100  
1
V
V
nA  
--  
--  
Drain-Source Leakage Current  
IDSS  
µA  
VGS = 0V, VDS = 40V  
TJ = 125°C  
--  
--  
100  
VGS = 10V, ID = 19A  
VGS = 4.5V, ID = 17A  
--  
--  
2.8  
3.4  
3.8  
5
Drain-Source On-State Resistance  
RDS(on)  
gfs  
mΩ  
(Note 3)  
Forward Transconductance (Note 3)  
--  
55  
--  
S
VDS = 5V, ID = 19A  
Dynamic (Note 4)  
VGS = 10V, VDS = 20V,  
ID = 19A  
Total Gate Charge  
Qg  
--  
104  
--  
Total Gate Charge  
Qg  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
Rg  
--  
--  
53  
14  
--  
--  
nC  
VGS = 4.5V, VDS = 20V,  
ID = 17A  
Gate-Source Charge  
Gate-Drain Charge  
Input Capacitance  
--  
23  
--  
--  
5509  
548  
332  
1.3  
--  
VGS = 0V, VDS = 20V  
f = 1.0MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
--  
--  
pF  
--  
--  
f = 1.0MHz  
0.4  
2.6  
Ω
Switching (Note 4)  
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
td(on)  
tr  
td(off)  
tf  
--  
--  
--  
--  
8
--  
--  
--  
--  
21  
57  
35  
VGS = 10V, VDS = 20V,  
ns  
ID = 19A, RG = 2Ω,  
Source-Drain Diode  
Forward Voltage (Note 3)  
Reverse Recovery Time  
Reverse Recovery Charge  
VSD  
trr  
--  
--  
--  
--  
1
--  
--  
V
VGS = 0V, IS = 19A  
37  
27  
ns  
nC  
IS = 19A ,  
Qrr  
dI/dt = 100A/μs  
Notes:  
1. Silicon limited current only.  
2. L = 0.3mH, VGS = 10V, VDD = 25V, RG = 25Ω, IAS = 38A, Starting TJ = 25°C  
3. Pulse test: Pulse Width ≤ 300µs, duty cycle ≤ 2%.  
4. Switching time is essentially independent of operating temperature.  
ORDERING INFORMATION  
PART NO.  
PACKAGE  
PACKING  
TSM038N04LCP ROG  
TO-252 (DPAK)  
2,500pcs / 13Reel  
2
Version: A1701  
TSM038N04LCP  
Taiwan Semiconductor  
CHARACTERISTICS CURVES  
(TA = 25°C unless otherwise noted)  
Output Characteristics  
Transfer Characteristics  
40  
40  
32  
24  
16  
8
VGS=10V  
VGS=7V  
VGS=5V  
VGS=4.5V  
VGS=4V  
VGS=3.5V  
32  
24  
VGS=3V  
16  
25  
VGS=2.5V  
8
0
150℃  
-55℃  
0
0
1
2
3
4
0
1
2
3
4
VGS, Gate to Source Voltage (V)  
VDS, Drain to Source Voltage (V)  
On-Resistance vs. Drain Current  
Gate-Source Voltage vs. Gate Charge  
0.006  
0.005  
0.004  
0.003  
0.002  
0.001  
0
10  
8
VDS=20V  
ID=19A  
VGS=4.5V  
VGS=10V  
6
4
2
0
0
8
16  
24  
32  
40  
0
20  
40  
60  
80  
100  
120  
Qg, Gate Charge (nC)  
ID, Drain Current (A)  
On-Resistance vs. Junction Temperature  
On-Resistance vs. Gate-Source Voltage  
0.01  
0.008  
0.006  
0.004  
0.002  
0
2
1.8  
1.6  
1.4  
1.2  
1
VGS=10V  
ID=19A  
ID=19A  
0.8  
0.6  
-75 -50 -25  
0
25 50 75 100 125 150  
2
3
4
5
6
7
8
9
10  
TJ, Junction Temperature (°C)  
VGS, Gate to Source Voltage (V)  
3
Version: A1701  
TSM038N04LCP  
Taiwan Semiconductor  
CHARACTERISTICS CURVES  
(TA = 25°C unless otherwise noted)  
BVDSS vs. Junction Temperature  
Capacitance vs. Drain-Source Voltage  
8000  
1.2  
1.1  
1
ID=1mA  
7000  
6000  
CISS  
5000  
4000  
3000  
2000  
0.9  
0.8  
1000  
COSS  
CRSS  
0
0
10  
20  
30  
40  
-75 -50 -25  
0
25 50 75 100 125 150  
VDS, Drain to Source Voltage (V)  
TJ, Junction Temperature (°C)  
Maximum Safe Operating Area, Junction-to-Case  
Source-Drain Diode Forward Current vs. Voltage  
1000  
100  
RDS(ON)  
100  
10  
-55℃  
150℃  
25℃  
10  
1
SINGLE PULSE  
RӨJC=1°C/W  
TC=25°C  
1
0.1  
0.1  
1
10  
100  
0
0.2  
0.4  
0.6  
0.8  
1
VSD, Body Diode Forward Voltage (V)  
VDS, Drain to Source Voltage (V)  
Normalized Thermal Transient Impedance, Junction-to-Case  
10  
SINGLE PULSE  
RӨJC=1°C/W  
1
Duty=0.5  
Duty=0.2  
Duty=0.1  
Duty=0.05  
Duty=0.02  
Duty=0.01  
Single  
0.1  
0.01  
Notes:  
Duty = t1 / t2  
TJ = TC + PDM x ZӨJC x RӨJC  
0.0001  
0.001  
0.01  
0.1  
t, Square Wave Pulse Duration (sec)  
4
Version: A1701  
TSM038N04LCP  
Taiwan Semiconductor  
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)  
TO-252 (DPAK)  
SUGGESTED PAD LAYOUT (Unit: Millimeters)  
MARKING DIAGRAM  
Y
= Year Code  
M = Month Code  
O =Jan  
P =Feb  
T =Jun  
X =Oct  
Q =Mar  
U =Jul  
Y =Nov  
R =Apr  
V =Aug  
Z =Dec  
038N04L  
YML  
S =May  
W =Sep  
L
= Lot Code (1~9, A~Z)  
5
Version: A1701  
TSM038N04LCP  
Taiwan Semiconductor  
Notice  
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,  
assumes no responsibility or liability for any errors or inaccuracies.  
Information contained herein is intended to provide a product description only. No license, express or implied, to  
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of  
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,  
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,  
merchantability, or infringement of any patent, copyright, or other intellectual property right.  
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.  
Customers using or selling these products for use in such applications do so at their own risk and agree to fully  
indemnify TSC for any damages resulting from such improper use or sale.  
6
Version: A1701  

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