TSM4539D [TSC]

Complementary Enhancement MOSFET; 加强互补MOSFET
TSM4539D
型号: TSM4539D
厂家: TAIWAN SEMICONDUCTOR COMPANY, LTD    TAIWAN SEMICONDUCTOR COMPANY, LTD
描述:

Complementary Enhancement MOSFET
加强互补MOSFET

文件: 总4页 (文件大小:73K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TSM4539D  
Complementary Enhancement MOSFET  
SOP-8  
MOSFET PRODUCT SUMMARY  
Pin Definition:  
1. Source 1  
2. Gate 1  
3. Source 2  
4. Gate 2  
8. Drain 1  
7. Drain 1  
6. Drain 2  
5. Drain 2  
VDS (V)  
RDS(on)(m)  
28 @ VGS = 10V  
42 @ VGS = 4.5V  
65 @ VGS = -10V  
90 @ VGS = -4.5V  
ID (A)  
6.5  
N-Channel  
P-Channel  
30  
5.0  
-4.2  
-3.5  
-30  
Block Diagram  
Features  
Advance Trench Process Technology  
High Density Cell Design for Ultra Low On-resistance  
Application  
Load Switch  
PA Switch  
Ordering Information  
Part No.  
Package  
Packing  
TSM4539DCS RLG  
SOP-8  
2.5Kpcs / 13” Reel  
Note: “G” denote for Halogen Free Product  
N-Channel  
P-Channel  
MOSFET Absolute Maximum Rating (TA=25oC unless otherwise noted)  
Parameter  
Symbol  
N-CH Limit  
Unit  
P-CH Limit  
Drain-Source Voltage  
VDS  
VGS  
ID  
30  
±20  
6.5  
28  
-30  
±20  
-4.2  
-20  
-1.9  
2.1  
V
V
Gate-Source Voltage  
Continuous Drain Current, VGS  
Pulsed Drain Current,  
A
IDM  
A
Drain-Source Diode Forward Current  
Power Dissipation @ Ta = 25oC  
Operating Junction Temperature  
Operating Junction and Storage Temperature Range  
IS  
2.5  
2.1  
A
PD  
W
oC  
oC  
TJ  
150  
-55 ~ +150  
TJ, TSTG  
Thermal Performance  
Parameter  
Symbol  
N-CH Limit  
Unit  
oC/W  
oC/W  
P-CH Limit  
Junction to Ambient Thermal Resistance  
RӨ  
62.5  
40  
62.5  
40  
JA  
Junction to Lead Thermal Resistance  
Notes:  
RӨ  
JL  
a. Pulse width limited by the Maximum junction temperature  
b. Surface Mounted on FR4 Board using 1 inch sq pad size, t 5sec.  
c. Surge Applied at Rated Load Conditions, Half-Wave, Single Phase, 60Hz.  
1/4  
Version: A12  
TSM4539D  
Complementary Enhancement MOSFET  
Electrical Specifications (TA=25oC unless otherwise noted)  
Parameter  
Static  
Conditions  
Symbol  
Min  
Typ  
Max Unit  
VGS =0V, ID = 250uA  
VGS =0V, ID =-250uA  
VDS =VGS, ID = 250µA  
VDS =VGS, ID =-250µA  
VGS = ±20V, VDS =0V  
VGS = ±20V, VDS =0V  
VDS =24V, VGS =0V  
VDS =-24V, VGS =0V  
VGS =10V, ID =6.5A  
VGS =-10V, ID =-4.2A  
VGS =4.5V, ID =5A  
N-CH  
30  
-30  
1.0  
-1.0  
--  
--  
--  
--  
V
--  
Drain-Source Breakdown Voltage  
Gate Threshold Voltage  
BVDSS  
VGS(TH)  
IGSS  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
1.4  
-1.5  
--  
3.0  
V
-3.0  
±100  
nA  
Gate Body Leakage  
--  
--  
±10  
--  
--  
1
Zero Gate Voltage Drain Current  
IDSS  
µA  
-1  
--  
--  
--  
23  
50  
35  
82  
28  
--  
65  
Drain-Source On-State  
Resistancea  
RDS(ON)  
mΩ  
42  
--  
VGS =-4.5V, ID =-3.5A  
90  
Dynamicb  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
7
--  
--  
--  
N-Channel  
Total Gate Charge  
Qg  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
VDS =10V, ID =1A,  
VGS =10V  
9.7  
1.6  
1.6  
1.0  
1.3  
610  
100  
77  
Gate-Source Charge  
Gate-Drain Charge  
Input Capacitance  
Output Capacitance  
nC  
pF  
--  
--  
--  
--  
--  
--  
--  
--  
--  
P-Channel  
VDS =-15V, ID =-5.2A,  
VGS =-10V  
N-Channel  
VDS =15V, VGS = 0V,  
f = 1.0MHz  
P-Channel  
551  
90  
VDS =-15V, VGS = 0V,  
f = 1.0MHz  
Reverse Transfer Capacitance  
Switchingb  
60  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
N-CH  
P-CH  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
7
6.2  
10  
6.2  
16  
26  
7
--  
--  
Turn-On Delay Time  
td(on)  
tr  
td(off)  
tf  
N-Channel  
VDD =15V, ID = 1A,  
VGEN =10V, RG = 6Ω  
--  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
--  
nS  
V
--  
P-Channel  
--  
VDD =-15V, ID = -1A,  
--  
VGEN =-10V, RG = 6Ω  
5.5  
--  
--  
IS =1 A, VGS = 0V  
1.0  
-1.3  
Diode Forward Voltage  
VSD  
IS =-1.9A, VGS = 0V  
--  
Notes:  
a. Pulse test: PW 300µS, duty cycle 2%  
b. For DESIGN AID ONLY, not subject to production testing.  
2/4  
Version: A12  
TSM4539D  
Complementary Enhancement MOSFET  
SOP-8 Mechanical Drawing  
SOP-8 DIMENSION  
MILLIMETERS  
INCHES  
MIN  
DIM  
MIN  
4.80  
3.80  
1.35  
0.35  
0.40  
MAX  
5.00  
4.00  
1.75  
0.49  
1.25  
MAX.  
0.196  
0.157  
0.068  
0.019  
0.049  
A
B
C
D
F
0.189  
0.150  
0.054  
0.014  
0.016  
G
K
M
P
R
1.27BSC  
0.05BSC  
0.10  
0º  
0.25  
7º  
0.004  
0º  
0.009  
7º  
5.80  
0.25  
6.20  
0.50  
0.229  
0.010  
0.244  
0.019  
3/4  
Version: A12  
TSM4539D  
Complementary Enhancement MOSFET  
Notice  
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,  
assumes no responsibility or liability for any errors or inaccuracies.  
Information contained herein is intended to provide a product description only. No license, express or implied, to  
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of  
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,  
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,  
merchantability, or infringement of any patent, copyright, or other intellectual property right.  
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.  
Customers using or selling these products for use in such applications do so at their own risk and agree to fully  
indemnify TSC for any damages resulting from such improper use or sale.  
4/4  
Version: A12  

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