SI4156DY [VISHAY]
N-Channel 30-V (D-S) MOSFET; N通道30 -V （D -S ）的MOSFET
| 型号： | SI4156DY |
| 厂家： | 
VISHAY |
| 描述： | N-Channel 30-V (D-S) MOSFET |
| 文件： | 总10页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si4156DY
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET
FEATURES
•
Halogen-free According to IEC 61249-2-21
PRODUCT SUMMARY
Definition
VDS (V)
RDS(on) (Ω)
Qg (Typ.)
I
D (A)a
24
•
•
TrenchFET® Power MOSFET
100 % Rg Tested
0.006 at VGS = 10 V
0.008 at VGS = 4.5 V
30
12 nC
• 100 % UIS Tested
Compliant to RoHS Directive 2002/95/EC
21
•
APPLICATIONS
•
DC/DC Converter
- Notebook Vcore
- POL
SO-8
D
D
D
D
D
S
S
1
2
3
4
8
7
6
5
S
G
G
Top View
S
N-Channel MOSFET
Ordering Information:
Si4156DY-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted
A
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
VDS
VGS
Limit
30
20
Unit
V
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
24
19
15.7b, c
12.5b, c
70
35
61
5
2.1b, c
6
Continuous Drain Current (TJ = 150 °C)
ID
A
Pulsed Drain Current
Avalanche Current
Avalanche Energy
IDM
IAS
EAS
L = 0.1 mH
mJ
A
T
T
C = 25 °C
A = 25 °C
Continuous Source-Drain Diode Current
IS
TC = 25 °C
C = 70 °C
T
3.8
Maximum Power Dissipation
PD
W
2.5b, c
1.6b, c
- 55 to 150
260
TA = 25 °C
TA = 70 °C
TJ, Tstg
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, d
Maximum Junction-to-Foot (Drain)
Symbol
RthJA
RthJF
Typical
37
Maximum
Unit
t ≤ 10 s
Steady State
50
21
°C/W
17
Notes:
a. Based on TC = 25 °C.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. Maximum under Steady State conditions is 81 °C/W.
Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
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1
Si4156DY
Vishay Siliconix
SPECIFICATIONS T = 25 °C, unless otherwise noted
J
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
VDS
ΔVDS/TJ
ΔVGS(th)/TJ
VGS(th)
VGS = 0 V, ID = 250 µA
ID = 250 µA
Drain-Source Breakdown Voltage
30
V
V
DS Temperature Coefficient
24
- 6
mV/°C
VGS(th) Temperature Coefficient
VDS = VGS , ID = 250 µA
Gate-Source Threshold Voltage
Gate-Source Leakage
1.15
50
2.2
100
1
V
IGSS
VDS = 0 V, VGS
=
20 V
nA
VDS = 30 V, VGS = 0 V
DS = 30 V, VGS = 0 V, TJ = 55 °C
VDS ≥ 5 V, VGS = 10 V
IDSS
ID(on)
RDS(on)
gfs
Zero Gate Voltage Drain Current
On-State Drain Currenta
µA
A
V
5
VGS = 10 V, ID = 15.7 A
VGS = 4.5 V, ID = 13.2 A
VDS = 15 V, ID = 15.7 A
0.0048
0.0064
82
0.006
0.008
Drain-Source On-State Resistancea
Ω
S
Forward Transconductancea
Dynamicb
Ciss
Coss
Crss
Input Capacitance
1700
350
140
28
V
DS = 15 V, VGS = 0 V, f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
pF
V
DS = 15 V, VGS = 10 V, ID = 19 A
42
21
Qg
Total Gate Charge
12
nC
Qgs
Qgd
Rg
Gate-Source Charge
5.4
4.6
1.2
25
VDS = 15 V, VGS = 4.5 V, ID = 19 A
Gate-Drain Charge
Gate Resistance
f = 1 MHz
0.2
2.4
40
30
40
25
20
15
40
15
Ω
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
20
V
DD = 15 V, RL = 1.5 Ω
ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω
Turn-Off Delay Time
25
Fall Time
15
ns
Turn-On Delay Time
12
Rise Time
10
V
DD = 15 V, RL = 1.5 Ω
ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω
Turn-Off Delay Time
25
Fall Time
10
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
Body Diode Voltage
IS
ISM
VSD
trr
TC = 25 °C
30
70
1.2
50
35
A
IS = 10 A, VGS = 0 V
0.8
25
17
13
12
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
ns
nC
Qrr
ta
IF = 10 A, dI/dt = 100 A/µs, TJ = 25 °C
ns
tb
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
Si4156DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
70
10
8
V
GS
= 10 V thru 4 V
T
C
= - 55 °C
60
50
40
30
20
10
0
6
T
C
= 25 °C
4
V
= 3 V
= 2 V
GS
2
T
C
= 125 °C
1.5
V
GS
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.5
1.0
2.0
2.5
3.0
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.010
0.008
0.006
0.004
0.002
2100
1800
1500
1200
900
600
300
0
C
iss
V
= 4.5 V
= 10 V
GS
V
GS
C
oss
C
rss
0
10
20
30
40
50
60
70
0
5
10
15
20
25
30
I
- Drain Current (A)
V
DS
- Drain-to-Source Voltage (V)
D
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
10
1.8
1.6
1.4
1.2
1.0
0.8
0.6
V
DS
= 15 V
I
= 19 A
I
= 15.7 A
D
D
8
V
GS
= 10 V, 4.5 V
6
V
DS
= 24 V
4
2
0
0
6
12
18
24
30
- 50 - 25
0
25
50
75
100 125 150
T
J
- Junction Temperature (°C)
Q
g
- Total Gate Charge (nC)
On-Resistance vs. Junction Temperature
Gate Charge
Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
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3
Si4156DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.015
100
10
1
I
= 15.7 A
D
0.012
0.009
0.006
0.003
0.000
T
J
= 25 °C
T
J
= 150 °C
T
J
= 125 °C
T
J
= 25 °C
0
2
4
6
8
10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
- Source-to-Drain Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
50
40
I
= 250 µA
D
30
20
10
0
- 50 - 25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
100
600
T
J
- Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power (Junction-to-Ambient)
100
Limited by RDS(on)
*
100 µs
10
1
1 ms
10 ms
100 ms
1 s
10 s
0.1
DC
BVDSS
TA = 25 °C
Single Pulse
0.01
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
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Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
Si4156DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
6
5
4
3
2
1
0
30
25
20
15
10
5
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
T
C
- Case Temperature (°C)
Current Derating*
Power Derating
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
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5
Si4156DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
P
DM
0.05
t
1
t
2
t
t
1
2
1. Duty Cycle, D =
0.02
2. Per Unit Base = R
= 81 °C/W
thJA
(t)
Z
3. T
- T = P
DM thJA
JM
A
Single Pulse
0.01
4. Surface Mounted
-4
-3
-2
-1
10
10
10
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
10
100
600
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
-4
-3
-2
-1
10
10
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
10
1
10
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?64822.
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6
Document Number: 64822
S09-1220-Rev. A, 29-Jun-09
Package Information
Vishay Siliconix
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
2
5
4
E
H
1
3
S
h x 45
D
C
0.25 mm (Gage Plane)
A
All Leads
0.101 mm
q
e
B
A
1
L
0.004"
MILLIMETERS
Max
INCHES
DIM
A
Min
Min
Max
1.35
0.10
0.35
0.19
4.80
3.80
1.75
0.20
0.51
0.25
5.00
4.00
0.053
0.004
0.014
0.0075
0.189
0.150
0.069
0.008
0.020
0.010
0.196
0.157
A1
B
C
D
E
e
1.27 BSC
0.050 BSC
H
h
5.80
0.25
0.50
0°
6.20
0.50
0.93
8°
0.228
0.010
0.020
0°
0.244
0.020
0.037
8°
L
q
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
Document Number: 71192
11-Sep-06
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1
VISHAY SILICONIX
TrenchFET® Power MOSFETs
Application Note 808
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
Wharton McDaniel
0.288
7.3
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
0.050
1.27
0.088
2.25
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
0.088
2.25
0.027
0.69
0.078
1.98
0.2
5.07
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/ppg?72286), for the
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
Figure 2. Dual MOSFET SO-8 Pad Pattern
With Copper Spreading
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a single MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providing the thermal connection
to the package, this level of connection is inadequate. The
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the
drain pins, the solder mask generation occurs automatically.
0.288
7.3
0.050
1.27
0.196
5.0
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
0.027
0.69
0.078
1.98
0.2
5.07
Figure 1. Single MOSFET SO-8 Pad
Pattern With Copper Spreading
Document Number: 70740
Revision: 18-Jun-07
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1
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-8
0.172
(4.369)
0.028
(0.711)
0.022
0.050
(0.559)
(1.270)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
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22
Document Number: 72606
Revision: 21-Jan-08
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
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the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
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requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
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damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
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Document Number: 91000
Revision: 11-Mar-11
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