SI8415DB [VISHAY]
P-Channel 12-V (D-S) MOSFET; P通道12 -V （D -S ）的MOSFET
| 型号： | SI8415DB |
| 厂家： | 
VISHAY |
| 描述： | P-Channel 12-V (D-S) MOSFET |
| 文件： | 总6页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si8415DB
Vishay Siliconix
New Product
P-Channel 12-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
D TrenchFETr Power MOSFET
VDS (V)
rDS(on) (W)
ID (A)
Qg (Typ)
D New MICRO FOOTr Chipscale Packaging
Reduces Footprint Area Profile (0.62 mm) and
On-Resistance Per Footprint Area
0.037 @ V = −4.5 V
−7.3
−6.6
−5.8
GS
−12
19
0.046 @ V = −2.5
V
V
GS
D Ultra-Low On-Resistance
APPLICATIONS
0.060 @ V = −1.8
GS
D Load Switch, Charger Switch, and PA Switch for
Portable Devices
S
MICRO FOOT
Bump Side View
Backside View
G
3
4
2
D
S
D
G
8415
xxx
Device Marking: 8415
xxx = Date/Lot Traceability Code
D
Ordering Information: Si8415DB-T1—E1
1
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (T = 25_C UNLESS OTHERWISE NOTED)
A
Parameter
Symbol
5 secs
Steady State
Unit
Drain-Source Voltage
Gate-Source Voltage
V
−12
DS
V
V
GS
"8
T
= 25_C
= 70_C
−5.3
−4.3
−7.3
−5.9
A
a
Continuous Drain Current (T = 150_C)
I
D
J
T
A
A
Pulsed Drain Current
I
DM
−25
a
Continuous Source Current (Diode Conduction)
I
−2.5
2.77
1.77
−1.3
1.47
0.94
S
T
= 25_C
= 70_C
A
a
Maximum Power Dissipation
P
W
D
T
A
Operating Junction and Storage Temperature Range
T , T
−55 to 150
215
J
stg
VPR
_C
b
Package Reflow Conditions
IR/Convection
220
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
t v 5 sec
Steady State
Steady State
35
72
16
45
85
20
a
Maximum Junction-to-Ambient
R
R
thJA
_C/W
Maximum Junction-to-Foot (drain)
thJF
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
1
Si8415DB
New Product
Vishay Siliconix
b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering.
SPECIFICATIONS (T = 25_C UNLESS OTHERWISE NOTED)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Static
Gate Threshold Voltage
Gate-Body Leakage
V
V
= V , I = −250 mA
−0.4
−1
V
GS(th)
DS
GS
D
I
V
= 0 V, V = "8 V
"100
nA
GSS
DS
GS
V
= −12 V, V = 0 V
−1
−5
DS
GS
Zero Gate Voltage Drain Current
I
mA
DSS
V
DS
= −12 V, V = 0 V, T = 70_C
GS
J
a
On-State Drain Current
I
V
DS
v −5 V, V = −4.5 V
−5
A
D(on)
GS
V
= −4.5 V, I = −1 A
0.031
0.038
0.050
0.037
0.046
0.060
GS
D
a
V
= −2.5 V, I = −1 A
Drain-Source On-State Resistance
r
W
GS
D
DS(on)
V
= −1.8 V, I = −1 A
GS
D
a
Forward Transconductance
g
11
S
V
V
= −10 V, I = −1 A
fs
DS
D
a
Diode Forward Voltage
V
SD
I
= −1 A, V = 0 V
−0.8
−1.1
S
GS
Dynamicb
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Q
19
1.9
4.8
19
30
g
Q
Q
V
= −6 V, V = −4.5 V, I = −1 A
nC
gs
gd
DS
GS
D
R
g
f = 1 MHz
W
t
15
25
50
d(on)
t
r
32
V
= −6 V, R = 6 W
L
GEN g
DD
I
D
^ −1 A, V
= −4.5 V, R = 6 W
Turn-Off Delay Time
Fall Time
t
180
115
80
270
175
120
ns
d(off)
t
f
Source-Drain Reverse Recovery Time
t
rr
I = −1 A, di/dt = 100 A/ms
F
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Characteristics
Transfer Characteristics
25
25
20
15
10
5
V
GS
= 5 thru 2.5 V
2 V
20
15
10
5
1.5 V
1 V
T
= 125_C
C
25_C
−55_C
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.5
1.0
1.5
2.0
2.5
V
DS
− Drain-to-Source Voltage (V)
V
GS
− Gate-to-Source Voltage (V)
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
2
Si8415DB
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Drain Current
Capacitance
0.12
2500
2000
1500
1000
500
0.10
0.08
C
iss
V
GS
= 1.8 V
0.06
0.04
0.02
0.00
V
V
= 2.5 V
= 4.5 V
GS
C
oss
GS
C
rss
0
0
5
10
15
20
25
0
2
4
6
8
10
12
I
D
− Drain Current (A)
V
DS
− Drain-to-Source Voltage (V)
Gate Charge
On-Resistance vs. Junction Temperature
5
4
3
2
1
0
1.4
1.3
1.2
1.1
1.0
0.9
0.8
V
D
= 6 V
V
GS
= 4.5 V
DS
I
= 1 A
I = 1 A
D
0
5
10
15
20
25
−50 −25
0
25
50
75
100 125 150
Q
− Total Gate Charge (nC)
T
− Junction Temperature (_C)
g
J
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.10
0.08
0.06
0.04
0.02
0.00
30
T
= 150_C
J
10
I
D
= 1 A
T
= 25_C
J
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
1
2
3
4
5
V
SD
− Source-to-Drain Voltage (V)
V
GS
− Gate-to-Source Voltage (V)
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
3
Si8415DB
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Threshold Voltage
Single Pulse Power, Juncion-To-Ambient
0.4
80
60
I
D
= 250 mA
0.3
0.2
0.1
40
20
0.0
−0.1
−0.2
0
−50 −25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
100
600
T
− Temperature (_C)
Time (sec)
J
Safe Operating Area
100
*r
I
Limited
DM
Limited
DS(on)
10
P(t) = 0.001
P(t) = 0.01
1
I
D(on)
Limited
P(t) = 0.1
P(t) = 1
P(t) = 10
dc
T
= 25_C
A
0.1
Single Pulse
BV
DSS
Limited
0.01
0.1
1
10
100
V
− Drain-to-Source Voltage (V)
DS
*V u minimum V at which r is specified
DS(on)
GS
GS
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
1
Duty Cycle = 0.5
0.2
0.1
Notes:
P
DM
0.1
0.05
0.02
t
1
t
2
t
t
1
2
1. Duty Cycle, D =
2. Per Unit Base = R
= 72_C/W
thJA
(t)
3. T − T = P
Z
JM
A
DM thJA
Single Pulse
4. Surface Mounted
0.01
−4
−3
−2
−1
10
10
10
10
1
10
100
600
Square Wave Pulse Duration (sec)
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
4
Si8415DB
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Normalized Thermal Transient Impedance, Junction-to-Foot
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
−4
−3
−2
−1
10
10
10
10
1
10
Square Wave Pulse Duration (sec)
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
5
Si8415DB
New Product
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 X 2, 0.8-mm PITCH)
4 O 0.30 X 0.31
Note 3
Solder Mask O X 0.40
e
A
A
2
Silicon
A
1
Bump Note 2
b Diamerter
e
S
e
Recommended Land
E
8415
XXX
e
S
D
Mark on Backside of Die
NOTES (Unless Otherwise Specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are Eutectic solder 63/57 Sn/Pb.
3. Non-solder mask defined copper landing pad.
4. The flat side of wafers is oriented at the bottom.
MILLIMETERS*
INCHES
Dim
Min
Max
Min
Max
0.600
0.260
0.340
0.370
1.520
1.520
0.750
0.370
0.650
0.290
0.360
0.410
1.600
1.600
0.850
0.380
0.0236
0.0102
0.0134
0.0146
0.0598
0.0598
0.0295
0.0146
0.0256
0.0114
0.0142
0.0161
0.0630
0.0630
0.0335
0.0150
A
A1
A2
b
D
E
e
S
* Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?73210.
Document Number: 73210
S-50037—Rev. A, 17-Jan-05
www.vishay.com
6
相关型号：
SI8417DB-T2-E1
Small Signal Field-Effect Transistor, 0.0097A I(D), 12V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, 2.40 X 2 MM, ROHS COMPLIANT, ULTRA SMALL, MICRO FOOT, 4 PIN
VISHAY
©2020 ICPDF网 联系我们和版权申明