TFDS4400-TR3 [VISHAY]
SIR Transceiver Module (115.2 kbit/s) 2.7 V to 5.5 V; SIR收发器模块（ 115.2 kbit / s的） 2.7 V至5.5 V
| 型号： | TFDS4400-TR3 |
| 厂家： | 
VISHAY |
| 描述： | SIR Transceiver Module (115.2 kbit/s) 2.7 V to 5.5 V |
| 文件： | 总14页 (文件大小：480K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TFDS4400
Vishay Semiconductors
SIR Transceiver Module (115.2 kbit/s)
2.7 V to 5.5 V
Description
The TFDS4400 is a low–power infrared transceiver 1.8 mm and nevertheless offering a full 1m IrDA 1.2
module compliant to the IrDA physical layer standard transmission range. The transceiver is capable of
for infrared data communication, supporting IrDA directly interfacing with a wide variety of I/O chips
speeds up to 115.2 kbit/s (SIR), HP-SIR, and carrier which perform the modulation/demodulation function,
based remote control modes up to 100 kHz. Integrated including National Semiconductor’s PC87338,
within the transceiver module are a photo PIN diode, PC87108 and PC87109, SMC’s FDC37C669,
infrared emitter (IRED), and a low–power control IC to FDC37N769 and CAM35C44, and Hitachi’s SH3. At a
provide a total front–end solution in a single package. minimum, a current– limiting resistor in series with the
Vishay
Semiconductors
TFDS4400
transceiver infrared emitter and a V
bypass capacitor are the
CC
represents a novel package option enabling a only external components required to implement a
minimized package height over the PCB of only complete solution.
FD eCaotmuprleiasntto the latest IrDA physical layer standard
D Power Sleep Mode Through V
CC1
(Up to 115.2 kbit/s),
(5 nA Sleep Current)
HP–SIR , Sharp ASK and TV Remote
D Electrically identical to the TFDU4100 device
D High Efficiency Emitter
D For Sunk Mounting at the PCB Edge
–
1.8 mm Height over Board
D Directly Interfaces with Various Super I/O and
Controller Devices
D Operating 2.7 V to 5.5 V Applications
D Built–In EMI Protection – No External Shielding
Necessary
D Low–Power Consumption
1.0 (1.3) mA Supply Current @ 3 V (5 V)
D Few External Components Required
AD pTpeleliccoamtmiounnicsation Products
D Digital Still and Video Cameras
(Cellular Phones, Pagers)
D External Infrared Adapters (Dongles)
D Medical and Industrial Data Collection
D Computers (Win CE, Palm PC), PDAs
Package
TFDS4400
Dracula
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1 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Ordering Information
Part Number
TFDS4400–TR3
Qty / Reel
1000 pcs
Description
FunctionalBlock Diagram
VCC1/SD
VCC2
Driver
Rxd
Comparator
Amplifier
R1
IRED Anode
AGC
Logic
SC
Txd
IRED Cathode
Open Collector Driver
14876
GND
Figure 1. Functional Block Diagram
Pin Description
Pin Number
1
Function
Description
I/O
Active
IRED Anode IRED Anode, should be externally connected to V
through a current control resistor
CC2
2
3
4
IRED Cathode IRED Cathode, internally connected to driver transistor
Txd
Rxd
Transmit Data Input
I
O
HIGH
LOW
Received Data Output, open collector. No external
pull–up or pull–down resistor is required (20 kW resistor
internal to device). Pin is inactive during transmission.
5
6
7
8
NC
Do not connect, reserved for future features
Supply Voltage
Sensitivity control, increases sensitivity when active
Ground
V
CC1
SC
GND
I
HIGH
1 2 3 4 5 6 7 8
Figure 2. Pinning
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2 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Absolute Maximum Ratings
Reference point Pin GND unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Supply Voltage Range
Test Conditions
Symbol
Min.
– 0.5
– 0.5
Typ.
Max.
6
6
Unit
V
V
0 V ≤ V
0 V ≤ V
≤ 6 V
≤ 6 V
V
V
CC2
CC1
CC1
CC2
Input Currents
For all Pins,
10
mA
except IRED Anode Pin
Output Sink Current
Power Dissipation
Junction Temperature
Ambient Temperature
Range (Operating)
Storage Temperature
Range
25
mA
mW
°C
See Derating Curve
P
T
J
T
amb
200
125
+85
D
–25
–25
°C
T
stg
+85
240
°C
°C
Soldering Temperature
See Recommended
Solder Profile
215
Average IRED Current
Repetitive Pulsed IRED
Current
I
I
(DC)
(RP)
100
500
mA
mA
IRED
t < 90 µs, t < 20%
on
IRED
IRED Anode Voltage
Transmitter Data Input
Voltage
Receiver Data Output
Voltage
Virtual Source Size
V
V
– 0.5
– 0.5
6
V
V
IREDA
V
V
+0.5
CC1
Txd
V
– 0.5
2.5
+0.5
CC1
V
Rxd
Method:
d
2.8
mm
(1–1/e) encircled energy
Maximum Intensity for
Class 1 Operation of
IEC825–1 or EN60825–1
(worst case IrDA SIR
pulse pattern *)
EN60825, 1997
400
mW/sr
*)
Note:
Transmitteddata:continuouslytransmitted“0”. Innormaldatatransferoperation“0”and“1”willbetransmitted
withthesameprobability. Therefore, for that case, about a factor of two of safety margin is included. However,
for worst case thermal stress testing such data pattern are often used and for this case the 400 mW/sr value
has to be taken.
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3 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
ElectricalCharacteristics
T
= 25_C, V = 2.7 V to 5.5 V unless otherwise noted.
amb
CC
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Transceiver
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Supply Voltage
Receive Mode
V
2.7
2.0
5.5
5.5
V
V
CC1
Transmit Mode, R2 = 47 W
(see Recommended Applica-
tion Circuit)
Supply Current Pin V
(Receive Mode)
V
V
= 5.5 V
= 2.7 V
I
CC1 (Rx)
1.3
1.0
2.5
1.5
mA
mA
CC1
CC1
CC1
Supply Current Pin V
I
= 210 mA
CC1
IRED
(avg) (Transmit Mode)
(at IRED Anode Pin)
V
V
= 5.5 V
= 2.7 V
I
5.0
3.5
5.5
4.5
mA
mA
CC1
CC1
CC1 (Tx)
Leakage Current of IR
Emitter, IRED Anode Pin V
V
= OFF, T = LOW,
= 6 V, T = 25 to 85°C
I
L (IREDA)
0.005
0.5
µA
CC1
CC2
XD
Transceiver Power On
Settling Time
T
PON
50
µs
OptoelectronicCharacteristics
T
= 25_C, V = 2.7 V to 5.5 V unless otherwise noted.
amb
CC
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Receiver
Minimum Detection BER = 10 (IrDA Specification)
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
–8
2
2
Threshold Irradiance
a = ±15°, SIR Mode, SC = LOW
a = ±15°, SIR Mode, SC = HIGH
E
E
E
E
E
20
10
5
35
15
mW/m
mW/m
kW/m
kW/m
mW/m
e
e
e
e
e
6
3.3
8
2
Maximum Detection a = ±90°, SIR Mode, V
Threshold Irradiance
= 5 V
= 3 V
CC1
CC1
2
a = ±90°, SIR Mode, V
15
2
Logic LOW Receiver SC = HIGH or LOW
Input Irradiance
4
Output Voltage –
Rxd
Active, C = 15 pF, R = 2.2 kW
Non–active, C = 15 pF, R = 2.2 kW
V
V
I
0.5
4
0.8
V
V
mA
OL
OH
OL
V
–0.5
CC1
Output Current –
Rxd
V
< 0.8 V
OL
Rise Time – Rxd
Fall Time – Rxd
Pulse Width – Rxd
Output
C = 15 pF, R = 2.2 kW
C = 15 pF, R = 2.2 kW
Input pulse width = 1.6 µs,
t
t
20
20
1.41
1400
200
8
ns
ns
µs
r (Rxd)
f (Rxd)
t
PW
115.2 kbit/s
Jitter, Leading Edge Over a Period of 10 bit, 115.2 kbit/s
of Output Signal
Latency
t
2
µs
µs
i
t
100
500
L
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4 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
OptoelectronicCharacteristics
T
= 25_C, V = 2.7 V to 5.5 V unless otherwise noted.
amb
CC
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Transmitter
IRED Operating
Current
Test Conditions
Symbol
Min.
Typ.
0.2
Max.
0.28
Unit
A
IRED Operating Current can be
adjusted by Variation of R1.
Current Limiting Resistor is in
Series to IRED:
I
IRED
R1 = 14 Ω, V
= 5.0 V
CC2
Logic LOW Trans-
mitter Input Voltage
Logic HIGH Trans-
mitter Input Voltage
Output Radiant In-
tensity
V
(Txd)
(Txd)
0
0.8
V
V
IL
V
2.4
45
V
+0.5
CC1
IH
In Agreement with IEC825 Eye
Safety Limit, if
I
140
200
mW/sr
e
Current Limiting Resistor is in
Series to IRED:
R1 = 14 Ω, V
α = ±15_
= 5.0 V,
CC2
Txd Logic LOW Level
I
a
0.04
900
mW/sr
e
Angle of Half
Intensity
Peak Wavelength of
Emission
Half–Width of
Emission Spectrum
±24
_
l
880
nm
nm
ns
P
60
Optical Rise Time,
Fall Time
t
200
600
ropt,
t
fopt
Optical Overshoot
25
%
Rising Edge Peak– Over a Period of 10 bits,
to-Peak Jitter of Independent of
0.2
ms
Optical Output Pulse Information content
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5 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Recommended Circuit Diagram
480
440
400
360
320
280
240
200
160
120
80
The only required components for designing an
IrDA 1.2 compatible design using Vishay SIR
V
cc
= 5.25 V,
max. efficiency, center,
min. V , min. V
transceivers are a current limiting resistor to the IRED.
However, depending on the entire system design and
board layout, additional components may be required
(see figure KEIN MERKER). It is recommended that
the capacitors C1 and C2 are positioned as near as
possible to the transceiver power supply pins. A tanta-
lum capacitor should be used for C1, while a ceramic
capacitor should be used for C2 to suppress RF noise.
Also, when connecting the described circuit to the
power supply, low impedance wiring should be used.
F
CEsat
V
cc
= 4.75 V, min. efficiency,
V
CC2
15° off axis, max. V , max. V
F
CEsat
R1
V
CC1
IRED
IRED
Anode
40
Cathode
R2
0
Rxd
Rxd
Txd
6
8
10
12
14
16
TFDx4x00
Current Control Resistor ( W )
V
/SD
SC
NC
14377
CC1
C1
C2
Figure 4. Ie vs. R1
GND
GND
760
720
680
640
600
560
520
480
440
400
360
320
280
240
200
160
120
80
SC
V
=3.3V, max. intensity on
cc
Txd
axis, min. V , min. V
F
CEsat
Note: outlined components are optional depending
on the quality of the power supply
Figure 3. Recommended Application Circuit
R1 is used for controlling the current through the IR
emitter. For increasing the output power of the IRED,
the value of the resistor should be reduced. Similarly,
to reduce the output power of the IRED, the value of
the resistor should be increased. For typical values of
R1 (see figures 4 and 5), e.g. for IrDA compliant
operation (V
= 5 V ± 5%), a current control resistor
CC2
of 14 Ω is recommended. The upper drive current
limitation is dependent on the duty cycle and is given
by the absolute maximum ratings on the data sheet
and the eye safety limitations given by IEC825–1.
R2, C1 and C2 are optional and dependent on the
V
=2.7V, min. intensity
"15° off axis, max. V , max. V
cc
F
CEsat
40
0
quality of the supply voltage V
and injected noise.
CC1
0
1
2
3
4
5
6
7
8
Anunstablepowersupplywithdroppingvoltageduring
transmission may reduce sensitivity (and transmission
range) of the transceiver.
Serial Resistor ( W )
14378
Figure 5. Ie vs. R1
Table 1. Recommended Application Circuit Components
Component
Recommended Value
4.7 mF, Tantalum
0.1 µF, Ceramic
14 Ω, 0.25 W (recommended using
two 7 Ω, 0.125 W resistors in series)
47 Ω , 0.125 W
Vishay Part Number
293D 475X9 016B 2T
VJ 1206 Y 104 J XXMT
C1
C2
R1
CRCW–1206–6R98–F–RT1
CRCW–1206–47R0–F–RT1
R2
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6 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
The sensitivity control (SC) pin allows the minimum interface circuit is designed for this shutdown feature.
detection irradiance threshold of the transceiver to be The V , S0 or S1 outputs on the TOIM3232 can
CC_SD
lowered when set to a logic HIGH. Lowering the be used to power the transceiver with the necessary
irradiance threshold increases the sensitivity to supply current.
infrared signals and increases transmission range up
If the microcontroller or the microprocessor is unable
to 3 meters. However, setting the Pin SC to logic HIGH
to drive the supply current required by the transceiver,
also makes the transceiver more susceptable to
a low–cost SOT23 pnp transistor can beusedtoswitch
transmission errors due to an increased sensitivity to
voltage on and off from the regulated power supply
fluorescent light disturbances. It is recommended to
(see figure 7). The additional component cost is
set the Pin SC to logic LOW or left openiftheincreased
minimal and saves the system designer additional
range is not required or if the system will be operating
power supply costs.
in bright ambient light.
As external filter, only a capacitor is recommended.
The guide pins on the side-view and top-view pack-
I
IRED
ages are internally connected to ground but should not
be connected to the system ground to avoid ground
loops. They should be used for mechanical purposes
only and should be left floating.
+
–
Power
Supply
RegulatedPowerSupply
50 mA
R1
IRED
Anode
Shutdown
Microcontrolleror
Microprocessor
20 mA
The internal switch for the IRED in Vishay SIR
transceivers is designed to be operated like an open
I
S
V /SD
CC1
collector driver. Thus, the V
unregulated power supply while only a well regulated
power source with a supply current of 1.3 mA
source can be an
cc2
TFDU4100(Note: Typical ValuesListed)
ReceiveMode
@ 5 V: I
= 210 mA, I = 1.3 mA
IRED
S
connected to V /SD is needed to provide power to
CC1
@ 2.7 V: I
= 210 mA, I = 1.0 mA
S
IRED
the remainder of the transceiver circuitry in receive
mode. In transmit mode, this current is slightly higher
(approximately 4 mA average at 3 V supply current)
and the voltage is not required to be kept as stable as
TransmitMode
@ 5 V: I = 210 mA, I = 5 mA (Avg.)
IRED
S
14878
@ 2.7 V: I
= 210 mA, I = 3.5 mA (Avg.)
IRED
S
Figure 6.
in receive mode. A voltage drop of V
is acceptable
CC1
I
down to about 2.0 V when bufferingthevoltagedirectly
from the Pin V to GND see figure 3.
IRED
CC1
+
–
Power
Supply
This configuration minimizes the influence of high
current surges from the IRED on the internal analog
control circuitry of the transceiver and the application
circuit. Also board space and cost savings can be
achieved by eliminating the additional linear regulator
normally needed for the IRED’s high current
requirements.
RegulatedPowerSupply
50 mA
R1
IRED
Anode
Microcontrolleror
Microprocessor
20 mA
I
S
V /SD
CC1
The transceiver can be very efficiently shutdown by
keepingthe IRED connected to the power supply V
CC2
TFDU4100 (Note: Typical ValuesListed)
ReceiveMode
but switching off V
/SD. The power source to
CC1
V
/SD can be provided directly from
CC1
a
@ 5 V: I
= 210 mA, I = 1.3 mA
IRED
S
@ 2.7 V: I
TransmitMode
= 210 mA, I = 1.0 mA
microcontroller (see figure 6). In shutdown, current
loss is realized only as leakage current through the
current limiting resistor to the IRED (typically 5 nA).
IRED
S
@ 5 V: I
= 210 mA, I = 5 mA (Avg.)
IRED
S
@ 2.7 V: I
= 210 mA, I = 3.5 mA (Avg.)
IRED
S
14879
The settling time after switching V
/SD on again is
CC1
approximately 50 ms. Vishay TOIM3232
Figure 7.
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7 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Recommended SMD Pad Layout
The leads of the device should be soldered in the center position of the pads.
Figure 8. TFDS4400 (Dracula)
Note: Leads of the device should be at least 0.3 mm within the ends of the pads.
Recommended Solder Profile.
Recommended Solder Profile
Current Derating Diagram
600
500
400
300
240
10 s
max. @
230°C
210
2 - 4°C/s
180
150
120
120 - 180 s
90 s max.
90
60
30
0
Current derating as a function of
the maximum forward current of
IRED. Maximum duty cycle: 25%.
200
2 - 4°C/s
100
0
–40 –20
0
20 40 60 80 100 120 140
Temperature( 5C )
0
50 100 150 200 250 300 350
Time ( s )
14874
14880
Figure 9. Recommended Solder Profile
Figure 10. Current Derating Diagram
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8 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
TFDS4400Package (Mechanical Dimensions)
15971
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9 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Shape of Reel and Dimensions
W
1
Reel Hub
W
2
14017
Version
C
Tape Width
24
A
N
W
W
2 max
1
330 ± 1
100 + 1.5
24.4 + 2
30.4
Tape Dimensions
15182
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10 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Leader and Trailer
Trailer
Leader
no devices
devices
no devices
End
Start
min. 200
min. 400
96 11818
Figure 11. Leader and trailer
Cover Tape Peel Strength
According to IEC 286
0.1 N to 1.3 N
300 ± 10% mm/min
165° – 180° peel angle
Label
Standard bar code labels for finished goods
The standard bar code labels are product labels and
used for identification of goods.The finished goods are
packed in final packing area. The standard packing
units are labeled with standard bar code labels before
transported as finished goods to warehouses. The
labels are on each packing unit and contain Vishay
Semiconductor GmbH specific data.
Vishay Semiconductor GmbH standard bar code product label (finished goods)
Plain Writing
Item-Description
Abbreviation
–
Length
18
Item-Number
Selection-Code
LOT-/ Serial-Number
Data-Code
INO
SEL
BATCH
COD
8
3
10
3 (YWW)
Plant-Code
PTC
2
Quantity
QTY
8
Accepted by:
Packed by:
ACC
PCK
–
–
Mixed Code Indicator
Origin
MIXED CODE
xxxxxxx+
–
Company logo
Long Bar Code Top
Item-Number
Plant-Code
Type
N
N
Length
8
2
Sequence-Number
Quantity
X
N
3
8
Total Length
–
21
Short Bar Code Bottom
Selection-Code
Date-Code
Batch-Number
Filler
Type
Length
X
N
X
–
3
3
10
1
Total Length
–
17
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11 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Dry Packing
The reel is packed in an anti–humidity bag to protect
the devices from absorbing moisture during
transportation and storage.
Aluminiumbag
Label
Reel
15973
Final Packing
The sealed reel is packed into a cardboard box, which
is345 345 40 mm in size. A secondary cardboard
box is used for shipping purposes, with the following
size contents:
Example of JESD22–A112 Level 4 label
ESD Precaution
Size
Quantity of boxes
(345 345 40 mm)
Proper storage and handling procedures should be
followed to prevent ESD damage to the devices
especially when they are removed from the Antistatic
Shielding Bag. Electro–Static Sensitive Devices
warning labels are on the packaging.
(Length Width Heights)
390 390 250 mm
390 390 250 mm
1
6
Vishay Semiconductors Standard
Bar-Code Labels
The Vishay Semiconductors standard bar-code labels are
printed at final packing areas. The labels are on each
packing unit and contain Vishay Semiconductors specific
data.
Recommended Method of
Storage
Dry box storage is recommended as soon as the
aluminium bag has been opened to prevent moisture
absorption. The following conditions should be
observed, if dry boxes are not available:
D Storage temperature 10°C to 30°C
D Storage humidity ≤ 60% RH max.
After more than 72 hours under these conditions mois-
ture content will be too high for reflow soldering.
In caseofmoistureabsorption, thedeviceswillrecover
to the former condition by drying under the following
condition:
192 hours at 40°C +5°C/ –0°C and <5% RH
(dry air/ nitrogen) or
96 hours at 60°C +5°C and <5% RH
for all device containers or
24 hours at 125°C +5°C
not suitable for reel or tubes.
An EIA JEDEC Standard JESD22–A112 Level 4 label
is included on all aluminium bags
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12 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Revision History:
A1.2, 06/05/1999: First released edition
A1.4, 18/08/1999: p1:Description and applications corr., p2: pinning added
A1.5, 31/05/2000 Packing and storage information added
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13 (14)
DocumentNumber82524
Rev. A1.5,31-May-00
TFDS4400
Vishay Semiconductors
Ozone Depleting Substances Policy Statement
It is the policy of VishaySemiconductorGmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating
systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbidtheir use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
VishaySemiconductorGmbH has been able to use its policy of continuous improvements to eliminate the use of
ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitionalsubstances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substancesand do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer application
by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the
buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or
indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
www.vishay.com
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DocumentNumber82524
Rev. A1.5,31-May-00
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