概述
规格参数
数据手册
替代型号1ED020I12FA 概述
Single IGBT Driver IC 单IGBT驱动器IC MOSFET 驱动器
1ED020I12FA 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Obsolete | 零件包装代码： | SOIC |
| 包装说明： | SOP, SOP20,.4 | 针数： | 20 |
| Reach Compliance Code： | compliant | ECCN代码： | EAR99 |
| HTS代码： | 8542.39.00.01 | 风险等级： | 5.52 |
| Is Samacsys： | N | 高边驱动器： | YES |
| 接口集成电路类型： | HALF BRIDGE BASED IGBT DRIVER | JESD-30 代码： | R-PDSO-G20 |
| JESD-609代码： | e4 | 长度： | 12.8 mm |
| 湿度敏感等级： | 3 | 功能数量： | 1 |
| 端子数量： | 20 | 最高工作温度： | 125 °C |
| 最低工作温度： | -40 °C | 标称输出峰值电流： | 2 A |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装等效代码： | SOP20,.4 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 峰值回流温度（摄氏度）： | NOT SPECIFIED |
| 电源： | -8,5,15 V | 认证状态： | Not Qualified |
| 座面最大高度： | 2.65 mm | 子类别： | Peripheral Drivers |
| 最大供电电压： | 5.5 V | 最小供电电压： | 4.5 V |
| 标称供电电压： | 5 V | 表面贴装： | YES |
| 温度等级： | AUTOMOTIVE | 端子面层： | Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) |
| 端子形式： | GULL WING | 端子节距： | 1.27 mm |
| 端子位置： | DUAL | 处于峰值回流温度下的最长时间： | NOT SPECIFIED |
| 断开时间： | 0.185 µs | 接通时间： | 0.75 µs |
| 宽度： | 7.62 mm | Base Number Matches： | 1 |
1ED020I12FA 数据手册
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PDF下载Datasheet, Version 2.1, November 2009
EICEDRIVER®
1ED020I12FA
Single IGBT Driver IC
Power Management & Drives
N e v e r s t o p t h i n k i n g .
1ED020I12FA
Revision History:
2009-11-24
Version 2.1
Previous Version:
2.0
Page
14
Subjects (major changes since last revision)
Update table No 4.4.6 Dynamic Characteristics
Edition 2009-11-24
Published by Infineon Technologies AG,
Campeon 1-12,
85579 Neubiberg, Germany
© Infineon Technologies AG 2009.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question please
contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended
to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other persons may be endangered.
EICEDRIVER®
1ED020I12FA
Single IGBT Driver IC
Product Highlights
•
•
•
•
•
•
Coreless transformer isolated driver
Galvanic Insulation
Integrated protection features
Suitable for operation at high ambient temperature
Cost effective technology
Automotive Qualified
Features
Typical
Application
•
•
•
•
•
Single channel isolated IGBT Driver
For 600V/1200V IGBTs
2A rail-to-rail output
Vcesat-detection
•
•
•
•
AC and Brushless DC Motor Drives
High Voltage DC/DC-Converter
UPS-Systems
Active Miller Clamp
Welding
VCC1
VCC2,H
DESAT
OUT
IN+, IN-, /RST
EiceDRIVERTM
1ED020I12FA
/FLT, RDY
CLAMP
VEE2,H GND2,H
CPU
VCC2,L
DESAT
IN+, IN-, /RST
/FLT, RDY
OUT
EiceDRIVERTM
1ED020I12FA
CLAMP
GND1
VEE2,L GND2,L
Figure 1: Typical Application
Type
Gate drive current
Package
1ED020I12FA
+/- 2A
PG-DSO-20-55
Datasheet
3
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Table of Contents
Page
1
Blockdiagram and Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
READY status output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Active Miller Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.4
2.5
2.5.1
2.5.2
2.5.3
2.6
3
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
3.2
4
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Voltage Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Desaturation protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1
4.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.4.7
4.4.8
5
Insulation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
According to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation . . . . . . . . . . . . . . . . . . . . . . . . 16
According to UL 1577) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1
5.2
5.3
6
7
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.1
8.2
Datasheet
4
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
1
Blockdiagram and Application
GND1
VEE2
11
10
9
8
7
6
5
4
3
2
1
K4
2V
12
13
14
15
16
17
18
19
20
GND1
IN+
VEE2
CLAMP
&
0
0
∆t
∆t
0
CLAMP
VCC2
VEE2
/RST
RX
LOGIC
TX
RX
VEE2
LOGIC
OUT
IN-
/FLT
VCC2
NC
RDY
/FLT
UVLO
TX
UVLO
GND2
DESAT
VEE2
VEE2
/RST
DESAT
LOGIC
LOGIC
I3
R
K3
VCC1
GND1
9V
GND2
GND1
Figure 2: Blockdiagram 1ED020I12FA
1ED020I12FA
Figure 3: Application example
Datasheet
5
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
2
Functional Description
2.1
Introduction
2.2.2
READY status output
The READY output shows the status of three internal
The 1ED020I12FA is an advanced IGBT gate driver that can
be also used for driving power MOS devices. Control and
protection functions are included to make possible the design
of high reliability systems.
The device consists of two galvanic separated parts. The
input chip can be directly connected to a standard 5V DSP or
microcontroller with CMOS in/output and the output chip is
connected to the high voltage side.
protection features.
•
•
•
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission
It is not necessary to reset the READY signal since its state
only depends on the status of the former mentioned
protection signals.
An effective active Miller clamp function avoids the need of
negative gate driving in most applications and allows the use
of a simple bootstrap supply for the high side driver.
A rail-to-rail driver output enables the user to provide easy
clamping of the IGBTs gate voltage during short circuit of
the IGBT. So an increase of short circuit current due to the
feedback via the Miller capacitance can be avoided. Further,
a rail-to-rail output reduces power dissipation.
2.2.3
Watchdog Timer
The 1ED020I12FA incorporates two level of signal
transmission security implemented through two independent
watchdog timers. First level ensures the short term signal
integrity by resending the (turn on/off) signals with a
watchdog period of typical 500ns. The second level monitors
during normal operation the internal signal transmission. If
the transmission fails for a given time, the IGBT is switched
off and the READY output reports an internal error.
The device also includes an IGBT desaturation protection
with a FAULT status output.
A READY status output reports if the device is supplied and
operates correctly.
2.2.4
Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state
if the output chip is not connected to the power supply.
2.2
Internal Protection Features
2.3
Non-Inverting and Inverting Inputs
2.2.1
Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped
There are two possible input modes to control the IGBT. At
non-inverting mode IN+ controls the driver output while IN-
is set to low. At inverting mode IN- controls the driver output
while IN+ is set to high. A minimum input pulse width is
defined to filter occasional glitches.
with an undervoltage lockout for both chips.
If the power supply voltage VVCC1 of the input chip drops
below VUVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the
signals at IN+ and IN- are ignored as long as VVCC1 reaches
the power-up voltage VUVLOH1
.
If the power supply voltage VVCC2 of the output chip goes
down below VUVLOL2 the IGBT is switched off and signals
from the input chip are ignored as long as VVCC2 reaches the
2.4
Driver Output
The output driver section uses only MOSFETs to provide a
rail-to-rail output. This feature permits that tight control of
gate voltage during on-state and short circuit can be
maintained as long as the drivers supply is stable. Due to the
low internal voltage drop, switching behaviour of the IGBT
is predominantly governed by the gate resistor. Furthermore,
it reduces the power to be dissipated by the driver.
power-up voltage VUVLOH2
.
Datasheet
6
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
2.5
External Protection Features
Desaturation Protection
2.5.1
A desaturation protection ensures the protection of the IGBT
at short circuit. When the DESAT voltage goes up and
reaches 9V, the output is driven low. Further, the FAULT
output is activated until it is cleared by /RST. A
programmable blanking time is used to allow enough time
for IGBT saturation. Blanking time is provided by a highly
precise internal current source and an external capacitor.
2.5.2
Active Miller Clamping
A Miller clamp allows sinking the Miller current during a
high dV/dt situation. Therefore, the use of a negative supply
voltage can be avoided in many applications. During turn-
off, the gate voltage is monitored and the clamp output is
activated when the gate voltage goes below 2V (related to
VEE2). The clamp is designed for a Miller current up to 1A.
2.5.3
Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise
because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT and CLAMP
limits this voltage to a value slightly higher than the supply
voltage. A current of maximum 500 mA for 10us may be fed
back to the supply through one of this paths. If higher
currents are expected or a tighter clamping is desired external
Schottky diodes may be added.
2.6
RESET
The reset input has two functions.
Firstly, /RST is in charge of setting back the FAULT output.
If /RST is low longer than a given time , /FLT will be reseted
at the rising edge of /RST; otherwise, it will remain
unchanged. Moreover, it works as enable/shutdown of the
input logic.
Datasheet
7
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
3
Pin Configuration and Functionality
3.1
Pin Configuration
Pin Symbol
Function
1
2
3
4
5
6
7
8
9
VEE2
VEE2
DESAT
GND2
NC
VCC2
OUT
CLAMP
VEE2
Negative power supply output side
Negative power supply output side
Desaturation protection
Signal ground output side
Not connected
Positive power supply output side
Driver output
Miller clamping
Negative power supply output side
Negative power supply output side
Signal ground input side
Signal ground input side
Non inverted driver input
Inverted driver input
1
2
3
4
5
6
7
8
9
VEE2
VEE2
DESAT
GND2
NC
GND1 20
GND1 19
VCC1 18
/RST 17
/FLT 16
RDY 15
IN- 14
VCC2
OUT
10 VEE2
11 GND1
12 GND1
13 IN+
CLAMP
VEE2
IN+ 13
GND1 12
GND1 11
10 VEE2
14 IN-
15 RDY
16 FLT
Ready output
Fault output
Figure 4: PG-DSO-20-55
17 RST
18 VCC1
19 GND1
20 GND1
Reset input
Positive power supply input side
Signal ground input side
Signal ground input side
Function 2: Resets the DESAT-FAULT-state of the chip if
3.2
Pin Functionality
/RST is low for a time TRST
.
An internal Pull-Up-Resistor is used to ensure FLT status
output.
GND1
Ground connection of the input side.
/FLT (Fault output)
IN+ Non-inverting driver input
Open-drain output to report a desaturation error of the IGBT
(FLT is low if desaturation occurs)
IN+ control signal for the driver output if IN- is set to low.
(The IGBT is on if IN+ = high and IN- = low)
A minimum pulse width is defined to make the IC robust
against glitches at IN+. An internal Pull-Down-Resistor
ensures IGBT Off-State.
RDY (Ready status)
Open-drain output to report the correct operation of the
device. (RDY = high if both chips are above the UVLO level
and the internal chip transmission is faultless)
IN- Inverting driver input
IN- control signal for driver output if IN+ is set to high.
(IGBT is on if IN- = low and IN+ = high)
VCC1
A minimum pulse width is defined to make the IC robust
against glitches at IN-. An internal Pull-Up-Resistor ensures
IGBT Off-State.
5V power supply of the input chip
VEE2
Negative power supply pins of the output chip. If no negative
supply voltage is available, both pins have to be connected to
GND2.
/RST (Reset) input
Function 1: Enable/shutdown of the input chip. (The IGBT is
off if /RST = low). A minimum pulse width is defined to
make the IC robust against glitches at IN-.
Datasheet
8
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
DESAT (Desaturation)
Monitoring of the IGBT saturation voltage (VCE) to detect
desaturation caused by short circuits. If OUT is high, VCE is
above a defined value and a certain blanking time has
expired, the desaturation protection is activated and the
IGBT is switched off. The blanking time is adjustable by an
external capacitor.
CLAMP (Clamping)
Ties the gate voltage to VEE2 after the IGBT has been
switched off at a defined voltage to avoid a parasitic switch-
on of the IGBT.During turn-off, the gate voltage is
monitored and the clamp output is activated when the gate
voltage goes below 2V (related to VEE2).
GND2
Reference ground of the output chip.
OUT (Driver output)
Output pin to drive an IGBT. The voltage is switched
between VEE2 and VCC2. In normal operating mode Vout
is controlled by IN+, IN- and /RST. During error mode
(UVLO, internal error or DESAT) Vout is set to VEE2
independent of the input control signals.
VCC2
Positive power supply pin of the output side.
Datasheet
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Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4
Electrical Parameters
4.1
Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated
circuit. Unless otherwise noted all parameters refer to GND1.
Parameter
Symbol
Limit Values
Unit Remarks
min.
-0.3
-12
max.
20
0.3
28
1)
Positive power supply output side
VVCC2
VVEE2
Vmax2
V
V
V
1)
Negative power supply output side
Maximum power supply voltage output side
(VVCC2-VVEE2
)
Gate driver output
VOUT
IOUT
IOUT
tCLP
VVEE2-0.3 Vmax2+0.3
V
Gate driver high output maximum current
Gate & Clamp driver low output maximum current
Maximum short circuit clamping time
2.4
2.4
10
A
A
us
t = 2µs
t = 2µs
ICLAMP/OUT
500mA
=
Positive power supply input side
Logic input voltages
(IN+,IN-,RST)
VVCC1
VLogicIN
-0.3
-0.3
6.5
6.5
V
V
Opendrain Logic output voltage
(FLT)
Opendrain Logic output voltage
(RDY)
Opendrain Logic output current
(FAULT)
Opendrain Logic output current
(RDY)
VFLT
VRDY
IFLT
-0.3
-0.3
6.5
6.5
V
V
10
mA
mA
IRDY
10
1)
Pin DESAT voltage
Pin CLAMP voltage
VDESAT
VCLAMP
-0.3
VVCC2 +0.3
V
= -8V
VEE2
VVEE2-0.3 VVCC2+0.3
2)
Junction temperature
Storage temperature
Power dissipation, Input chip
TJ
TS
PD, IN
-40
-55
150
150
100
°C
°C
mW 3)@TA = 25°
mW 2)3)@TA = 25°
K/W 2)@TA = 25°C
K/W 2)@TA = 25°C
Power dissipation, Output chip
Thermal resistance (Input chip active)
Thermal resistance (Output chip active)
ESD Capability
PD, OUT
RTHJA,IN
RTHJA,OUT
VESD
700
139
117
1
kV
Human Body
Model4)
1) With respect to GND2.
2) may be exceeded during short circuit clamping
3) Output IC power dissipation is derated linearly at 8.5 mW/°C above 68°C. Input IC power dissipation does not require derating. See
section 8.1 for reference layouts for these thermal data. Thermal performance may change significantly with layout and heat dissipation
of components in close proximity.
4) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor).
Datasheet
10
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4.2
Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless otherwise noted all
parameters refer to GND1.
Parameter
Symbol
Limit Values
Unit
Remarks
min.
13
-12
max.
20
0
1)
1)
Positive power supply output side
VVCC2
VVEE2
Vmax2
V
V
V
Negative power supply output side
Maximum power supply voltage output side
28
(VVCC2-VVEE2
)
Positive power supply input side
Logic input voltages
(IN+,IN-,RST)
Pin CLAMP voltage
Pin DESAT voltage
VVCC1
VLogicIN
4.5
-0.3
5.5
5.5
V
V
2)
VCLAMP
VDESAT
TA
VVEE2-0.3
-0.3
VVCC2
VVCC2
125
V
V
°C
1)
Ambient temperature
-40
—
Common mode transient immunity3)
|∆VISO/dt|
50
kV/µs @ 500V
1) With respect to GND2.
2) may be exceeded during short circuit clamping
3) The parameter is not subject to production test - verified by design/characterization
4.3
Recommended Operating Parameters
Note: Unless otherwise noted all parameters refer to GND1.
Parameter
Symbol
Values
Unit Remarks
1)
Positive power supply output side
Negative power supply output side
Positive power supply input side
VVCC2
VVEE2
VVCC1
15
-8
5
V
V
V
1)
1) With respect to GND2.
Datasheet
11
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4.4
Electrical Characteristics
Note: The electrical characteristics involve the spread of values for the supply voltages, load and junction temperature range
from -40°C to +150°C. Typical values represent the median values, which are related to production processes at TJ =
25°C. Unless otherwise noted all voltages are given with respect to GND.
4.4.1
Voltage Supply.
Parameter
Symbol
Limit Values
Unit Test Conditions
min.
typ.
max.
UVLO Threshold Input Chip
VUVLOH1
VUVLOL1
VHYS1
4.1
3.8
4.3
V
V
V
3.5
0.15
UVLO Hysteresis Input Chip
(VUVLOH1 - VUVLOL1
)
UVLO Threshold Output Chip
VUVLOH2
VUVLOL2
VHYS2
12.0
11.0
0.9
12.6
V
V
V
10.4
0.7
UVLO Hysteresis Output Chip
(VUVLOH1 - VUVLOL1
)
Quiescent Current Input Chip
IQ1
7
9
6
mA VVCC1 =5V
IN+ = High, IN- = Low
=>OUT = High, RDY =
High, /FLT = High
Quiescent Current Output Chip
IQ2
4
mA VVCC2 =15V
VVEE2 =-8V
IN+ = High, IN- = Low
=>OUT = High, RDY =
High, /FLT = High
4.4.2
Logic Input and Output
Parameter
Symbol
Limit Values
min. typ.
Unit Test Conditions
max.
IN+,IN-, RST Low Input Voltage
IN+,IN-, RST High Input Voltage
IN-, RST Input Current
VIN+L,VIN-
L,VRSTL
VIN+H,VIN- 3.5
HVRSTH
1.5
V
V
IIN-, RST
I
100
400
uA VIN-=GND1
VRST =GND1
IN+ Input Current
RDY,FLT Pull Up Current
IIN+,
IPRDY,
IPFLT
100
100
400
400
uA VIN+=VCC1
uA VRDY=GND1
VFLT=GND1
Input Pulse Suppression IN+, IN-
TMININ+
TMININ-
TMINRST
TRST
,
30
40
40
ns
ns
ns
Input Pulse Suppression RST
for ENABLE/SHUTDOWN
Pulse Width RST
for Reseting FLT
30
800
FLT Low Voltage
RDY Low Voltage
VFLTL
VRDYL
300
300
mV ISINK(FLT) = 5mA
mV ISINK(RDY) = 5mA
Datasheet
12
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4.4.3
Gate Driver
Parameter
Symbol
Limit Values
typ. max.
VVCC2-1.2 VVCC2-0.8
Unit Test Conditions
min.
High Level Output Voltage
VOUTH1
VOUTH2
VOUTH3
VOUTH4
IOUTH
V
V
V
V
A
IOUTH = -20mA
IOUTH = -200mA
IOUTH = -1A
VVCC2-2.5
VVCC2-9
VVCC2-2
VVCC2-5
VVCC2-10
-2
IOUTH = -2A
High Level Output Peak Current
Low Level Output Voltage
-1.5
1.5
IN+ = High, IN- = Low;
OUT = High
VOUTL1
VOUTL2
VOUTL3
VOUTL4
IOUTL
VVEE2+0.04 VVEE2 +0.09
VVEE2+0.3 VVEE2 +0.85
VVEE2+2.1 VVEE2 +5.0
V
V
V
V
A
IOUTL = 20mA
IOUTL = 200mA
IOUTL = 1A
VVEE2+7
2
—
—
IOUTL = 2A
Low Level Output Peak Current
IN+ = Low, IN- = Low;
OUT = Low,
VVCC2 =15V,
VVEE2 =-8V
4.4.4
Active Miller Clamp
Parameter
Symbol
Limit Values
Unit Test Conditions
min.
typ.
max.
Low Level Clamp Voltage
VCLAMPL1
VCLAMPL2
VCLAMPL3
ICLAMPL
VVEE2+0.03 VVEE2 +0.08 V
IOUTL = 20mA
IOUTL = 200mA
VVEE2+0.3 VVEE2 +0.8
VVEE2+1.9 VVEE2 +4.8
V
V
A
IOUTL = 1A
1)
Low Level Clamp Current
Clamp Threshold Voltage
2
VCLAMP
1.6
2.1
2.4
V
Related to VEE2
1) The parameter is not subject to production test - verified by design/characterization
4.4.5
Short Circuit Clamping
Parameter
Symbol
Limit Values
min. typ.
Unit Test Conditions
max.
1.3
Clamping voltage (OUT)
(VOUT-VVCC2
VCLPout
0.8
1.3
0.7
V
V
V
IN+=High, IN-=Low,
OUT=High
)
IOUT = 500mA (pulse
test,tCLPmax=10us)
Clamping voltage (CLAMP)
(VVCLAMP-VVCC2
VCLPclamp
IN+=High, IN-=Low,
OUT=High
)
ICLAMP = 500mA (pulse
test,tCLPmax=10us)
Clamping voltage (CLAMP)
Datasheet
VCLPclamp
1.1
IN+=High, IN-=Low,
OUT=High
ICLAMP = 20mA
13
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4.4.6
Dynamic Characteristics
Parameter
Symbol
Limit Values
min. typ.
160
Unit Test Conditions
max.
7501)
Input to output propagation delay ON
Input to output propagation delay OFF
Input to output propagation delay
distortion
TPDON
TPDOFF
TPDISTO
185
165
-20
ns
ns
ns
VVCC1 =5V
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
145
-50
185
555 1)
VIN+=50%, VOUT=50%
@ TA =25°C
Input to output propagation delay ON
variation due to temp
Input to output propagation delay OFF
variation due to temp
Input to output propagation delay
distortion variation due to temp
Input to output propagation delay ON
variation due to temp
Input to output propagation delay OFF
variation due to temp
Input to output propagation delay
distortion variation due to temp
TPDONt
TPDOFFt
TPDISTOt
TPDONt
TPDOFFt
TPDISTOt
TRISE
160
160
-30
160
130
-60
10
190
190
0
990 1)
220
ns
ns
ns
ns
ns
ns
ns
VVCC1 =5V
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ TA =125°C
800 1)
990 1)
190
190
160
-30
30
VVCC1 =5V
VVCC2 =15V,VVEE2 =-8V
CLOAD= 100pF
VIN+=50%, VOUT=50%
@ TA =-40°C
770 1)
60
Rise Time
VVCC2 =15V,VVEE2 =-8V
CLOAD= 1nF
VL 10% ,VH 90%
200
10
400
50
800
90
ns
ns
ns
VVCC2 =15V,VVEE2 =-8V
CLOAD= 34nF
VL 10% ,VH 90%
Fall Time
TFALL
VVCC2 =15V,VVEE2 =-8V
CLOAD= 1nF
VL 10% ,VH 90%
200
450
600
VVCC2 =15V,VVEE2 =-8V
CLOAD= 34nF
VL 10% ,VH 90%
1) The maximum value of input to output propagation delay ON occures only in case of electromagnetic interferences, typically
the input to output delay is 205ns at TA =25°C, one worst case watchdog clock cycle shorter (see chapter 2.2.3). The turn
OFF-signal is prioritized/dominant and will not show up this behavior.
Datasheet
14
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Electrical Parameters
4.4.7
Desaturation protection
Parameter
Symbol
Limit Values
min. typ.
225
Unit Test Conditions
max.
275
Blanking Capacitor Charge Current
Blanking Capacitor Discharge Current
IDESATC
IDESATD
250
2
uA VVCC2 =15V,VVEE2 =-8V
VDESAT=2V
1
mA VVCC2 =15V,VVEE2 =-8V
VDESAT=6V
Desaturation Reference Level
Desaturation Reference Level
Desaturation Sense to OUT Low Delay TDESATOUT
VDESAT
VDESAT
8.3
7.6
9
8.6
100
9.5
9.5
150
V
V
VVCC2 =15V,VVEE2 =-8V
VVCC2 =15V,VVEE2 =0V
ns VOUT =90%
CLOAD= 1nF
Desaturation Sense to FLT Low Delay
Desaturation Low Voltage
TDESATFLT
VDESATL
2.25
0.95
us VFLT =10%; IFLT =5mA
0.4
0.6
V
IN+=Low, IN-=Low,
OUT=Low
4.4.8
Active Shut Down
Parameter
Symbol
Limit Values
Unit Test Conditions
min.
typ.
max.
1)
Active Shut Down Voltage
VACTSD
4
V
IOUT=-200mA,
VCC2 open
1) With reference to VEE2
Datasheet
15
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Insulation Characteristics
5
Insulation Characteristics
5.1
Complies with DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation
Description
Symbol
Characteristic
Unit
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 VRMS
I-IV
I-III
I-II
for rated mains voltage ≤ 300 VRMS
for rated mains voltage ≤ 600 VRMS
Climatic Classification
40/125/21
Pollution Degree (EN 60664-1)
Minimum External Clearance
Minimum External Creepage
2
8
8
CLR
CPG
mm
mm
Minimum Comparative Tracking Index
Maximum Repetitive Insulation Voltage
Highest Allowable Overvoltage1)
Maximum Surge Insulation Voltage
CTI
175
1420
6000
6000
VIORM
VIOTM
VIOSM
VPEAK
VPEAK
V
5.2
Complies with UL 1577
Description
Insulation Withstand Voltage / 1min
Insulation Test Voltage / 1sec
Symbol
VISO
VISO
Characteristic
3750
4500
Unit
Vrms
Vrms
5.3
Reliability
For Qualification Report please contact your local Infineon Technologies office.
Datasheet
16
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Timing Diagrams
6
Timing Diagrams
IN
OUT
TPDELAY
TPD ELAY
Figure 5: propagation delay
IN+
IN-
RST
OUT
Figure 6: Turn-on and Turn-off
IN+
IN-
9V
DESAT
RDY
FLT
Tdesatflt
1.0...2.25us
RST
Figure 7: Desaturation Fault
Datasheet
17
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Timing Diagrams
IN+
IN-
Vcc1
Vcc2
OUT
RDY
FLT
RST
Figure 8: UVLO
Datasheet
18
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Package Outlines
7
Package Outlines
Figure 9: PG-DSO-20-55 (Plastic Dual Small Outline Package)
Datasheet
19
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Application Notes
8
Application Notes
8.1
Reference Layout for Thermal Data
The PCB layout shown in figure 12 represents the reference layout used for the thermal characterisation. Pins 11, 12, 19 and
20 (GND1) and pins 1, 2, 9 and 10 (VEE2) require ground plane connections for achiving maximum power dissipation. The
1ED020I12FA is conceived to dissipate most of the heat generated through this pins.
PCB + Top-Layer
PCB + Bottom-Layer
Figure 10: Reference layout for thermal data (Copper thickness 102µm)
8.2
Printed Circuit Board Guidelines
Following factors should be taken into account for an optimum PCB layout.
- Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
- The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained to increase the
effective isolation and reduce parasitic coupling.
- In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept as short as
possible.
Datasheet
20
Version 2.1, 2009-11-24
EICEDRIVER®
1ED020I12FA
Application Notes
Datasheet
21
Version 2.1, 2009-11-24
Total Quality Management
Qualität hat für uns eine umfassende So we are not only concerned with product
Bedeutung. Wir wollen allen Ihren quality. We direct our efforts equally at
Ansprüchen in der bestmöglichen Weise quality of supply and logistics, service and
gerecht werden. Es geht uns also nicht nur support, as well as all the other ways in
um die Produktqualität
–
unsere which we advise and attend to you.
Anstrengungen gelten gleichermaßen der
Lieferqualität und Logistik, dem Service
und Support sowie allen sonstigen
Beratungs- und Betreuungsleistungen.
Part of this is the very special attitude of our
staff. Total Quality in thought and deed,
towards co-workers, suppliers and you, our
customer. Our guideline is “do everything
with zero defects”, in an open manner that
is demonstrated beyond your immediate
workplace, and to constantly improve.
Throughout the corporation we also think
in terms of Time Optimized Processes
(top), greater speed on our part to give you
that decisive competitive edge.
Dazu gehört eine bestimmte Geisteshaltung
unserer Mitarbeiter. Total Quality im
Denken und Handeln gegenüber Kollegen,
Lieferanten und Ihnen, unserem Kunden.
Unsere Leitlinie ist jede Aufgabe mit „Null
Fehlern“ zu lösen – in offener Sichtweise
auch über den eigenen Arbeitsplatz hinaus
– und uns ständig zu verbessern.
Give us the chance to prove the best of
performance through the best of quality –
you will be convinced.
Unternehmensweit orientieren wir uns
dabei auch an „top“ (Time Optimized
Processes), um Ihnen durch größere
Schnelligkeit
den
entscheidenden
Wettbewerbsvorsprung zu verschaffen.
Geben Sie uns die Chance, hohe Leistung
durch umfassende Qualität zu beweisen.
Wir werden Sie überzeugen.
Quality takes on an allencompassing
significance at Semiconductor Group. For
us it means living up to each and every one
of your demands in the best possible way.
w w w . i n f i n e o n . c o m / g a t e d r i v e r
Published by Infineon Technologies AG
1ED020I12FA 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| 1ED020I12FA2 | INFINEON | EiceDRIVER™ 汽车 - 电流隔离式单通道 IGBT 驱动器 IC | 完全替代 |
|
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| 1ED020I12FA2 | INFINEON | EiceDRIVER™ 汽车 - 电流隔离式单通道 IGBT 驱动器 IC | 获取价格 |
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| 1ED020I12FTA | INFINEON | Single IGBT Driver IC | 获取价格 |
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