HMC1131LC4TR [ADI]

Point-to-point radios;
HMC1131LC4TR
型号: HMC1131LC4TR
厂家: ADI    ADI
描述:

Point-to-point radios

射频 微波
文件: 总15页 (文件大小:453K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
GaAs, pHEMT, MMIC, Medium Power  
Amplifier, 24 GHz to 35 GHz  
Data Sheet  
HMC1131  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
High saturated output power (PSAT): 25 dBm  
High output third-order intercept (IP3): 35 dBm  
High gain: 22 dB (24 GHz to 27 GHz)  
High output power for 1 dB compression (P1dB): 24 dBm  
DC supply: 5 V at 225 mA  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
NIC  
GND  
RFIN  
GND  
NIC  
NIC  
GND  
RFOUT  
GND  
NIC  
Compact 24-lead, 4 mm × 4 mm LCC package  
1.5kΩ  
1.5kΩ  
APPLICATIONS  
HMC1131  
Point-to-point radios  
Point-to-multipoint radios  
VSAT and SATCOM  
NIC  
NIC  
PACKAGE  
BASE  
Figure 1.  
GENERAL DESCRIPTION  
The HMC1131 is a gallium arsenide (GaAs), pseudomorphic  
high electron mobility transfer (pHEMT), monolithic microwave  
integrated circuit (MMIC), driver amplifier that operates from  
24 GHz to 35 GHz. The HMC1131 provides 22 dB of gain at the  
24 GHz to 27 GHz range, 35 dBm output IP3, and 24 dBm of  
output power at 1 dB gain compression, while requiring 225 mA  
from a 5 V supply. The HMC1131 is capable of supplying 25 dBm  
of saturated output power and is housed in a compact, 4 mm ×  
4 mm ceramic leadless chip carrier (24-lead LCC). The HMC1131  
is an ideal driver amplifier for a wide range of applications,  
including point-to-point radios, from 24 GHz to 35 GHz.  
Rev. A  
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Tel: 781.329.4700  
Technical Support  
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HMC1131* Product Page Quick Links  
Last Content Update: 11/01/2016  
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• HMC1131: GaAs, pHEMT, MMIC, Medium Power  
Amplifier, 24 GHz to 35 GHz Data Sheet  
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* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to  
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frequently modified.  
HMC1131  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
ESD Caution...................................................................................4  
Pin Configuration and Function Descriptions..............................5  
Interface Schematics .....................................................................6  
Typical Performance Characteristics ..............................................7  
Applications Information.............................................................. 11  
Evaluation PCB........................................................................... 12  
Typical Application Circuit........................................................... 13  
Outline Dimensions....................................................................... 14  
Ordering Guide .......................................................................... 14  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Electrical Specifications................................................................... 3  
24 GHz to 27 GHz Frequency Range......................................... 3  
27 GHz to 35 GHz Frequency Range......................................... 3  
Absolute Maximum Ratings............................................................ 4  
REVISION HISTORY  
9/15—Rev. 0 to Rev. A  
Changes to Features Section and General Description Section........1  
Change to Gain Parameter, Table 1................................................ 3  
7/15—Revision 0: Initial Version  
Rev. A | Page 2 of 14  
 
Data Sheet  
HMC1131  
ELECTRICAL SPECIFICATIONS  
24 GHz TO 27 GHz FREQUENCY RANGE  
TA = 25°C, VDD1 = VDD2 = VDD3 = VDD4 = 5 V, IDD = 225 mA, unless otherwise stated. Adjust VGG1 and VGG2 between −2 V to 0 V to  
achieve IDD = 225 mA typical.  
Table 1.  
Parameter  
Symbol  
Min  
24  
Typ  
Max  
Unit  
GHz  
dB  
FREQUENCY RANGE  
GAIN  
27  
18  
22  
Gain Variation Over Temperature  
RETURN LOSS  
0.031  
dB/°C  
Input  
Output  
8
7
dB  
dB  
OUTPUT  
Output Power for 1 dB Compression  
Saturated Output Power  
Output Third-Order Intercept1  
SUPPLY CURRENT  
Total Supply Current  
P1dB  
PSAT  
IP3  
20  
23  
27  
34  
dBm  
dBm  
dBm  
IDD  
225  
4
mA  
V
2
Total Supply Current vs. VDD  
5
V
1 Measurement taken at POUT/tone = 10 dBm.  
2 The amplifier operates over the full voltage ranges shown. VGG1 and VGG2 are adjusted to achieve IDD = 225 mA at 5 V.  
27 GHz TO 35 GHz FREQUENCY RANGE  
TA = 25°C, VDD1 = VDD2 = VDD3 = VDD4 = 5 V, IDD = 225 mA, unless otherwise stated. Adjust VGG1 and VGG2 between −2 V to 0 V to  
achieve IDD = 225 mA typical.  
Table 2.  
Parameter  
Symbol  
Min  
27  
Typ  
Max  
Unit  
GHz  
dB  
FREQUENCY RANGE  
GAIN  
35  
18  
20  
Gain Variation Over Temperature  
RETURN LOSS  
0.031  
dB/°C  
Input  
Output  
8
7
dB  
dB  
OUTPUT  
Output Power for 1 dB Compression  
Saturated Output Power  
Output Third-Order Intercept1  
SUPPLY CURRENT  
Total Supply Current  
P1dB  
PSAT  
IP3  
21  
24  
25  
35  
dBm  
dBm  
dBm  
IDD  
225  
4
mA  
V
2
Total Supply Current vs. VDD  
5
V
1 Measurement taken at POUT/tone = 10 dBm.  
2 The amplifier operates over the full voltage ranges shown. VGG1 and VGG2 are adjusted to achieve IDD = 225 mA at 5 V.  
Rev. A | Page 3 of 14  
 
 
 
HMC1131  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
Parameter  
Rating  
Drain Bias Voltage (VDD)  
RF Input Power (RFIN)  
Channel Temperature  
Continuous Power Dissipation (PDISS),  
TA = 85°C (Derate 22 mW/°C)  
5.5 V  
12 dBm  
175°C  
1.97 W  
Thermal Resistance, RTH (Junction to  
Ground Paddle)  
Operating Temperature  
45.5°C/W  
ESD CAUTION  
−40°C to +85°C  
−65°C to +150°C  
Storage Temperature  
ESD Sensitivity, Human Body Model (HBM)  
Class 0,  
passed 150 V  
Maximum Peak Reflow Temperature  
260°C  
Rev. A | Page 4 of 14  
 
 
Data Sheet  
HMC1131  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
NIC  
GND  
RFIN  
GND  
NIC  
NIC  
GND  
RFOUT  
GND  
NIC  
HMC1131  
TOP VIEW  
(Not to Scale)  
NIC  
NIC  
NOTES  
1. NIC = NOT INTERNALLY CONNECTED.  
2. THE EXPOSED PAD MUST BE CONNECTED  
TO RF/DC GROUND.  
Figure 2. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No. Mnemonic  
Description  
1, 5 to 7, 9, 10, 12 to 14, NIC  
18, 19, 24  
Not Internally Connected. However, all data was measured with these pins connected to RF/dc  
ground externally.  
2, 4, 15, 17  
3
8
GND  
RFIN  
VGG1  
Ground. These pins must be connected to RF/dc ground.  
RF Input. This pin is ac-coupled and matched to 50 Ω.  
Gate Bias Pin for the First and Second Stages. External bypass capacitors of 100 pF, 10 nF, and 4.7 μF  
are required for this pin.  
11  
VGG2  
Gate Bias Pin for the Third and Fourth Stages. External bypass capacitors of 100 pF, 10 nF, and 4.7 μF  
are required for this pin.  
16  
RFOUT  
RF Output. This pin is ac-coupled and matched to 50 Ω.  
20 to 23  
VDD4 to VDD1  
Drain Bias Voltage Pins. External bypass capacitors of 100 pF, 10 nF, and 4.7 μF are required for  
these pins.  
EPAD  
Exposed Pad. The exposed pad must be connected to RF/dc ground.  
Rev. A | Page 5 of 14  
 
HMC1131  
Data Sheet  
INTERFACE SCHEMATICS  
RFIN  
RFOUT  
1.5kΩ  
1.5kΩ  
Figure 3. RFIN Interface Schematic  
Figure 6. RFOUT Interface Schematic  
GND  
V
V
1, V 2,  
DD  
DD DD  
3, V 4  
DD  
Figure 4. GND Interface Schematic  
Figure 7. VDD1 to VDD4 Interface Schematic  
V
1, V 2  
GG GG  
Figure 5. VGG1/VGG2 Interface Schematic  
Rev. A | Page 6 of 14  
 
Data Sheet  
HMC1131  
TYPICAL PERFORMANCE CHARACTERISTICS  
30  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
20  
10  
0
–10  
–20  
S11  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
S21  
S22  
–30  
23  
25  
27  
29  
31  
33  
35  
37  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 8. Response (Broadband Gain and Return Loss) vs. Frequency  
Figure 11. Gain vs. Frequency at Various Temperatures  
0
–5  
0
–5  
–10  
–15  
–20  
–25  
–10  
–15  
–20  
–25  
–30  
–35  
–30  
–35  
T
T
T
= +85°C  
= +25°C  
= –40°C  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
A
A
A
24 25 26 27 28 29 30 31 32 33 34 35 36  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 9. Input Return Loss vs. Frequency at Various Temperatures  
Figure 12. Output Return Loss vs. Frequency at Various Temperatures  
30  
28  
26  
24  
22  
20  
18  
16  
30  
28  
26  
24  
22  
20  
18  
16  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
14  
14  
4V  
5V  
12  
12  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
Figure 10. P1dB vs. Frequency at Various Temperatures  
Figure 13. P1dB vs. Frequency at Various Supply Voltages  
Rev. A | Page 7 of 14  
 
HMC1131  
Data Sheet  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
4V  
5V  
24 25 26 27 28 29 30 31 32 33 34 35 36  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 14. PSAT vs. Frequency at Various Temperatures  
Figure 17. PSAT vs. Frequency at Various Supply Voltages  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
175mA  
200mA  
225mA  
250mA  
175mA  
200mA  
225mA  
250mA  
24 25 26 27 28 29 30 31 32 33 34 35 36  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 15. P1dB vs. Frequency at Various Supply Currents  
Figure 18. PSAT vs. Frequency at Various Supply Currents  
40  
40  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
175mA  
200mA  
225mA  
250mA  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
24 25 26 27 28 29 30 31 32 33 34 35 36  
24 25 26 27 28 29 30 31 32 33 34 35 36  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
Figure 16. Output IP3 vs. Frequency at Various Temperatures,  
OUT/Tone = 10 dBm  
Figure 19. Output IP3 vs. Frequency at Various Supply Currents,  
OUT/Tone = 10 dBm  
P
P
Rev. A | Page 8 of 14  
Data Sheet  
HMC1131  
40  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
70  
60  
50  
40  
30  
20  
28GHz  
30GHz  
32GHz  
34GHz  
4V  
5V  
24 25 26 27 28 29 30 31 32 33 34 35 36  
10  
12  
14  
16  
4
6
8
FREQUENCY (GHz)  
P
/TONE (dBm)  
OUT  
Figure 20. Output IP3 vs. Frequency for Various Supply Voltages,  
Figure 23. Output Third-Order Intermodulation (IM3) vs.  
OUT/Tone at VDD = 4 V  
P
OUT/Tone = 10 dBm  
P
70  
60  
50  
40  
30  
20  
30  
25  
20  
15  
10  
5
400  
370  
340  
310  
280  
250  
220  
P
PAE  
OUT  
28GHz  
30GHz  
32GHz  
34GHz  
GAIN  
I
DD  
0
10  
12  
14  
16  
4
6
8
7
9
–15 –13 –11 –9 –7 –5 –3 –1  
1
3
5
P
/TONE (dBm)  
OUT  
INPUT POWER (dBm)  
Figure 21. Output Third-Order Intermodulation (IM3) vs.  
OUT/Tone at VDD = 5 V  
Figure 24. Power Compression at 30.5 GHz  
(PAE Is Power Added Efficiency)  
P
27  
26  
25  
24  
23  
22  
21  
20  
19  
27  
26  
25  
24  
23  
22  
21  
20  
19  
P
GAIN  
P1dB  
P
SAT  
GAIN  
P1dB  
SAT  
175  
200  
225  
250  
4.0  
4.2  
4.4  
4.6  
4.8  
5.0  
I
(mA)  
V
(V)  
DD  
DD  
Figure 22. Gain, P1dB, and PSAT vs. Supply Current (IDD) at 30.5 GHz  
Figure 25. Gain, P1dB, and PSAT vs. Supply Voltage (VDD) at 30.5 GHz  
Rev. A | Page 9 of 14  
HMC1131  
Data Sheet  
0
–10  
–20  
–30  
–40  
–50  
–60  
40  
35  
30  
25  
20  
15  
10  
5
10dBm  
12dBm  
14dBm  
T
T
T
= +85°C  
= +25°C  
= –40°C  
A
A
A
0
24 25 26 27 28 29 30 31 32 33 34 35 36  
170 175 180 185 190 195 200 205 210 215 220 225  
FREQUENCY (GHz)  
I
(mA)  
DD  
Figure 26. Reverse Isolation vs. Frequency at Various Temperatures  
Figure 29. Output IP3 vs. IDD over POUT/Tone at 30 GHz,  
VDD = 5 V, IDD = 225 mA, IDD2 = Fixed, and IDD1 Varied from 0 mA to 50 mA  
25  
25  
20  
15  
10  
5
20  
15  
10  
5
10dBm  
12dBm  
14dBm  
0
0
170 175 180 185 190 195 200 205 210 215 220 225  
170 175 180 185 190 195 200 205 210 215 220 225  
I
(mA)  
DD  
I
(mA)  
DD  
Figure 27. Input IP3 vs. IDD over POUT/Tone at 30 GHz,  
DD = 5 V, IDD = 225 mA, IDD2 = Fixed, and IDD1 Varied from 0 mA to 50 mA  
Figure 30. Gain vs. IDD over POUT/Tone = 14 dBm at 30 GHz,  
DD = 5 V, IDD = 225 mA, IDD2 = Fixed, and IDD1 Varied from 0 mA to50 mA  
V
V
2.0  
27GHz  
28GHz  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
30GHz  
32GHz  
33GHz  
34GHz  
–12  
–9  
–6  
–3  
–0  
3
6
9
INPUT POWER (dBm)  
Figure 28. Power Dissipation (PDISS) at 85°C vs. Input Power for  
Various Frequencies  
Rev. A | Page 10 of 14  
 
 
Data Sheet  
HMC1131  
APPLICATIONS INFORMATION  
The HMC1131 is a GaAs, pHEMT, MMIC, medium power  
amplifier consisting of four gain stages in series. VGG1 is the gate  
bias pin for the first and second stages, while VGG2 is the gate  
bias pin for the third and fourth stages. A simplified block  
diagram is shown in Figure 31.  
The following is the recommended bias sequence during  
power-down:  
1. Turn the RF signal off.  
2. Decrease VGG1 and VGG2 to −2 V to achieve a quiescent  
I
DD = 0 mA (approximately).  
All measurements for this device were taken using the evaluation  
printed circuit board (PCB) in its default configuration. Unless  
otherwise noted, the VGG1, VGG2, and VDD1 to VDD4 pins were  
tied together during measurement, respectively.  
3. Decrease VDD1 through VDD4 to 0 V.  
4. Increase VGG1 and VGG2 to 0 V.  
The VDDx = 5 V and IDD = 225 mA bias conditions are the operating  
points recommended to optimize the overall performance.  
Unless otherwise noted, the data shown was taken using the  
recommended bias conditions. Operation of the HMC1131 at  
different bias conditions may result in performance that differs  
from that shown in Figure 27 and Figure 30. Biasing the  
HMC1131 for higher drain current typically results in higher  
P1dB, OIP3, and gain but at the expense of increased power  
consumption.  
The following is the recommended bias sequence during  
power-up:  
1. Connect to ground.  
2. Set VGG1 and VGG2 to −2 V.  
3. Set VDD1 through VDD4 to 5 V.  
4. Increase VGG1 and VGG2 to achieve a quiescent  
I
DD = 225 mA.  
5. Apply the RF signal.  
V
1
V
2
V
3
V
4
DD  
DD  
DD  
DD  
I
1
I
1
I
2
I
2
DD  
A
DD  
B
DD  
A
DD B  
RFIN  
RFOUT  
I
I
1 = I  
2 = I  
1
2
+ I  
+ I  
1
2
DD  
DD  
A
DD  
B
B
DD  
DD  
A
DD  
V
1
V
2
GG  
GG  
Figure 31. Simplified Block Diagram  
Rev. A | Page 11 of 14  
 
 
HMC1131  
Data Sheet  
exposed paddle must be connected directly to the ground plane  
similar to what is shown in Figure 32. Use a sufficient number  
of via holes to connect the top and bottom ground planes.  
EVALUATION PCB  
Generate the evaluation PCB used in this application with  
proper RF circuit design techniques. Signal lines at the RF port  
must have 50 Ω impedance, and the package ground leads and  
THRU CAL  
VD1 VD2 VD3 VD4  
TP1  
+
TP2  
TP3  
+
+
+
C17  
C15  
C16  
C18  
U1  
C13  
C12  
C14  
RFIN  
+
RFOUT  
+
+
C20  
C21  
C19  
TP5  
TP6 TP7  
VG2  
VCTRL  
VG1  
Figure 32. 600-00145-00-1 Evaluation PCB  
Bill of Materials  
Table 5. Evaluation Board (EV1HMC1131LC4) Bill of Materials  
Item  
Description  
Manufacturer1  
J1, J2  
PCB mount, K connector  
DC pin  
100 pF capacitors, 0402 package  
10000 pF capacitors, 0402 package  
TP1 to TP7  
C1 to C6  
C8 to C13  
C15 to C20 2.2 µF capacitors, 0402 package  
U1  
HMC1131LC4  
Analog Devices, Inc.  
PCB  
600-00145-00-1 evaluation board, Rogers 4350 or Arlon 25FR circuit board material  
600-00145-00-1, Analog Devices, Inc.  
1 Blank cells in the manufacturer column left blank intentionally for they are user selectable.  
Rev. A | Page 12 of 14  
 
 
Data Sheet  
HMC1131  
TYPICAL APPLICATION CIRCUIT  
V
2
V
V
3
4
DD  
DD  
DD  
+
+
+
C15  
C8  
C1  
C2  
C9  
C16  
4.7µF  
0.01µF  
100pF  
100pF  
0.01µF  
4.7µF  
V
1
DD  
+
C17  
4.7µF  
C10  
0.01µF  
C3  
100pF  
C4  
100pF  
C11  
0.01µF  
C18  
4.7µF  
1
2
3
4
5
6
18  
NIC  
NIC  
17  
16  
15  
14  
13  
GND  
RFIN  
GND  
RFOUT  
RFIN  
RFOUT  
1.5kΩ  
1.5kΩ  
GND  
NIC  
NIC  
GND  
NIC  
NIC  
HMC1131  
V
1
V
2
GG  
GG  
C20  
4.7µF  
C13  
0.01µF  
C6  
100pF  
C5  
100pF  
C12  
0.01µF  
C19  
4.7µF  
+
+
Figure 33. Typical Application Circuit  
Rev. A | Page 13 of 14  
 
HMC1131  
Data Sheet  
OUTLINE DIMENSIONS  
4.13  
4.00 SQ  
3.87  
0.36  
0.30  
0.24  
PIN 1  
(0.32 × 0.32)  
PIN 1  
INDICATOR  
19  
24  
18  
1
0.50  
BSC  
EXPOSED  
PAD  
2.50 SQ  
13  
6
7
12  
BOTTOM VIEW  
2.50 REF  
TOP VIEW  
SIDE VIEW  
3.10 BSC  
1.02 MAX  
FOR PROPER CONNECTION OF  
THE EXPOSED PAD, REFER TO  
THE PIN CONFIGURATION AND  
FUNCTION DESCRIPTIONS  
SEATING  
PLANE  
SECTION OF THIS DATA SHEET.  
Figure 34. 24-Terminal Ceramic Leadless Chip Carrier [LCC]  
(HE-24-1)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model1  
Temperature Range  
MSL Rating2 Lead Finish  
Package Description  
Gold over Nickel 24-Terminal LCC  
Package Option Branding3  
HMC1131LC4  
−40°C to +85°C  
MSL3  
HE-24-1  
H1131  
XXXX  
H1131  
XXXX  
HMC1131LC4TR  
−40°C to +85°C  
MSL3  
Gold over Nickel 24-Terminal LCC  
Evaluation Board  
HE-24-1  
EV1HMC1131LC4  
1 The HMC1131LC4 and the HMC1131LC4TR are RoHS Compliant.  
2 See the Absolute Maximum Ratings section.  
3 XXXX is the 4-digit lot number.  
©2015 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D13105-0-9/15(A)  
Rev. A | Page 14 of 14  
 
 
 
 

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