AOL1432_08 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOL1432_08
型号: AOL1432_08
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总6页 (文件大小:145K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOL1432  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOL1432 uses advanced trench technology and  
design to provide excellent RDS(ON) with low gate  
charge. This device is suitable for use in PWM, load  
switching and general purpose applications.  
VDS (V) =25V  
ID = 44 A (VGS = 10V)  
R
R
DS(ON) < 8.5 m(VGS = 10V)  
DS(ON) < 14 m(VGS = 4.5V)  
-RoHS Compliant  
-Halogen and Antimony Free Green Device*  
UIS Tested  
Rg,Ciss,Coss,Crss Tested  
D
Ultra SO-8TM Top View  
D
Bottom tab  
connected to  
G
S
drain  
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
Gate-Source Voltage  
25  
±20  
44  
V
V
VGS  
TC=25°C  
Continuous Drain  
Current  
A
TC=100°C  
ID  
31  
Pulsed Drain Current C  
Continuous Drain  
Current G  
IDM  
100  
12  
TA=25°C  
TA=70°C  
A
A
IDSM  
IAR  
10  
Avalanche Current C  
25  
Repetitive avalanche energy L=0.3mH C  
EAR  
94  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
30  
PD  
W
15  
TA=25°C  
2
PDSM  
W
Power Dissipation A  
TA=70°C  
1.3  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
Symbol  
Typ  
14.2  
48  
Max  
20  
60  
5
Units  
°C/W  
°C/W  
°C/W  
t 10s  
RθJA  
Steady-State  
Steady-State  
RθJC  
3.5  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1432  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250uA, VGS=0V  
VDS=20V, VGS=0V  
25  
V
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
V
DS=0V, VGS=±20V  
100  
3
nA  
V
VGS(th)  
ID(ON)  
VDS=VGS, ID=250µA  
1
1.8  
VGS=10V, VDS=5V  
100  
A
V
GS=10V, ID=30A  
6.5  
9.5  
8.5  
12  
14  
mΩ  
mΩ  
RDS(ON)  
TJ=125°C  
Static Drain-Source On-Resistance  
VGS=4.5V, ID=20A  
VDS=5V, ID=10A  
IS=1A, VGS=0V  
11.5  
35  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
S
V
A
0.72  
1
Maximum Body-Diode Continuous Current  
55  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1430 1716  
pF  
pF  
pF  
VGS=0V, VDS=12.5V, f=1MHz  
VGS=0V, VDS=0V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
319  
215  
1.2  
2
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
26.4  
13.5  
3.9  
32  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
Qgs  
Qgd  
tD(on)  
tr  
V
GS=10V, VDS=12.5V, ID=20A  
7.75  
6.5  
VGS=10V, VDS=12.5V, RL=0.6,  
10  
ns  
R
GEN=3Ω  
tD(off)  
tf  
22.7  
6.2  
ns  
ns  
trr  
IF=20A, dI/dt=100A/µs  
IF=20A, dI/dt=100A/µs  
23.06  
15.25  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
27.5  
ns  
Qrr  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on  
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C.  
G. Surface mounted on a 1 in 2 FR-4 board with 2oz. Copper.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA  
curve provides a single pulse rating.  
* This device is guaranteed green after date code 8P11 (June 1ST 2008)  
Rev 3: Jul 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1432  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
60  
50  
40  
30  
20  
10  
0
100  
80  
60  
40  
20  
0
10V  
5V  
VDS=5V  
4.5V  
6V  
7V  
VGS=4V  
125°C  
25°C  
3.5V  
3V  
0
1
2
3
4
5
0
1
2
3
4
5
V
GS(Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics  
Fig 1: On-Region Characteristics  
18  
16  
14  
12  
10  
8
1.8  
1.6  
1.4  
1.2  
1
VGS=4.5V  
VGS=10V, 20A  
VGS=10V  
6
4
VGS=4.5V, 20A  
2
0
0.8  
0
10  
20  
30  
ID (A)  
40  
50  
60  
0
25  
50  
75  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
100  
125  
150  
175  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage  
30  
25  
20  
15  
10  
5
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0
0.0  
0.2  
0.4  
0.6  
SD (Volts)  
Figure 6: Body-Diode Characteristics  
0.8  
1.0  
1.2  
2
4
6
8
10  
V
V
GS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1432  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2000  
1800  
1600  
1400  
1200  
1000  
800  
600  
400  
200  
0
VDS=12.5V  
ID=20A  
Ciss  
8
6
4
Coss  
2
Crss  
0
0
5
10  
15  
20  
25  
0
5
10  
15  
Qg (nC)  
20  
25  
30  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000.0  
100.0  
10.0  
1.0  
200  
160  
120  
80  
TJ(Max)=175°C, TC=25°C  
TJ(Max)=175°C  
TC=25°C  
10µs  
100µs  
1ms  
10ms  
RDS(ON)  
limited  
DC  
40  
0
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
0.1  
1
10  
100  
V
DS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
RθJC=5°C/W  
PD  
0.1  
Ton  
T
0.01  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1432  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
50  
40  
30  
20  
10  
40  
30  
20  
10  
0
TA=25°C  
0
0
25  
50  
75  
100  
125  
150  
175  
0.00001  
0.0001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.001  
TCASE (°C)  
Figure 13: Power De-rating (Note B)  
50  
50  
40  
30  
20  
10  
0
TA=25°C  
40  
30  
20  
10  
0
0
25  
50  
75  
100  
125  
150  
175  
0.001  
0.01  
0.1  
1
10  
100  
1000  
TCASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note B)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
T
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=60°C/W  
0.1  
PD  
0.01  
Ton  
T
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1432  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Vds  
Ig  
Charge  
Resistive Switching TestCircuit& Waveforms  
RL  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
t d(on)  
t
r
t d(off)  
t
f
t on  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
2
EAR= 1/2 LI  
AR  
BVDSS  
Vds  
Id  
Vds  
+
Vgs  
Vdd  
IAR  
Vgs  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode RecoveryTest Circuit & Waveforms  
Qrr = - Idt  
Vds +  
DUT  
Vgs  
Isd  
Vds -  
Ig  
trr  
L
IF  
Isd  
dI/dt  
+
IRM  
Vdd  
Vgs  
VDC  
Vdd  
-
Vds  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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