AON6444L [AOS]
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,;
| 型号： | AON6444L |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET, |
| 文件： | 总7页 (文件大小：292K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AON6444L
60V N-Channel MOSFET
SDMOSTM
General Description
Product Summary
The AON6444L is fabricated with SDMOSTM trench
VDS
60V
ID (at VGS=10V)
81A
technology that combines excellent RDS(ON) with low gate
charge.The result is outstanding efficiency with controlled
switching behavior. This universal technology is well suited
for PWM, load switching and general purpose applications.
< 6.5mΩ
RDS(ON) (at VGS=10V)
< 8mΩ
RDS(ON) (at VGS = 4.5V)
100% UIS Tested
100% Rg Tested
D
Top View
8
1
7
6
2
3
5
4
G
S
DFN5X6
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Maximum
Units
VDS
Drain-Source Voltage
60
±20
81
V
VGS
ID
IDM
IDSM
Gate-Source Voltage
V
A
TC=25°C
Continuous Drain
Current
Pulsed Drain Current C
TC=100°C
51
170
14
TA=25°C
TA=70°C
Continuous Drain
Current
Avalanche Current C
Repetitive avalanche energy L=0.1mH C
A
11
IAR
58
A
EAR
168
83
mJ
TC=25°C
PD
W
Power Dissipation B
TC=100°C
33
TA=25°C
2.3
PDSM
W
Power Dissipation A
TA=70°C
1.4
TJ, TSTG
Junction and Storage Temperature Range
-55 to 150
°C
Thermal Characteristics
Parameter
Symbol
Typ
14
40
1
Max
17
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
t ≤ 10s
RθJA
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
55
Steady-State
Steady-State
RθJC
1.5
Rev 0: January 2009
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Page 1 of 7
AON6444L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
ID=250µA, VGS=0V
60
V
VDS=60V, VGS=0V
100
500
100
2.5
IDSS
Zero Gate Voltage Drain Current
µA
TJ=55°C
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
VDS=0V, VGS= ±20V
VDS=VGS ID=250µA
VGS=10V, VDS=5V
nA
V
VGS(th)
ID(ON)
1.5
2
170
A
V
GS=10V, ID=20A
5.4
9.6
6.4
75
6.5
11.5
8
mΩ
mΩ
RDS(ON)
TJ=125°C
Static Drain-Source On-Resistance
VGS=4.5V, ID=20A
VDS=5V, ID=20A
IS=1A,VGS=0V
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
V
A
0.7
1
Maximum Body-Diode Continuous Current
81
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
3800 4800 5800
pF
pF
pF
Ω
VGS=0V, VDS=30V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
330
110
0.5
470
190
1
610
270
1.5
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
64
32
12
8
80
40
15
14
13.5
4.2
51
7
96
48
18
20
nC
nC
nC
nC
ns
Qg(4.5V)
Qgs
Qgd
tD(on)
tr
V
GS=10V, VDS=30V, ID=20A
VGS=10V, VDS=30V, RL=1.5Ω,
ns
R
GEN=3Ω
tD(off)
tf
ns
ns
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
14
43
18
54
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
22
65
ns
Qrr
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 0: January 2009
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: January 2009
www.aosmd.com
Page 2 of 7
AON6444L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
150
120
90
60
30
0
150
120
90
60
30
0
10V
7V
4V
VDS=5V
4.5V
5V
3.5V
125°C
25°C
VGS=3V
4
0
1
2
3
4
5
0
1
2
3
5
VGS(Volts)
VDS (Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
8
7
6
5
4
2
1.8
1.6
1.4
1.2
1
VGS=10V
ID=20A
VGS=4.5V
VGS=4.5V
ID=20A
VGS=10V
0.8
0
25
50
75
100
125
150
175
0
5
10
15
20
25
30
I
D (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
15
13
11
9
1.0E+02
1.0E+01
ID=20A
1.0E+00
125°C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
125°C
7
25°C
5
25°C
3
0.0
0.2
0.4
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
0.6
0.8
1.0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: January 2009
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Page 3 of 7
AON6444L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
7000
6000
5000
4000
3000
2000
1000
0
VDS=30V
ID=20A
8
Ciss
6
4
Coss
2
Crss
0
0
20
40
60
80
100
0
10
20
30
40
50
60
Qg (nC)
VDS (Volts)
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
400
360
320
280
240
200
160
120
80
1000.0
100.0
10.0
1.0
10µs
TJ(Max)=150°C
TC=25°C
RDS(ON)
limited
100µs
1ms
DC
TJ(Max)=150°C
TC=25°C
0.1
40
0.0
0
0.01
0.1
1
10
100
0.0001
0.001
0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
J,PK=TC+PDM.ZθJC.RθJC
T
RθJC=1.5°C/W
PD
0.1
Ton
T
Single Pulse
0.0001
0.01
0.00001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: January 2009
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Page 4 of 7
AON6444L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
150
120
90
90
80
70
60
50
40
30
20
10
0
TA=25°C
TA=100°C
60
TA=150°C
30
TA=125°C
0
0
25
50
75
100
125
150
0.000001
0.00001
0.0001
0.001
Time in avalanche, tA (s)
TCASE (°C)
Figure 12: Single Pulse Avalanche capability (Note
C)
Figure 13: Power De-rating (Note F)
10000
1000
100
10
100
80
60
40
20
0
TA=25°C
1
0.0001
0.01
1
100
10000
0
25
50
75
100
125
150
TCASE (°C)
Pulse Width (s)
Figure 14: Current De-rating (Note F)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note G)
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
J,PK=TA+PDM.ZθJA.RθJA
RθJA=55°C/W
T
1
0.1
PD
0.01
0.001
Single Pulse
Ton
T
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note G)
Rev 0: January 2009
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Page 5 of 7
AON6444L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
80
60
40
20
0
25
20
15
10
5
21
18
15
12
9
2
125ºC
di/dt=800A/µs
di/dt=800A/µs
125ºC
25ºC
1.6
1.2
trr
Qrr
25ºC
125ºC
25ºC
0.8
Irm
25ºC
6
S
0.4
0
3
125ºC
0
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
I
S (A)
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
100
80
60
40
20
0
25
20
15
10
5
30
25
20
15
10
5
2.5
2
Is=20A
125ºC
Is=20A
125ºC
1.5
1
trr
25ºC
25ºC
Qrr
125º
25ºC
25ºC
0.5
S
125º
Irm
0
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev 0: January 2009
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Page 6 of 7
AON6444L
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 0: January 2009
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Page 7 of 7
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