MGA-14516-TR2G [AVAGO]
1400MHz - 2700MHz RF/MICROWAVE WIDE BAND MEDIUM POWER AMPLIFIER, 4 X 4 MM, 0.85 MM HEIGHT, QFN-16;型号: | MGA-14516-TR2G |
厂家: | AVAGO TECHNOLOGIES LIMITED |
描述: | 1400MHz - 2700MHz RF/MICROWAVE WIDE BAND MEDIUM POWER AMPLIFIER, 4 X 4 MM, 0.85 MM HEIGHT, QFN-16 放大器 射频 微波 功率放大器 |
文件: | 总14页 (文件大小:187K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MGA-14516
High Gain, High Linearity Active Bias Low Noise Amplifier
Data Sheet
Description
Features
Avago Technologies’ MGA-14516 is a two stage, easy-to-
use GaAs MMIC Low Noise Amplifier (LNA) with active
bias. The LNA has low noise with good input return loss
and high linearity achieved through the use of Avago
Technologies’ proprietary 0.5um and 0.25um GaAs En-
hancement-mode pHEMT process. Both LNAs have an
extra feature inside that allows a designer to adjust supply
current. The first stage has an additional feature where the
gain can be adjusted externally without affecting noise
figure. Minimum matching needed for input, output and
the inter-stage between the two LNA.
ꢀ Low noise figure
ꢀ High gain
ꢀ Good IRL
ꢀ High linearity performance
ꢀ High reverse isolation
ꢀ Externally adjustable supply current
ꢀ Externally adjustable gain
[1]
ꢀ GaAs E-pHEMT Technology
ꢀ Low cost QFN package
It is designed for optimum use between 1.4GHz to 2.7GHz.
For optimum performance at lower frequency from
400MHz to 1.5GHz, the MGA-13516 is recommended.
Both MGA-13516 & MGA-14516 share the same package
and pinout.
ꢀ Excellent uniformity in product specifications
Specifications
1.95GHz ; Q1 : 5V, 45mA (typ) Q2 : 5V, 110mA
ꢀ 31.7 dB Gain
Pin Configuration and Package Marking
ꢀ 0.68 dB Noise Figure
3
4.0 x 4.0 x 0.85 mm 16-lead QFN
ꢀ 13 dB IRL
ꢀ 38 dBm Output IP3
ꢀ 23.5 dBm Output Power at 1dB gain compression
Pin 12
Pin 11
Pin 10
Pin 9
Pin 1
Pin 2
Pin 3
Pin 4
14516
YYWW
XXXX
Applications
ꢀ Low noise amplifier for cellular infrastructure including
GSM, CDMA, W-CDMA, TD-SCDMA and WiMAX.
ꢀ Other very low noise applications.
Note:
TOP VIEW
BOTTOMVIEW
1. Enhancement mode technology employs positive Vgs, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Pin Description Pin Description
1
2
3
4
5
6
7
8
Not Used
9
Not Used
RFout
RFout
Not Used
Vg
[1]
[2]
[3]
[4]
[12]
[11]
[10]
[9]
NC
10
11
12
13
14
15
16
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 40 V
ESD Human Body Model = 200 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
RFin
RFgnd1
Vbias1
FB1
RFgnd2
Vm
RFout1
RFin2
Vbias
Notes:
Package marking provides orientation and identification “14516” is the
Product Identification, “YYWW” is the Date Code, “XXXX” is the last 4
digits of the lot number.
[1]
Absolute Maximum Rating
Symbol
Vdd1
Vbias1
Vdd2
Vbias
Idd2
Parameter
Units
V
Absolute Max.
Device Supply Voltage
5.5
Control Voltage
V
3.5
Device Voltage, RF output to ground
Control Voltage
V
5.5
V
5.5
Device Drain Current
mA
dBm
W
150
20
Pin,max
Pdiss
CW RF Input Power (Vdd1 = 5.0V, Idd1=45mA)
Total Power Dissipation [3]
Junction Temperature
1.30
150
-65 to 150
Tj
°C
TSTG
Storage Temperature
°C
[1-3]
o
Thermal Resistance
(V =V =V =5V), θ = 36 C/W
dd1 dd2 bias jc
Notes:
1. Operation of this device in excess of any of these limits may cause permanent damage.
2. Thermal resistance measured using Infra-Red Microscopy Technique.
o
o
o
3. Board temperature T is 25 C. Derate 28mW/ C for T >120 C.
B
B
[4]
Product Consistency Distribution Charts
T = 25 °C, 1.95GHz, Vdd1=5V, Vdd2=5V, Vbias=5V, F =1.95GHz, unless stated otherwise.
A
RF
USL
LSL
USL
LSL
CPK = 2.67
CPK = 3.08
34
36
38 40
42
44
46
48 50
52
54
100
110
120
130
140
150
70
80
90
Figure 1. Idd1 distribution ; LSL = 35mA, USL = 52mA
Figure 2. Idd2 distribution ; LSL = 75mA, USL = 140mA
USL
USL
LSL
CPK = 3.00
CPK = 3.72
.60
.65
.70
.75
.80
.85
.90
.95
1.00
30.0
30.5
31.0
31.5
32.0
32.5
33.0
33.5
Figure 3. Gain distribution ; LSL = 30.2dB, USL = 33.3dB
Figure 4. NF distribution ; USL = 1dB
Notes:
4. Distribution data sample size is 500 samples taken from 3 different wafer lots. Future wafer allocated to this product may have nominal values
anywhere between the upper and lower limits. Circuit losses have not been de-embedded from actual measurements.
2
Demo Board Layout
Notes:
ꢀꢁ Recommended PCB material is 10 mils Rogers RO4350.
ꢀꢁ Suggested component values may vary according to layout and PCB
material.
ꢀꢁ L1 and C1 form the input matching network.
ꢀꢁ L4 and C7 form the output matching network.
ꢀꢁ L2, L3, C5 form the inter-stage matching network.
ꢀꢁ R2 and C4 form the network for externally gain adjustment feature.
(optional)
ꢀꢁ R4 and C18 form the network for externally gain adjustment feature.
(optional)
ꢀꢁ Cs, C6, C13 are RF bypass capacitor.
ꢀꢁ C16 mitigates the effect of external noise pickup on the Vbias line.
ꢀꢁ R1 is bias resistor for Q1.
Figure 5. Demo Board Layout
Vbias=5V
Vdd2=5V
C11
C16
C6
C13
L3
R4
C18
[12]
[1]
L4
[11]
[10]
[9]
[2]
[3]
[4]
C1
C7
L1
Cs
L2
R1
C10
C9
Vdd1=5V
Figure 6. Demo Board Schematic
3
Table1. 1.95 GHz Matching Components
Demo board (shown in Figure 5) component values used for demo board schematic in Figure 6. These component
values are used when measuring Electrical Specifications and plots of Figure 7 to Figure 17.
Part
Cs
Size
Value
Description
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
100pF
6.8pF
7.5pF
10pF
Kyocera CM05CH101J50AHF
Rohm MCH155A068
C1
C5
Murata GRM615C0G7R5D50
Kyocera CM05CH100J50AHF
Kyocera CM05CH101J50AHF
Kyocera CM05CH101J50AHF
Kyocera CM05CH100J50AHF
Kyocera CM05CH100J50AHF
Kyocera CM05CH100J50AHF
Coilcraft 0402CS5N6XJBW
Toko LL1005-FHL3N3S
C6
C7
100pF
100pF
10pF
C10
C13
C16
C18
L1
10pF
10pF
5.6nH
3.3nH
39nH
L2
L3
Toko LL1005-FHL39NJ
L4
10nH
Toko LL1005-FHL10NJ
R1
1.8kohm
220ohm
Rohm MCR01MZSJ182
Rohm MCR01MZSJ221
R4
[1, 2]
Electrical Specifications
T = 25 °C, Vdd1=5V, Vdd2=5V, Vbias=5V, F =1.95GHz, unless stated otherwise.
A
RF
Symbol
Idd1
Idd2
Ibias
Gain
NF
Parameter and Test Condition
Current at Q1
Units
mA
mA
mA
dB
Min.
35
Typ.
45
Max.
52
Current at Q2
75
110
5
140
Bias Current for Q2
Associated Gain
30.2
31.7
0.68
38
33.3
1.0
Noise Figure in 50Ω system
dB
OIP3
Output Third Order Intercept Point
dBm
(2-tone @ FRF +/- 1MHz, Pin = -25dBm)
OP1dB
IRL
Output Power at 1dB Gain Compression
Input Return Loss
dBm
dB
23.5
13
ORL
Output Return Loss
dB
15
S12
Reverse Isolation
dB
-50
Notes:
1. Measurements obtained using demo board described in Figure 5 with component list in Table 1. Input and Output trace loss is not de-embedded
from the measurement.
2. Guaranteed specifications are 100% tested in production test circuit.
4
MGA-14516 Typical Performance
T = 25°C, Vdd1=5V, Vdd2=5V, Vbias=5V unless stated otherwise. Measured on demo board in Figure 5 with compo-
A
nents listed in Table 1.
60
50
40
30
20
10
0
140
120
100
80
60
40
20
0
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
Figure 7. Idd1 vs. Temperature
Figure 8. Idd2 vs. Temperature
6
5
4
3
2
1
0
36
34
32
30
28
26
24
-40°C
-30°C
25°C
85°C
-60
-40
-20
0
20
40
60
80
100
1.65
1.75
1.85
1.95
2.05
2.15
Temperature (°C)
Frequency (GHz)
Figure 9. Ibias vs. Temperature
Figure 10. Gain vs. Frequency and Temperature
1.4
1.3
1.2
1.1
1
-40°C
-30°C
25°C
85°C
0.9
0.8
0.7
0.6
0.5
0.4
1.65
1.75
1.85
1.95
2.05
2.15
Frequency (GHz)
Figure 11. NF vs. Frequency and Temperature
5
MGA-14516 Typical Performance
T
A
= 25°C, Vdd1=5V, Vdd2=5V, Vbias=5V unless stated otherwise. Measured on demo board in Figure 5 with compo-
nents listed in Table 1.
25
24
23
22
21
20
19
18
45
40
35
30
25
20
-40°C
-30°C
25°C
85°C
-40°C
-30°C
25°C
85°C
1.65
1.75
1.85
1.95
2.05
2.15
1.65
1.75
1.85
1.95
2.05
2.15
Frequency (GHz)
Frequency (GHz)
Figure 12. OIP3 vs. Frequency and Temperature
Figure 13. OP1dB vs. Frequency and Temperature
30
25
20
15
10
5
40
20
Gain
S12
IRL
0
ORL
-20
-40
-60
-80
0
0
2
4
6
8
10
0
2
4
6
8
10
Frequency (GHz)
Frequency (GHz)
Figure 14. IRL & ORL vs. Frequency
Figure 15. Gain & S12 vs. Frequency
42
40
38
36
34
32
30
25
24
23
22
21
20
19
36
34
32
30
28
26
24
22
2
Gain
NF
1.8
1.6
1.4
1.2
1
OIP3
OP1dB
0.8
0.6
1.7
1.9
2.1
2.3
2.5
2.7
1.7
1.9
2.1
2.3
2.5
2.7
Frequency (GHz)
Frequency (GHz)
Figure 16. Gain and NF vs. Frequency
Figure 17. OIP3 and OP1dB vs. Frequency
6
MGA-14516 Scattering Parameter and Noise Parameter Test Setup
Figure 19. Test setup for Q2 S & Noise Parameters data. C18=10pF
(Kyocera CM05CH100J50AHF) and R4=220Ω (Rohm MCR01MZSJ221).
Figure 18. Test setup for Q1 S & Noise Parameters data.
7
MGA-14516 Q1 Typical Scattering Parameters, Vdd1=5V, Idd1=45mA
S11
S21
S12
S22
Freq (GHz)
Mag
0.96
0.76
0.58
0.55
0.44
0.39
0.39
0.37
0.34
0.32
0.27
0.15
0.15
0.41
0.6
Ang
-9.2
Mag
25.54
18.78
13.36
12.33
8.65
6.85
6.51
5.26
4.55
4.16
3.89
3.15
2.46
2.19
1.8
Ang
142.9
129.4
106.3
101.8
84.7
74.6
72.7
63.7
55.7
46.7
35.3
9.3
Mag
Ang
31.5
39.6
53
Mag
0.68
0.62
0.61
0.61
0.61
0.62
0.62
0.62
0.58
0.51
0.42
0.48
0.64
0.6
Ang
-5.5
0.1
0.5
0.9
1
0.003
0.003
0.004
0.005
0.006
0.006
0.007
0.008
0.008
0.009
0.01
-37.2
-51.9
-54.3
-60.9
-62.5
-62.4
-60.6
-56
-14.9
-24
54.5
62.1
63.4
65.5
67.4
73.2
76.9
82.2
95.6
116.3
126.4
111.2
33.9
81.9
-26.4
-36.3
-41.5
-42.3
-44.8
-46.6
-52.7
-71.3
-126.8
-135.7
-138.9
150.5
95.3
1.5
1.9
2
2.5
3
3.5
4
-50.2
-45.4
-48.6
-128.6
-139.6
-130
5
0.011
0.016
0.03
6
-10.9
-30.6
-69
7
8
0.075
0.055
0.033
0.48
0.63
0.81
9
0.46
0.29
-104.8
-66.6
0.88
1.14
-72.6
-89.3
10
132
Note: S-parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350. Figure 18 shows the input and output reference planes.
MGA-14516 Q1 Typical Noise Parameter, Vdd1=5V, Idd1=45mA
Γopt
Freq (GHz)
1.5
Fmin(dB)
0.38
mag
0.38
0.37
0.33
0.38
ang.
Rn/50
0.04
0.04
0.04
0.04
90.52
1.7
0.45
107.31
122.23
136.86
1.9
0.53
2.4
0.57
Note: Noise parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350.
Figure 18 shows the input and output reference planes.
8
MGA-14516 Q2Typical Scattering Parameters, Vdd2=5V, Vbias=5V, IDD2=110mA
S11
S21
S12
S22
Freq (GHz)
Mag
0.19
0.17
0.17
0.17
0.12
0.09
0.1
Ang
-147.9
149.6
122
Mag
6.24
5.14
5.11
5.12
5.24
5.33
5.33
5.23
5.18
3.76
1.72
0.59
0.28
0.15
0.04
0.01
0.01
Ang
147.2
147
Mag
Ang
4.1
Mag
0.65
0.61
0.53
0.51
0.34
0.16
0.12
0.09
0.04
0.26
0.4
Ang
-170.6
175
0.1
0.5
0.9
1
0.051
0.051
0.056
0.058
0.066
0.071
0.071
0.066
0.05
-2.2
128.8
123.9
97.1
-7
167.6
165.5
153.3
146.6
148.7
-125.5
-125.3
-54.9
-99.7
-119.7
-107.4
-76.1
-53.6
-27
115.6
76.4
-9
1.5
1.9
2
-23.2
-41.5
-47
-9.4
72.6
-34.3
-95.1
-115
-126.2
-154.7
164.3
133.3
74.5
66.1
2.5
3
0.25
0.34
0.52
0.63
0.69
0.7
32.1
-80.1
-120.9
-154.7
-165.4
141
-8.3
3.5
4
-64.8
-99.5
-129.9
-155.1
165
0.025
0.019
0.019
0.023
0.025
0.008
0.006
0.008
5
0.37
0.32
0.33
0.48
0.47
0.58
6
105.2
66.5
35.3
47.1
153.6
7
0.65
0.83
0.71
0.52
8
-1.1
124
9
-1.2
114.2
159.2
10
34.1
-8.3
Note: S-parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350. Figure 19 shows the input and output reference planes.
MGA-14516 Q2Typical Noise Parameter, Vdd2=5V, Idd2=110mA
Γopt
Freq (GHz)
1.5
Fmin(dB)
3.11
mag
0.12
0.12
0.12
0.24
ang.
Rn/50
0.36
0.44
0.52
0.57
15.54
36.67
57.69
93.03
1.7
3.13
1.9
3.27
2.4
3.68
Note: Noise parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350.
Figure 19 shows the input and output reference planes.
9
Part Number Ordering Information
Part Number
No. of Devices
1000
Container
7”Reel
MGA-14516-TR1G
MGA-14516-TR2G
MGA-14516-BLKG
3000
13”Reel
100
antistatic bag
SLP4X4 Package Dimension
2.200
Pin #1 Identification
Chamfer 0.450 x 45º
0.20 Ref
Exp.DAP
Pin 1 Dot
by marking
4.00 0.10
0.30
0.55
14516
YYWW
XXXX
2.200
4.00 0.10
Exp.DAP
0.65 Bsc
1.95
0.00 0.05
0.85 0.05
Ref
SideView
BottomView
TopView
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating.
3. Dimensions are exclusive of mold ash and metal burr.
10
PCB Land Pattern and Stencil Design
0.650
0.650
0.270
0.300
2.200
1.980
0.650
0.485
0.350
2.200
0.492
1.980
Stencil Outline
PCB Land Pattern (Top View)
2.200
1.980
0.650
0.300
0.270
2.200
1.980
0.485
Combines PCB & Stencil Layouts
All Dimension are in MM
11
Device Orientation
REEL
USER FEED DIRECTION
14516
YYWW
XXXX
14516
YYWW
XXXX
14516
YYWW
XXXX
CARRIER
TAPE
USER
FEED
DIRECTION
TOP VIEW
END VIEW
COVER TAPE
Tape Dimensions
∅ 1.50 + .10
1.75 0.10
8.0 0.10
4.0 0.10
2.00 0.05
+
+
+
+
5.50 .05
12.00
+0.30/-0.10
∅ 1.50 +0.25
.279 0.02
10º MAX.
10º MAX.
1.13 0.10
Ko
4.25 0.10
Bo
4.25 0.10
Ao
12
Reel Dimension - 7 Inch
A
B
ØE
ØD
SIDE VIEW
F
FRONT VIEW
BACK VIEW
SPECIFICATION
TAPE
WIDTH
A
MAX
B
C1
0.5
ØD
0.5
ØE
(max)
F
(min)
ØG
0.2
ØH
(min)
+1.5–0.0
12mm
18.00
12.4
4.40
55.0
178
1.50
13.50
20.20
C1
TAPE SLOT
PLANE VIEW
Note: Surface resistivity to be <1012 Ohms/square
ARBOR HOLE
13
Reel Dimension - 13 Inch
ESD Label
(See Below)
RECYCLE SYMBOL
DETAIL “X”
EMBOSSED LINE X2
90.0mm length
LINES 147.0mm AWAY FROM CENTER POINT
EMBOSSED ‘M’ 5.0mm height
FRONT VIEW
11.90–15.40**
13.20 0.50*
Ø20.2 (MIN.)
RECYCLE SYMBOL
DETAIL “X”
+0.5
Ø13.0
–0.2
2.00 0.5
DETAIL “X”
SLOT 5.00 0.50
16.40”
MAX.
BACK VIEW
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved.
AV02-1049EN - December 9, 2009
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