UT61L1288 [ETC]
ASYNCHRONOUS STATIC RAM- High Speed ; 异步静态RAM-高速\n型号: | UT61L1288 |
厂家: | ETC |
描述: | ASYNCHRONOUS STATIC RAM- High Speed
|
文件: | 总10页 (文件大小:72K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
REVISION HISTORY
REVISION
DESCRIPTION
Date
Preliminary Rev. 0.1 Original.
Rev. 1.0
Jan 2,2002
May 20,2003
1.Revised CMOS low power operating :
Operating current : 195ꢀ150mA (max.)
Standby current : 30mA (max.) ꢀ1mA(Typ.)
2.Revised power supply : 3.0~3.6Vꢀ3.15~3.6V
3.Revised DC CHARACTERISTICE
I
I
I
I
I
I
CC –8ns (max) : 200ꢀ150mA
CC –10ns (max) : 195ꢀ120mA
CC –12ns (max) : 190ꢀ100mA
CC –15ns (max) : 150ꢀ80 mA
SB (max) : 30ꢀ10mA, ISB (typ) : NAꢀ3mA
SB1 (max) : 10ꢀ3mA, ISB1 (typ) : NAꢀ1mA
ISB1 (max)<1 mA for special order
4. Add order information for lead free product
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80077
1
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
___________________________________________________________________________________________________________
FEATURES
GENERAL DESCRIPTION
The UT61L1288 is a 1,048,576-bit high-speed CMOS
static random access memory organized as 131,072
words by 8 bits.
ꢁ Fast access time :
8ns for Vcc=3.15V~3.6V
10/12/15ns for Vcc=3.0V~3.6V
ꢁ CMOS low power operating :
Operating current : 150mA (max.)
Standby current : 1mA (Typ.)
ꢁ Single 3.15~3.6V power supply
ꢁ Operating temperature :
The UT61L1288 operates from a single 3.15~3.6V
power supply and all inputs and outputs are fully TTL
compatible.
It is fabricated using high performance, high reliability
CMOS technology.
℃
℃
Commercial : 0 ~70
ꢁ All TTL compatible inputs and outputs
ꢁ Fully static operation
ꢁ Three state outputs
ꢁ Package : 32-pin 8mm x 13.4mm STSOP
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
A16
A15
A0
A1
A2
1
2
3
4
5
6
7
8
9
32
31
30
29
A14
A13
OE
×
128K 8 bit
A3
A0-A16
DECODER
MEMORY
ARRAY
CE
28
27
26
25
24
23
22
21
20
19
18
17
IO0
IO1
I/O7
I/O6
Vss
Vcc
I/O5
I/O4
A12
A11
Vcc
Vss
Vcc
Vss
IO2
IO3
WE
A4
10
11
I/O DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
12
13
14
15
16
A5
A10
A9
A6
A7
A8
CE
STSOP
CONTROL
CIRCUIT
OE
WE
PIN DESCRIPTION
SYMBOL
A0 - A16
I/O0 - I/O7
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip enable Input
CE
Write Enable Input
Output Enable Input
WE
OE
VCC
VSS
NC
Power Supply
Ground
No Connection
_________________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
2
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to Vss
Operating Temperature
Storage Temperature
Power Dissipation
SYMBOL
VTERM
TA
RATING
-0.5 to 4.6
0 to 70
-65 to 150
1
UNIT
V
℃
Commercial
TSTG
℃
W
PD
DC Output Current
Soldering Temperature (under 10 secs)
IOUT
Tsolder
50
260
mA
℃
*Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
I/O OPERATION
SUPPLY CURRENT
CE
H
L
L
L
WE
X
H
H
L
OE
X
H
L
Standby
Output Disable
Read
High - Z
High - Z
DOUT
ISB,ISB1
ICC
ICC
Write
X
DIN
ICC
Note: H = VIH, L=VIL, X = Don't care.
℃
(TA = 0 to 70
℃
)
DC ELECTRICAL CHARACTERISTICS
SYMBOL TEST CONDITION
MIN. TYP. MAX.
PARAMETER
UNIT
8
3.15 3.3
3.6
3.6
VCC+0.3
0.8
2
V
V
V
V
A
µ
A
µ
V
V
mA
mA
mA
mA
Power Voltage
VCC
10/12/15 3.0
3.3
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
VIH
VIL
ILI
2.0
-0.3
- 2
-
-
-
-
-
-
-
-
-
-
≦
≦
VSS VIN VCC
ILO
VOH
VOL
≦
≦
- 2
2.4
2
-
VSS VI/O VCC; Output Disable
IOH= -4mA
IOL= 8mA
Cycle time=min, 100%duty
I/O=0mA, =V
-
-
-
-
-
0.4
150
120
100
80
8
Operating Power
Supply Current
10
12
15
CE
IL
ICC
Standby Current (TTL)
ISB
-
3
10
mA
=VIH, other pins =VIL or VIH
CE
CE
=V -0.2V, other pins at 0.2V
CC
Standby Current (CMOS)
Notes:
ISB1
-
1
3*4
mA
or Vcc-0.2V
1. Overshoot : Vcc+3.0v for pulse width less than 6ns.
2. Undershoot : Vss-3.0v for pulse width less than 6ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
4. ISB1< 1mA for special order or requirement.
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
3
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
℃
(TA=25 , f=1.0MHz)
CAPACITANCE
PARAMETER
Input Capacitance
SYMBOL
CIN
MIN.
MAX.
UNIT
pF
-
6
Input/Output Capacitance
CI/O
-
8
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
3ns
1.5V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
CL=30pF, IOH/IOL= -4mA / 8mA
℃
(TA = 0 to 70
℃
AC ELECTRICAL CHARACTERISTICS
)
(1) READ CYCLE
UT61L1288
-8
UT61L1288 UT61L1288 UT61L1288
-10
-12
-15
PARAMETER
SYMBOL
UNIT
∼
∼
∼
∼
VCC=3.15 3.6 VCC=3.0 3.6 VCC=3.0 3.6 VCC=3.0 3.6
MIN. MAX. MIN. MIN. MIN. MAX. MIN. MAX.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
8
-
-
-
8
8
4
-
10
-
-
-
10
10
5
-
-
5
5
-
12
-
-
-
12
12
6
-
-
6
6
-
15
-
-
-
15
15
7
-
-
7
7
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
3
0
-
-
3
3
0
-
-
3
3
0
-
-
3
3
0
-
-
3
-
4
4
-
(2) WRITE CYCLE
PARAMETER
UT61L1288
-8
UT61L1288 UT61L1288 UT61L1288
-10 -12 -15
SYMBOL
UNIT
∼
∼
∼
∼
VCC=3.15 3.6 VCC=3.0 3.6 VCC=3.0 3.6 VCC=3.0 3.6
MIN. MAX. MIN. MIN. MIN. MAX. MIN. MAX.
Write Cycle Time
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
8
7
7
0
7
0
5.5
0
3
-
-
-
-
-
-
-
-
-
-
4
10
8
8
0
8
0
6
0
3
-
-
-
-
-
-
-
-
-
-
12
9
9
0
9
0
7
0
3
-
-
-
-
-
-
-
-
-
-
15
10
10
0
10
0
8
0
3
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
tOW*
tWHZ*
5
6
7
*These parameters are guaranteed by device characterization, but not production tested.
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
4
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
tAA
tOH
tOH
Previous data valid
Dout
Data Valid
READ CYCLE 2 (
and
Controlled) (1,3,4,5)
CE
OE
tRC
Address
CE
tAA
tACE
OE
tCHZ
tOHZ
tOH
tOE
tCLZ
tOLZ
Dout
High-Z
High-Z
Data Valid
Notes :
1.
is high for read cycle.
WE
2.Device is continuously selected
=low,
=low.
CE
OE
3.Address must be valid prior to or coincident with
=low,; otherwise tAA is the limiting parameter.
CE
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured 500mV from steady state.
±
5.At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ
.
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
5
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
WRITE CYCLE 1 (
Controlled) (1,2,3,5,6)
WE
tRC
Address
tAA
tOH
tOH
Previousdatavalid
Dout
DataValid
WRITE CYCLE 2 (
Controlled) (1,2,5,6)
CE
tRC
Address
tAA
CE
OE
tACE
tCHZ
tOHZ
tOH
tOE
tCLZ
tOLZ
Dout
High-Z
High-Z
Data Valid
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80077
6
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
Notes :
1.
,
must be high during all address transitions.
WE CE
2.A write occurs during the overlap of a low
, low
.
WE
CE
3. During a
controlled write cycle with
OE
low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be
WE
placed on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5. If the low transition occurs simultaneously with or after low transition, the outputs remain in a high impedance state.
CE
WE
±
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
7
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
PACKAGE OUTLINE DIMENSION
32-pin 8mm x 13.4mm STSOP Package Outline Dimension
HD
c
L
32
1
17
16
"A"
y
Seating Plane
D
16
17
GAUGE PLANE
0
SEATING PLANE
L1
"A" DATAIL VIEW
1
32
UNIT
INCH(BASE)
0.047 (MAX)
MM(REF)
SYMBOL
A
A1
A2
b
1.20 (MAX)
±
±
0.10 0.05
±
1.00 0.05
±
0.200 0.025
0.004 0.002
±
0.039 0.002
±
0.008 0.001
±
±
11.800 0.100
D
0.465 0.004
±
±
E
0.315 0.004
8.000 0.100
e
0.020 (TYP)
0.50 (TYP)
±
±
13.40 0.20.
HD
L1
y
0.528 0.008
±
±
0.0315 0.004
0.80 0.10
0.003 (MAX)
0.076 (MAX)
o
o
Θ
∼
∼
0
5o
0
5o
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
8
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
ORDERING INFORMATION
PART NO.
ACCESS TIME (ns)
PACKAGE
UT61L1288LS-8
UT61L1288LS-10
UT61L1288LS-12
UT61L1288LS-15
8
32 PIN STSOP
32 PIN STSOP
32 PIN STSOP
32 PIN STSOP
10
12
15
ORDERING INFORMATION (for lead free product)
PART NO.
ACCESS TIME (ns)
PACKAGE
UT61L1288LSL-8
UT61L1288LSL-10
UT61L1288LSL-12
UT61L1288LSL-15
8
32 PIN STSOP
32 PIN STSOP
32 PIN STSOP
32 PIN STSOP
10
12
15
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80077
9
UTRON
UT61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev 1.0
THIS PAGE IS LEFT BLANK INTENTIONALLY.
UTRON TECHNOLOGY INC.
P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
10
相关型号:
©2020 ICPDF网 联系我们和版权申明