W53322 [ETC]

;
W53322
型号: W53322
厂家: ETC    ETC
描述:

外围集成电路 微控制器 时钟
文件: 总8页 (文件大小:96K)
中文:  中文翻译
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W53322/W53342  
60" Voice/Melody/LCD Controller  
(ViewTalkTM Series)  
GENERAL DESCRIPTION  
The W53322/W53342 are high-performance 4-bit microcontrollers (µC) with built-in speech, melody  
and 32*48/32*64 LCD driver which includes internal pump circuit. The 4-bit uc core contains dual clock  
source, 4-bit ALU, two 8-bit timers, one divider, 20 pin input or output, 7 interrupt sources , 8-level  
subroutine nesting for interrupt applications. Speech unit can be implemented with Winbond 60 sec  
Power Speech using ADPCM algorithm. Melody unit provides dual tone output and can store up to 1k  
notes. Power reduction mode is also built in to minimize power dissipation. It is ideal for games,  
educational toys, remote controllers, watches, clocks and other application’ products which  
incorporate both LCD display and melody.  
FEATURES  
Operating voltage: 2.4 volt ~ 5.5 volt  
Dual clock operating system  
RC/Crystal (400 KHz to 4 MHz) for main clock  
32.768 KHz crystal oscillation circuit for sub-oscillator  
Memory  
16k × 20 bit program ROM  
512 × 4 bit data RAM  
384 x 4/512 × 4 bit LCD RAM for W53322/W53342  
20 input/output pins  
Ports for input only: 2 ports/8 pins  
Input/output ports: 2 ports/8 pins  
Port for output only: 1 port /4 pins  
Power-down mode  
Hold function: no operation (except for 32kHzoscillator)  
Stop mode function: no operation (include 32kHz oscillator)  
Seven types of interrupts  
Five internal interrupts (Divider ,Timer 0, Timer 1, Speech, Melody)  
Two external interrupts (Port RC, Port RD)  
One built-in 14-bit clock frequency divider circuit  
Two built-in 8-bit programmable countdown timers  
Timer 0: one of two internal clock frequencies (FOSC/4 or FOSC/1024) can be selected  
Timer 1: built-in auto-reload function includes internal timer, external event counter from RC.0 or  
TONE output function (can be used as IR carrier output if main clock is 455 kHz)  
Built-in 18/14-bit watchdog timer for system reset by mask code option  
Powerful instruction sets  
8-level subroutine (including interrupt) nesting  
Publication Release Date: March 1999  
- 1 -  
Revision A2  
W53322/W53342  
LCD driver output  
32 common × 48 segment/32 common × 64 segment for W53322/W53342 respectively  
1/16 or 1/32 duty, 1/5 or 1/7 bias, internal pump circuit option by special register  
Speech function  
Provides 1.4M bits dedicated speech ROM  
Direct driving output for speaker  
Maximum 256 sections available  
Melody function  
Provides 22 kbits dedicated melody ROM  
Provides 6 kinds of beat, 16 kinds of tempo, and pitch range from G3# to C7  
Tremolo, triple frequency and 3 kinds of percussion available  
Direct driving output for speaker  
Maximum 32 scores available  
Mix speech with melody available  
Multi-engine controller  
PWM output current option  
Chip On Board available  
- 2 -  
W53322/W53342  
BLOCK DIAGRAM  
SEG0 to SEG63  
V2 ~ V6  
COM0 to COM31  
LCD DRIVER  
VDD2  
VDD3  
DH1, DH2  
VLCD PUMP CIRCUIT  
PORT RA  
RAM  
VDD  
(1024*4)  
TEST  
RA0~3  
RB0~3  
RD0~3  
ACC  
ALU  
ROM  
(16K*20)  
PORT RB  
PORT RD  
PORT RC  
PC  
RC0~ 3  
Special Register  
IEF  
HEF  
PEF  
MLDH  
FLAG1 FLAG0  
HCF EVF  
PSR0 PM0  
STACK  
(8 Levels)  
RE0 to 3  
MR1  
PORT RE  
TONE  
SPCH  
LUP3  
RP0H  
.
LUP0 LUP1 LUP2  
LUC RP0L RP0M  
LED1  
LED2  
ROSC  
SPC_busy  
.
.
.
Speech  
SPC_busy  
PWM1  
PWM2  
( 1.4M bits )  
Interrup & Hold  
Mode Release  
Timer 1  
(8 Bit)  
Timer 0  
(8 Bit)  
MLD_busy  
MLD_play  
Dual Tone  
Melody  
VSS2  
(1K*22 ROM)  
Divider  
(14/10 Bit)  
Watch Dog Timer  
(18/14 Bit)  
VDDP  
VSS1  
Timing Generator  
RES  
XIN XOUT X32I X32O  
Publication Release Date: March 1999  
Revision A2  
- 3 -  
W53322/W53342  
PIN DESCRIPTION  
SYMBOL  
XIN  
I/O  
I
FUNCTION  
Input pin for oscillator. It can be connected to crystal, or can connect a  
resistor to VDD to generate main system clock. Oscillator can be  
stopped when SCR.1 is set to logic 1.  
XOUT  
X32I  
O
I
Output pin for oscillator which is connected to another crystal pin.  
32.768 KHz crystal input pin.  
32.768 KHz crystal output pin.  
X32O  
O
RA0 ~ RA3  
I/O  
General Input/Output port specified by PM1 register. If output mode is  
selected, PM0 register can be used to specify CMOS/NMOS driving  
capability option. Initial state is input mode.  
RB0 ~ RB3  
I/O  
General Input/Output port specified by PM2 register. If output mode is  
selected, PM0 register can be used to specify CMOS/NMOS driving  
capability option. Initial state is input mode.  
RC0 ~ RC3  
I
4-bit schmitt input with internal pull high option specified by PM0  
register. RC0 can be used as clock source for Timer 1. Each pin has  
an independent interrupt capability specified by PEFL special register.  
4-bit schmitt input port with internal pull high option specified by PM0  
register. Each pin has an independent interrupt capability specified by  
PEFH special register.  
RD0 ~ RD3  
I
RE0~RE3/TONE  
O
Output port only. RE3 may use as TONE if bit 0 of MR0 special  
register is set to logic 1.  
I
I
I
System reset pin with internal pull-high resistor is active low.  
Test pin. Connected to low for normal use.  
RES  
TEST  
ROSC  
Connects resistor to VDD to generate speech or melody clock source.  
VDDP  
I
Power source for PWM output.  
LED1  
LED2  
PWM1  
PWM2  
SEG0SEG63  
COM0COM31  
O
O
O
O
O
O
Synchronous LED1 output while speech play/melody is active.  
Synchronous LED2 output only while speech play is active.  
Speaker direct driving output 1 while speech or melody is active.  
Speaker direct driving output 2 while speech or melody is active.  
LCD segment output pins.  
LCD common signal output pins. The LCD alternating frequency is  
fixed at 64Hz.  
DH1, DH2  
VDD2  
I
O
Connection terminals for voltage doubler capacitor.  
Connects a 1uF capacitor to VSS1 to double VDD voltage output if  
triple pump option is enabled. Otherwise, VDD2 connects to VDD  
directly if double pump option is enabled.  
VDD3  
O/I  
An output if internal pump circuit is enabled. It connects a 1uF  
capacitor to VSS. Triple VDD voltage will be output if triple pump option  
is enabled. Otherwise, double VDD voltage will be output if double  
pump option is enabled.  
An input if internal pump voltage is disabled.  
- 4 -  
W53322/W53342  
V2 ~ V5  
O
LCD COM/SEG output driving voltage. If internal shunt resistor is  
disabled, external resistors need to be supplied to V2, V3, V4, V5 . A  
capacitor is suggested for stable LCD voltage level.  
V6  
I
I
External variable resistor connects between VDD3 and V6 to adjust  
LCD maximun voltage level.  
VDD  
Microcontroller Positive power supply (+).  
VSS1  
VSS2  
I
I
Negative power supply (-).  
Negative power supply (-).  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
RATING  
-0.3 to +7.0  
-0.3 to +7.0  
120  
0 to +70  
-55 to +150  
12  
UNIT  
V
V
mW  
°C  
°C  
V
Supply Voltage to Ground Potential  
Applied Input/Output Voltage  
Power Dissipation  
Ambient Operating Temperature  
Storage Temperature  
VDD3 Input Voltage  
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely  
affect the life and reliability of the device.  
DC CHARACTERISTICS  
(VDDVSS = 3.0V, Fm =1 MHz, Fs = 32.768 KHz, TA = 25° C, LCD on; unless otherwise specified)  
PARAMETER  
Op. Voltage  
Op. Current  
(No Load)  
SYM. CONDITIONS  
VDD  
MIN. TYP. MAX.  
UNIT  
V
uA  
uA  
uA  
uA  
2.4  
-
5.5  
IOP1  
Dual clock with crystal  
250  
250  
60  
300  
300  
100  
150  
150  
10  
Dual clock with RC type  
Single Clock  
Halt Mode Current  
(No Load, LCD OFF)  
Iop2  
Dual clock with crystal  
120  
120  
6
Dual clock with RC type  
Single clock  
Stop Mode Current  
Input Low Voltage  
Input High Voltage  
Port RA, RB Output Low  
Voltage  
Iop3  
VIL  
VIH  
LCD OFF  
-
-
1
uA  
V
VDD  
V
VSS  
0.7  
-
-
-
-
0.3*VDD  
1
0.4  
VABL IOL = 2.0 mA  
Port RA, RB Output High  
Voltage  
VABH IOH = -2.0 mA  
2.4  
-
-
V
Port RE Sink Current  
Port RE Source Current  
IEL  
IEH  
VOL = 0.4V  
VOH = 2.4V  
2
-2  
-
-
-
-
mA  
mA  
Publication Release Date: March 1999  
Revision A2  
- 5 -  
W53322/W53342  
PARAMETER  
Pull-up Resistor  
RES Pull-up Resistor  
LED1/LED2 Sink Current  
PWM1/2 Source Current  
SYM. CONDITIONS  
MIN. TYP. MAX.  
UNIT  
KΩ  
KΩ  
mA  
mA  
RCD  
RRES  
ILED  
ISPH  
Port RC, RD  
-
VO=1 volt  
100  
20  
350  
100  
8
1000  
500  
VOL = 2.4V CUR1~0=00  
VOL = 2.4V CUR1~0=01  
VOL = 2.4V CUR1~0=10  
VOL = 2.4V CUR1~0=11  
VOL = 0.6V CUR1~0=00  
VOL = 0.6V CUR1~0=01  
VOL = 0.6V CUR1~0=10  
VOL = 0.6V CUR1~0=11  
No Load, All Seg. ON  
IOH = ± 50 µA  
-30  
-60  
-90  
-120  
30  
PWM1/2 Sink Current  
ISPL  
mA  
60  
90  
120  
-
LCD Supply Current  
COM/SEG On Resistor  
VDD2 output voltage  
ILCD  
Ron  
50  
5K  
2
-
µA  
VDD  
10K  
VDOB VLCDEXT=0 &  
PMPV3B=0  
VLCDEXT=0 &  
PMPV3B=1  
VLCDEXT=0 &  
PMPV3B=0  
VLCDEXT=0 &  
PMPV3B=1  
1
3
2
7
VDD3 output Voltage  
VTRI  
VDD  
V
VDD3 Input Voltage  
VLCD VLCDEXT=1  
10  
AC CHARATERISTICS  
(VDDVSS = 3.0V, Fm = 1 MHz, Fs = 32.768 KHz, TA = 25° C, LCD on; unless otherwise specified)  
PARAMETER  
Sub-clock Frequency  
Main-clock Frequency  
Op. Frequency  
SYM.  
FS  
FM  
CONDITIONS  
Crystal type  
RC type/Crystal type 400  
SCR.0=1  
MIN.  
TYP.  
32768  
-
MAX. UNIT  
Hz  
4190  
KHz  
KHz  
FOSC  
32768  
SCR.0=0  
400  
-
4190  
Instruction Cycle Time  
Reset Active Width  
Interrupt Active Width  
Main clock RC frequency  
TCYC  
TRAW  
TIAW  
One machine cycle  
FOSC = 32.768 KHz  
FOSC = 32.768 KHz  
-
1
1
4/FOSC  
-
-
400K  
800K  
1M  
4M  
-
-
-
-
S
µS  
µS  
Hz  
FRXIN  
RXIN =2.4 MΩ  
RXIN =1.2 MΩ  
RXIN =910 KΩ  
RXIN =160 KΩ  
f(3V)f(2.4V)  
Frequency Deviation of  
main-clock FRXIN =1MHz  
-
-
10  
10  
%
f  
f
f(3V)  
ROSC Frequency  
Frequency Deviation of  
FROSC = 3MHz  
FROSC  
3.23  
-
MHz  
%
ROSC =1.2MΩ  
f(3V)f(2.4V)  
f  
f
f(3V)  
Frame frequency  
FLCD  
64  
Hz  
- 6 -  
W53322/W53342  
TYPICAL APPLICATION CIRCUIT  
32com*64seg  
LCD panel  
VDDP  
LED1  
LED2  
RC0~3  
RD0~3  
RA0~3  
RB0~3  
RE0~3  
PWM1  
PWM2  
DH1  
1uF  
1uF  
DH2  
RESETB  
JP1  
VDD2  
0.1uF  
Battery  
VDD  
1uF  
VDDP  
VDD  
VDD3  
50 ohm  
10uF  
(2)  
W53342  
R5  
0.1uF  
V6  
1.2M ohm  
R2  
ROSC  
XIN  
R3  
V5  
0.1uF  
0.1uF  
30pF  
X32IN  
V4  
0.1uF  
32.768kHz  
V3  
V2  
30pF  
X32O  
0.1uF  
R4  
Note :  
1.JP1 used to select double or triple pump.  
2.R5=0 if double pump is active.  
3.R3 and R4 are optional.  
4.LCD duty and bias are programmed by registers .  
Publication Release Date: March 1999  
Revision A2  
- 7 -  
W53322/W53342  
Winbond Electronics (H.K.) Ltd.  
Winbond Electronics North America Corp.  
Winbond Memory Lab.  
Winbond Microelectronics Corp.  
Winbond Systems Lab.  
Headquarters  
No. 4, Creation Rd. III,  
Science-Based Industrial Park,  
Hsinchu, Taiwan  
TEL: 886-3-5770066  
Rm. 803, World Trade Square, Tower II,  
123 Hoi Bun Rd., Kwun Tong,  
Kowloon, Hong Kong  
TEL: 852-27513100  
FAX: 852-27552064  
2730 Orchard Parkway, San Jose,  
FAX: 886-3-5792697  
CA 95134, U.S.A.  
TEL: 1-408-9436666  
FAX: 1-408-9436668  
http://www.winbond.com.tw/  
Voice & Fax-on-demand: 886-2-7197006  
Taipei Office  
11F, No. 115, Sec. 3, Min-Sheng East Rd.,  
Taipei, Taiwan  
TEL: 886-2-7190505  
FAX: 886-2-7197502  
Note: All data and specifications are subject to change without notice.  
- 8 -  

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