FDW258P_08 [FAIRCHILD]
P-Channel 1.8V Specified PowerTrench MOSFET; P沟道1.8V指定的PowerTrench MOSFET
| 型号： | FDW258P_08 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | P-Channel 1.8V Specified PowerTrench MOSFET |
| 文件： | 总5页 (文件大小：308K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 2008
FDW258P
P-Channel 1.8V Specified PowerTrench MOSFET
General Description
Features
This P-Channel 1.8V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (1.8V – 8V).
• –9 A, –12 V.
RDS(ON) = 11 mΩ @ VGS = –4.5 V
RDS(ON) = 14 mΩ @ VGS = –2.5 V
RDS(ON) = 20 mΩ @ VGS = –1.8 V
• Rds ratings for use with 1.8 V logic
• Low gate charge
Applications
• Load switch
• Motor drive
• DC/DC conversion
• Power management
• High performance trench technology for extremely
low RDS(ON)
• Low profile TSSOP-8 package
D
S
S
5
6
7
8
4
3
2
1
D
G
S
S
D
TSSOP-8
Pin 1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
–12
V
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
V
A
8
–9
–50
(Note 1)
PD
Power Dissipation
(Note 1a)
(Note 1b)
1.3
0.6
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
87
114
RθJA
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
258P
FDW258P
13’’
12mm
2500 units
FDW258P Rev D1 (W)
2008 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–12
V
VGS = 0 V,
ID = –250 µA
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
–3
ID = –250 µA, Referenced to 25°C
mV/°C
IDSS
VDS = –10 V, VGS = 0 V
–1
100
–100
µA
nA
nA
IGSSF
IGSSR
VGS = 8 V,
VGS = –8 V.
VDS = 0 V
VDS = 0 V
On Characteristics
(Note 2)
Gate Threshold Voltage
VGS(th)
–0.4
–50
–0.6
3
–1.5
V
VDS = VGS
ID = –250 µA, Referenced to 25°C
,
ID = –250 µA
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient
mV/°C
mΩ
RDS(on)
Static Drain–Source
VGS = –4.5 V, ID = –9 A
8.6
11
14
20
14
On–Resistance
V
V
GS = –2.5 V, ID = –8 A
GS = –1.8 V, ID = –6.5 A
10.6
13.8
11.2
VGS =–4.5 V, ID = –9A, TJ=125°
ID(on)
gFS
On–State Drain Current
VGS = –4.5 V, VDS = –5 V
A
S
Forward Transconductance
VDS = –5 V,
ID = –9 A
50
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
5049
1943
1226
pF
pF
pF
VDS = –5 V,
f = 1.0 MHz
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
17
23
201
148
61
31
37
322
237
73
ns
ns
ns
V
DD = –6 V,
ID = –1 A,
VGS = –4.5 V, RGEN = 6 Ω
ns
Qg
Qgs
Qgd
nC
nC
nC
V
V
DS = –6 V,
ID = –9 A,
GS = –4.5 V
8
16
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
–1.25
–1.2
A
V
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = –1.25 A (Note 2)
–0.6
Voltage
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
87°C/W when
b)
114°C/W when mounted
on a minimum pad of 2 oz
copper.
mounted on a 1in2 pad
of 2 oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDW258P Rev. D1 (W)
Typical Characteristics
80
2.2
2
VGS = -4.5V
-3.5V
-2.5V
-2.0V
VGS = - 1.8V
60
40
20
0
1.8
1.6
1.4
1.2
1
-1.8V
-2.0V
-2.5V
-3.0V
40
-3.5V
-4.5V
0.8
0
0.5
1
1.5
2
2.5
3
0
20
60
80
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.3
1.2
1.1
1
0.025
ID = -9A
ID = -4.5A
V
GS = - 4.5V
0.021
0.017
0.013
0.009
0.005
TA = 125oC
TA = 25oC
0.9
0.8
-50
-25
0
25
50
75
100
125
150
1
2
3
4
5
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
80
10
TA = -55oC
VDS = -5V
25oC
VGS = 0V
1
60
40
20
0
125oC
TA = 125oC
0.1
25oC
0.01
-55oC
0.001
0.0001
0.5
1
1.5
2
2.5
0
0.2
0.4
0.6
0.8
1
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDW258P Rev. D1 (W)
Typical Characteristics
5
7000
6000
5000
4000
3000
2000
1000
0
ID = -9A
f = 1 MHz
VGS = 0 V
VDS = -4V
-6V
CISS
4
3
2
1
0
-8V
COSS
CRSS
0
10
20
30
40
50
60
0
3
6
9
12
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
50
40
30
20
10
0
100µs
SINGLE PULSE
1ms
RDS(ON) LIMIT
R
θJA = 114°C/W
10ms
T
A = 25°C
100ms
1s
10s
DC
1
VGS = -4.5V
0.1
SINGLE PULSE
R
θJA = 114oC/W
TA = 25oC
0.01
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θJA(t) = r(t) + RθJA
0.2
θJA = 114oC/W
0.1
0.1
0.05
P(pk)
0.02
t1
0.01
0.01
t2
J - TA = P * RθJA(t)
T
SINGLE PULSE
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDW258P Rev. D1 (W)
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Rev. I35
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