FQB11P06_04_技术文档

®

QFET

FQB11P06 / FQI11P06

60V P-Channel MOSFET

General Description

Features

These P-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

•

-11.4A, -60V, R

= 0.175Ω @V = -10 V

DS(on) GS

Low gate charge ( typical 13 nC)

Low Crss ( typical 45 pF)

Fast switching

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand a high energy pulse in the

avalanche and commutation modes. These devices are

well suited for low voltage applications such as automotive,

DC/DC converters, and high efficiency switching for power

management in portable and battery operated products.

100% avalanche tested

Improved dv/dt capability

175°C maximum junction temperature rating

S

!

D

●

G

●

▶

●

!

▲

I²-PAK

D²-PAK

FQB Series

G

S

FQI Series

G D S

!

D

Absolute Maximum Ratings

T = 25°C unless otherwise noted

C

Symbol

Parameter

FQB11P06 / FQI11P06

Units

V

A

V

mJ

A

mJ

V/ns

W

V

I

Drain-Source Voltage

Drain Current

-60

-11.4

-8.05

-45.6

± 25

160

-11.4

5.3

-7.0

DSS

- Continuous (T = 25°C)

D

C

- Continuous (T = 100°C)

C

I

(Note 1)

Drain Current

Gate-Source Voltage

- Pulsed

DM

V

E

I

GSS

AS

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Power Dissipation (T = 25°C) *

AR

E

AR

dv/dt

3.13

53

P

A

D

Power Dissipation (T = 25°C)

W

C

- Derate above 25°C

Operating and Storage Temperature Range

0.35

-55 to +175

W/°C

°C

T , T

J

STG

Maximum lead temperature for soldering purposes,

1/8" from case for 5 seconds

T

300

°C

L

Thermal Characteristics

Symbol

Parameter

Typ

--

Max

2.85

40

Units

°C/W

R

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient *

Thermal Resistance, Junction-to-Ambient

θJC

θJA

--

62.5

* When mounted on the minimum pad size recommended (PCB Mount)

Rev. B5, March 2004

Elerical Characteristics

T = 25°C unless otherwise noted

C

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

BV

∆BV

/

V

I

= 0 V, I = -250 µA

GS D

Drain-Source Breakdown Voltage

Breakdown Voltage Temperature

Coefficient

-60

--

V

DSS

∆T

= -250 µA, Referenced to 25°C

-0.07

V/°C

D

J

I

V

= -60 V, V = 0 V

--

-1

-10

-100

100

µA

nA

DSS

DS

GS

Zero Gate Voltage Drain Current

= -48 V, T = 150°C

DS

GS

C

I

= -25 V, V = 0 V

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

GSSF

GSSR

DS

I

= 25 V, V = 0 V

DS

On Characteristics

V

R

V

= V , I = -250 µA

Gate Threshold Voltage

Static Drain-Source

On-Resistance

-2.0

--

-4.0

0.175

--

V

Ω

S

GS(th)

DS

GS

DS

GS

D

DS(on)

= -10 V, I = -5.7 A

0.14

5.1

D

g

= -30 V, I = -5.7 A

(Note 4)

Forward Transconductance

--

FS

D

Dynamic Characteristics

C

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

--

420

195

45

550

250

60

pF

iss

V

= -25 V, V = 0 V,

GS

DS

oss

rss

f = 1.0 MHz

Switching Characteristics

t

Q

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

--

6.5

40

15

45

13

25

90

40

100

17

--

ns

d(on)

V

R

= -30 V, I = -5.7 A,

= 25 Ω

DD

D

r

G

d(off)

f

(Note 4, 5)

ns

nC

g

V

= -48 V, I = -11.4 A,

DS

GS

D

2.0

6.3

= -10 V

gs

gd

--

Drain-Source Diode Characteristics and Maximum Ratings

I

Maximum Continuous Drain-Source Diode Forward Current

Maximum Pulsed Drain-Source Diode Forward Current

--

83

0.26

-11.4

-45.6

-4.0

--

A

V

ns

µC

S

SM

V

t

V

= 0 V, I = -11.4 A

Drain-Source Diode Forward Voltage

Reverse Recovery Time

SD

GS

S

= 0 V, I = -11.4 A,

rr

GS

S

dI / dt = 100 A/µs

(Note 4)

Q

Reverse Recovery Charge

--

F

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 1.44mH, I = -11.4A, V = -25V, R = 25 Ω, Starting T = 25°C

AS

DD

G

DSS,

J

3. I ≤ -11.4A, di/dt ≤ 300A/µs, V ≤ BV

Starting T = 25°C

J

SD

DD

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Rev. B5, March 2004

Typical Characteristics

V_GS

Top : - 15.0 V

- 10.0 V

- 8.0 V

- 7.0 V

10¹

10⁰

- 6.0 V

- 5.5 V

- 5.0 V

Bottom : - 4.5 V

175℃

10⁰

25℃

-55℃

※

Notes :

1. 250µ s Pulse Test

2. T_C= 25

※

Notes :

1. V_DS= -30V

2. 250µ s Pulse Test

℃

-1

10

-1

10

10⁰

10¹

2

4

6

8

10

-V_GS, Gate-Source Voltage [V]

-V_DS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

0.8

10¹

10⁰

0.6

0.4

0.2

0.0

V_GS= - 10V

V_GS= - 20V

※

Notes :

25

℃

175

℃

1. V_GS= 0V

2. 250µ s Pulse Test

※

Note : T = 25℃

J

-1

10

0

10

20

30

40

50

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

-I_D, Drain Current [A]

-V_SD, Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

1200

1000

800

600

400

200

0

12

10

8

C

_iss= C_gs+ C_gd(C_ds= shorted)

_oss= C_ds+ C_gd

_rss= C_gd

C

V_DS= -30V

V_DS= -48V

C

oss

C

iss

※

Notes :

6

1. V_GS= 0 V

2. f = 1 MHz

4

C

rss

2

※

Note : I_D= -11.4 A

12

0

10⁰

10¹

-1

0

2

4

6

8

10

14

10

Q_G, Total Gate Charge [nC]

-V_DS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

Rev. B5, March 2004

Typical Characteristics (Continued)

2.5

2.0

1.5

1.0

0.5

0.0

1.2

1.1

1.0

※

Notes :

0.9

※

Notes :

1. V_GS= 0 V

2. I_D= -250 µ A

1. V_GS= -10 V

2. I_D= -5.7 A

0.8

-100

-50

0

50

100

150

200

-100

-50

0

50

100

150

200

T_J, Junction Temperature [^oC]

T, Junction Temperature [^oC]

J

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

12

10

8

Operation in This Area

is Limited by R _DS(on)

10²

10¹

10⁰

100 µs

1 ms

10 ms

6

DC

4

※

Notes :

1. T_C= 25 ^o

C

2

2. T_J= 175 ^o

3. Single Pulse

-1

0

10

10⁰

10¹

10²

25

50

75

100

125

150

175

T_C, Case Temperature [℃]

-V_DS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

D = 0 .5

1 0 ⁰

※

N o te s

:

0 .2

1 . Z _{θ J C}(t)

=

2 .8 5 ℃ /W M a x.

2 . D u ty F a c to r, D = t₁/t₂

0 .1

3 . T _{J M}

-

T _C

=

P _D

* Z _{θ J C}(t)

M

0 .0 5

1 0 ^-1

0 .0 2

0 .0 1

P_DM

t₁

sin g le p u lse

t₂

1 0 ^-2

1 0 ^-5

1 0 ^-4

1 0 ^-3

1 0 ^-2

1 0 ^-1

1 0 ⁰

1 0 ¹

t₁, S q u a re W a ve P u ls e D u ra tio n [s e c]

Figure 11. Transient Thermal Response Curve

Rev.B5, March 2004

Gate Charge Test Circuit & Waveform

V_GS

Same Type

50KΩ

as DUT

-10V

Q_g

12V

200nF

300nF

V_DS

V_GS

Q_gs

Q_gd

DUT

-3mA

Charge

Resistive Switching Test Circuit & Waveforms

R_L

t _on

t _off

V_DS

t_d(on)

t_r

t_d(off)

t_f

V_DD

V_GS

R_G

10%

DUT

-10V

90%

V_DS

Unclamped Inductive Switching Test Circuit & Waveforms

BV_DSS

L

1

2

----

--------------------

BV_DSS- V_DD

E_AS

=

LI_AS

V_DS

I_D

2

t _p

Time

V_DD

V_DS(t)

R_G

V_DD

I_D(t)

DUT

-10V

I_AS

BV_DSS

t _p

Rev. B5, March 2004

Peak Diode Recovery dv/dt Test Circuit & Waveforms

+

V_DS

DUT

I _SD

_

L

Driver

R_G

Compliment of DUT

(N-Channel)

V_DD

V_GS

• dv/dt controlled by R_G

• I_SDcontrolled by pulse period

Gate Pulse Width

--------------------------

Gate Pulse Period

V_GS

D =

10V

( Driver )

Body Diode Reverse Current

I_RM

I _SD

( DUT )

di/dt

I_FM, Body Diode Forward Current

V_SD

V_DS

( DUT )

Body Diode

Forward Voltage Drop

V_DD

Body Diode Recovery dv/dt

Rev.B5, March 2004

Package Dimensions

D²-PAK

4.50 ±0.20

9.90 ±0.20

+0.10

–0.05

1.30

0.10 ±0.15

2.40 ±0.20

0.80 ±0.10

1.27 ±0.10

+0.10

0.50

–0.05

2.54 TYP

10.00 ±0.20

(8.00)

(4.40)

10.00 ±0.20

(2XR0.45)

0.80 ±0.10

Dimensions in Millimeters

Rev. B5, March 2004

Package Dimensions (Continued)

I²-PAK

4.50 ±0.20

9.90 ±0.20

+0.10

–0.05

1.30

1.27 ±0.10

1.47 ±0.10

0.80 ±0.10

+0.10

–0.05

0.50

2.40 ±0.20

2.54 TYP

10.00 ±0.20

Dimensions in Millimeters

Rev.B5, March 2004

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not intended to be an exhaustive list of all such trademarks.

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PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY

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CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.

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As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I9


型号：	FQB11P06_04
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	60V P-Channel MOSFET 60V P沟道MOSFET
文件：	总9页 (文件大小：654K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FQB11P06_04 [FAIRCHILD]

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