USB1T1102RMPX [FAIRCHILD]
Universal Serial Bus Peripheral Transceiver with Voltage Regulator; 通用串行总线外设收发器，稳压器
| 型号： | USB1T1102RMPX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Universal Serial Bus Peripheral Transceiver with Voltage Regulator |
| 文件： | 总14页 (文件大小：1289K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2004
Revised August 2004
USB1T1102 • USB1T1102R (Preliminary)
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
General Description
Features
■ Complies with Universal Serial Bus Specification 2.0
This chip provides a USB Transceiver functionality with a
voltage regulator that is compliant to USB Specification
Rev 2.0. this integrated 5V to 3.3V regulator allows inter-
facing of USB Application specific devices with supply volt-
ages ranging from 1.65V to 3.6V with the physical layer of
Universal Serial Bus. It is capable of operating at 12Mbits/s
(full speed) data rates and hence is fully compliant to USB
Specification Rev 2.0. The Vbusmon pin allows for monitor-
ing the Vbus line.
■ Integrated 5V to 3.3V voltage regulator for powering
VBus
■ Utilizes digital inputs and outputs to transmit and receive
USB cable data
■ Supports full speed (12Mbits/s) data rates
■ Ideal for portable electronic devices
■ MLP technology package (16 pin) with HBCC footprint
■ 15kV contact HBM ESD protection on bus pins
The USB1T1102 also provides exceptional ESD protection
with 15kV contact HBM on D+, D− pins.
Ordering Code:
Order Number
Package Number
MLP14D
Package Description
USB1T1102MPX
14-Terminal Molded Leadless Package (MLP), 2.5mm Square
USB1T1102RMPX
(Preliminary)
MLP14D
14-Terminal Molded Leadless Package (MLP), 2.5mm Square
USB1T1102MHX
MLP16HB
MLP16HB
16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
USB1T1102RMHX
(Preliminary)
Logic Diagram
Note: On the USB1T1102R the 1.5k resistor is integrated into the part, and connects VPU and D+ eliminating the need for this external pull-up resistor.
© 2004 Fairchild Semiconductor Corporation
DS500877
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Connection Diagrams
MLP16 GND Exposed Diepad
MLP14 GND Exposed Diepad
(Bottom View)
(Bottom View)
Terminal Descriptions
Terminal Number
MLP14 MLP16
Terminal
Name
I/O
Terminal Description
1
1
OE
I
Output Enable:
Active LOW enables the transceiver to transmit data on the bus. When not
active the transceiver is in the receive mode (CMOS level is relative to VCCIO
)
2
2
RCV
O
I/O
I/O
I
Receive Data Output:
Non-inverted CMOS level output for USB differential Input (CMOS output level
is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable
and preserved during SE0 condition.
3
4
5
3
4
5
Vp/Vpo
Vm/Vmo
SUSPND
Single-ended D+ receiver output VP (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Pin also acts as drive data input Vpo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Single-ended D− receiver output Vm (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Pin also acts as drive data input Vmo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Suspend:
Enables a low power state (CMOS level is relative to VCCIO). While the
SUSPND pin is active (HIGH) it will drive the RCV pin to logic “0” state.
—
6
6
7
NC
No Connect
VCCIO
Supply Voltage for digital I/O pins (1.65V to 3.6V):
When not connected the D+ and D− pins are in 3-STATE. This supply bus is
totally independent of VCC (5V) and VREG (3.3V).
7
8
Vbusmon
O
Vbus monitor output (CMOS level relative to VCCIO):
When Vbus > 4.1V then Vbusmon = HIGH and when Vbus < 3.6V then
Vbusmon = LOW. If SUSPND = HIGH then Vbusmon is pulled HIGH.
9, 8
10, 9
D+, D−
AI/O Data +, Data −:
Differential data bus conforming to the USB standard.
10
—
11
11
12
13
NC
NC
No Connect
No Connect
V
REG (3.3V)
Internal Regulator Option:
Regulated supply output voltage (3.0V to 3.6V) during 5V operation;
decoupling capacitor of at least 0.1 µF is required.
Regulator ByPass Option:
Used as supply voltage input for 3.3V operation.
12
14
VCC (5.0V)
Internal Regulator Option:
Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB
line Vbus.
Regulator ByPass Option:
Connected to VREG (3.3V)
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2
Terminal Descriptions (Continued)
Terminal Number
MLP14 MLP16
Terminal
Name
I/O
Terminal Description
Pull-up Supply Voltage (3.3V ± 10%):
13
15
VPU (3.3V)
Connect an external 1.5kΩ resistor on D+ (FS data rate);
Pin function is controlled by Config input pin:
Config = LOW − VPU (3.3V) is floating (High Impedance) for zero pull-up current.
Config = HIGH − VPU (3.3V) = 3.3V; internally connected to VREG (3.3V).
14
16
Config
GND
I
USB connect or disconnect software control input.
Configures 3.3V to external 1.5kΩ resistor on D+ when HIGH.
Exposed Exposed
Diepad Diepad
GND GND supply down bonded to exposed diepad to be connected to the PCB GND.
The USB1T1102 differs from earlier USB Transceiver in
that the Vp/Vm and Vpo/Vmo pins are now I/O pins rather
Functional Description
The USB1T1102 transceiver is designed to convert CMOS
data into USB differential bus signal levels and to convert
USB differential bus signal to CMOS data.
than discrete input and output pins. Table 1 describes the
specific pin functionality selection. Table 2 and Table 3
describe the specific Truth Tables for Driver and Receiver
operating functions.
To minimize EMI and noise the outputs are edge rate con-
trolled with the rise and fall times controlled and defined for
full speed data rates only (12Mbits/s). The rise, fall times
are balanced between the differential pins to minimize
skew.
The USB1T1102 also has the capability of various power
supply configurations to support mixed voltage supply
applications (see Table 4) and Section 2.1 for detailed
descriptions.
Functional Tables
TABLE 1. Function Select
Vp/Vpo
po Input
Vm/Vmo
SUSPND
OE
D+, D−
RCV
Function
L
L
Driving &
Receiving
Active
V
Vmo Input Normal Driving
(Differential Receiver Active)
L
H
H
H
L
Receiving
(Note 1)
Active
Vp Output Vm Output Receiving
Driving
Inactive
(Note 2)
Vpo Input
Vmo Input Driving during Suspend
(Differential Receiver Inactive)
H
3-STATE
(Note 1)
Inactive
(Note 2)
Vp Output Vm Output Low Power State
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.
Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling (K) is detected via
the single-ended receivers of the Vp/Vpo and Vm/Vmo pins.
TABLE 2. Driver Function (OE = L) using Differential Input Interface
V
m/Vmo
Vp/Vpo
Data
L
L
L
H
L
SE0 (Note 3)
Differential Logic 1
Differential Logic 0
Illegal State
H
H
H
Note 3: SE0 = Single Ended Zero
TABLE 3. Receiver Function (OE = H)
Vp/Vpo
Vm/Vmo
D+, D−
RCV
H
Differential Logic 1
H
L
L
L
H
L
Differential Logic 0
SE0
L
X
X = Don’t Care
3
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Power Supply Configurations and Options
The two modes of power supply operation are:
Normal Mode: VCCIO and VCC (5V) are connected or
CCIO, VCC (5V) and [VREG (3.3V) and VCC (5V) shorted
•
Sharing Mode: VCCIO is only supply connected. VCC and
VREG are not connected. In this mode the D+ and D−
•
pins are 3-STATE and the USB1T1102 allows external
signals up to 3.6V to share the D+ and D− bus lines.
Internally the circuitry limits leakage from D+ and D−
pins (maximum 10 µA) and VCCIO such that device is in
V
for Bypass mode]
1. For 5V operation VCC is connected to 5V source
(4.0V to 5.5V) and the internal voltage regulator then
produces 3.3V for the USB connections.
low power (suspended) state. Pins Vbusmon and RCV
are forced LOW as an indication of this mode with Vbus-
mon being ignored during this state.
2. For 3.3V operation both VCC and VREG are con-
nected to a 3.3V source (3.0V to 3.6V)
A summary of the Supply Configurations is described in
Table 4.
In both cases for normal mode the VCCIO is an indepen-
dent voltage source (1.65V to 3.6V) that is a function of
the external circuit configuration.
TABLE 4. Power Supply Configuration Options
Power Supply Mode Configuration
Normal (Regulated Output) Normal (Regulator Bypass)
Pins
Sharing
V
CC (5V)
Not Connected
Connected to 5V Source
Connected to VREG (3.3V)
[Max Drop of 0.3V]
(2.7V to 3.6V)
VREG (3.3V)
VCCIO
Not Connected
3.3V, 300 µA
Regulated Output
Connected to 3.3V Source
1.65V to 3.6V Source
3-STATE (Off)
1.65V to 3.6V Source
1.65V to 3.6V Source
V
PU (3.3V)
3.3V Available if
3.3V Available if
Config = HIGH
Config = HIGH
D+, D−
3-STATE
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Vp/Vpo, Vm/Vmo
RCV
L
L
Vbusmon
L
OE, SUSPND, Config
Hi-Z
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4
ESD Protection
ESD Performance of the USB1T1102
HBM D+/D−: 15.0kV
HBM, all other pins (Mil-Std 883E): 6.5kV
ESD Protection: D+/D− Pins
Since the differential pins of a USB transceiver may be
subjected to extreme ESD voltages, additional immunity
has been included in the D+ and D− pins without compro-
mising performance. The USB1T1102 differential pins have
ESD protection to the following limits:
FIGURE 1. Human Body ESD Test Model
•
•
15kV using the contact Human Body Model
8kV using the Contact Discharge method as specified in
IEC 61000-4-2
Human Body Model
Figure 1 shows the schematic representation of the Human
Body Model ESD event. Figure 2 is the ideal waveform rep-
resentation of the Human Body Model.
IEC 61000-4-2, IEC 60749-26 and IEC 60749-27
The IEC 61000-4-2 standard covers ESD testing and per-
formance of finished equipment, and as such evaluates the
equipment in its entirety for ESD immunity. Fairchild
Semiconductor has evaluated this device using the
IEC 6100-4-2 representative system model depicted in Fig-
ure 3. Under the additional standards set forth by the IEC,
this device is also compliant with IEC 60749-26 (HBM) and
IEC 60749-27 (MM).
FIGURE 2. HBM Current Waveform
Additional ESD Test Conditions
For additional information regarding our product test meth-
odologies and performance levels, please contact Fairchild
Semiconductor.
FIGURE 3. IEC 61000-4-2 ESD Test Model
5
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Absolute Maximum Ratings(Note 4)
Recommended Operating
Conditions
−0.5V to +6.0V
Supply Voltage (VCC)(5V)
I/O Supply Voltage (VCCIO
)
−0.5V to +4.6V
DC Supply Voltage VCC (5V)
I/O DC Voltage VCCIO
4.0V to 5.5V
Latch-up Current (ILU
)
1.65V to 3.6V
VI = −1.8V to +5.4V
150 mA
DC Input Voltage Range (VI)
DC Input Range for AI/O (VAI/O
Pins D+ and D−
0V to VCCIO +5.5V
0V to VCC
DC Input Current (IIK
)
)
VI < 0
−50 mA
0V to 3.6V
DC Input Voltage (VI)
(Note 5)
Operating Ambient Temperature
(TAMB
−0.5V to VCCIO +5.5V
±50 mA
)
−40°C to +85°C
DC Output Diode Current (IOK
O > VCC or VO < 0
)
V
DC Output Voltage (VO)
(Note 5)
−0.5V to VCCIO + 0.5V
Output Source or Sink Current (IO)
O = 0 to VCC
V
Current for D+, D− Pins
Current for RCV, Vm/Vp
DC VCC or GND Current
±50 mA
±15 mA
(ICC, IGND
)
±100 mA
ESD Immunity Voltage (VESD);
Contact HBM
Note 4: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristic tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Pins D+, D−, VCC (5.5V) and GND
All Other Pins
15kV
6.5kV
Storage Temperature (TSTO
)
−40°C to + 125°C
Power Dissipation (PTOT
)
Note 5: IO Absolute Maximum Rating must be observed.
ICC (5V)
ICCIO
48 mW
9 mW
DC Electrical Characteristics (Supply Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
CC (5V) = 4.0V to 5.5V or VREG (3.3V) = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V
V
Limits
−40°C to +85°C
Typ
Symbol
Parameter
Conditions
Units
Min
Max
VREG (3.3V)
Regulated Supply Output
Internal Regulator Option;
3.0
3.3
3.6
V
I
LOAD ≤ 300 µA
(Note 6)(Note 7)
ICC
Operating Supply Current (VCC5.0)
I/O Operating Supply Current
Transmitting and Receiving at
12 Mbits/s; CLOAD = 50 pF (D+, D−)
Transmitting and Receiving at
12 Mbits/s
4.0
8.0
2.0
mA
mA
(Note 8)
1.0
ICCIO
(Note 8)
ICC (IDLE)
Supply Current during
IDLE: VD+ ≥ 2.7V, VD− ≤ 0.3V;
SE0: VD+ ≤ 0.3V, VD− ≤ 0.3V
IDLE, SUSPND or SE0
SUSPND = HIGH
300
(Note 9)
20.0
µA
µA
FS IDLE and SE0 (VCC5.0)
ICCIO (STATIC) I/O Static Supply Current
ICC(SUSPND)
Suspend Supply Current
USB1T1102
25.0
OE = HIGH
(Note 9)
V
m = Vp = OPEN
µA
Suspend Supply Current
USB1T1102R
SUSPND = HIGH
OE = HIGH
40.0
(Note 10)
Vp = Vm = OPEN
ICCIO(SHARING) I/O Sharing Mode Supply Current
ID+ (SHARING) Sharing Mode Load Current on
D+/D− Pins
VCC (5V) Not Connected
VCC (5V) Not Connected
Config = LOW; VD± = 3.6V
20.0
10.0
µA
µA
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6
DC Electrical Characteristics (Continued)
Limits
−40°C to +85°C
Typ
Symbol
Parameter
Conditions
Units
Min
Max
VCCTH
VCC Threshold Detection Voltage
1.65V ≤ VCCIO ≤ 3.6V
Supply Lost
3.6
V
mV
V
Supply Present
4.1
VCCHYS
VCC Threshold Detection
Hysteresis Voltage
VCCIO = 1.8V
70.0
VCCIOTH
VCCIO Threshold Detection Voltage
2.7V ≤ VREG ≤ 3.6V
Supply Lost
0.5
Supply Present
1.4
VCCIOHYS
VCCIO Threshold Detection
Hysteresis Voltage
VREG = 3.3V
450
0.8
mV
VREGTH
Regulated Supply Threshold
Detection Voltage
1.65V ≤ VCCIO ≤ VREG
2.7V ≤ VREG ≤ 3.6V
Supply Lost
V
Supply Present
2.4 (Note 11)
VREGHYS
Regulated Supply Threshold
Detection Hysteresis Voltage
VCCIO = 1.8V
450
mV
Note 6: ILOAD includes the pull-up resistor current via pin VPU
Note 7: The minimum voltage in Suspend mode is 2.7V.
Note 8: Not tested in production, value based on characterization.
Note 9: Excludes any current from load and VPU current to the 1.5kΩ resistor.
Note 10: Includes current between Vpu and the 1.5k internal pull-up resistor.
Note 11: When VCCIO < 2.7V, minimum value for VREGTH = 2.0V for supply present condition.
DC Electrical Characteristics (Digital Pins – excludes D+, D− Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). V
= 1.6V to 3.6V
CCIO
Limits
Symbol
Parameter
Test Conditions
−40°C to +85°C
Units
Min
Max
Input Levels
VIL
LOW Level Input Voltage
HIGH Level Input Voltage
OUTPUT LEVELS:
0.3
V
V
VIH
0.6*VCCIO
VOL
LOW Level Output Voltage
I
I
I
I
OL = 2 mA
0.4
V
V
OL = 100 µA
OH = 2 mA
OH = 100 µA
0.15
VOH
HIGH Level Output Voltage
VCCIO - 0.4
VCCIO- 0.15
Leakage Current
ILI
Input Leakage Current
VCCIO = 1.65V to 3.6V
±1.0
(Note 12)
µA
Capacitance
CIN, CI/O
Input Capacitance
Pin to GND
10.0
pF
Note 12: If VCCIO ≥ VREG then leakage current will be higher than specified.
7
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DC Electrical Characteristics (Analog I/O Pins – D+, D− Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
V
CC = 4.0V to 5.5V or VREG = 3.0V to 3.6V
Limits
−40°C to +85°C
Typ
Symbol Parameter
Test Condition
Units
Min
Max
Input Levels – Differential Receiver
VDI
Differential Input Sensitivity
| VI(D+) - VI(D−)
|
0.2
0.8
V
V
VCM
Differential Common Mode Voltage
2.5
0.8
0.7
INPUT LEVELS – Single-ended Receiver
VIL
LOW Level Input Voltage
HIGH Level Input Voltage
Hysteresis Voltage
V
V
V
VIH
2.0
VHYS
0.30
Output Levels
VOL
VOH
LOW Level Output Voltage
HIGH Level Output Voltage
R
L = 1.5kΩ to 3.6V
L = 15kΩ to GND
0.3
3.6
V
V
R
2.8
(Note 13)
Leakage Current
IOFF
Input Leakage Current Off State
±1.0
µA
CAPACITANCE
I/O Capacitance
CI/O
Pin to GND
20.0
pF
Resistance
ZDRV
Driver Output Impedance
41.0
(Note 14)
Ω
ZIN
Driver Input Impedance
Switch Resistance
10.0
MΩ
RSW
VTERM
10.0
3.6
Ω
Termination Voltage
RPU Upstream Port
3.0
(Note 15)
(Note 16)
V
Note 13: If VOH min. = VREG - 0.2V.
Note 14: Includes external resistors of 29Ω on both D+ and D− pins.
Note 15: This voltage is available at pin VPU and VREG
.
Note 16: Minimum voltage is 2.7V in the suspend mode.
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8
AC Electrical Characteristics (A I/O Pins Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V, CL = 50 pF; RL = 1.5K on D+ to VPU
Limits
Symbol
Parameter
Test Conditions
−40°C to +85°C
Unit
Min
Typ
Max
Driver Characteristics
tR
Output Rise Time
CL = 50 − 125 pF
4.0
20.0
10% to 90%
ns
tF
Output Fall Time
Figures 4, 8
4.0
20.0
tRFM
Rise/Fall Time Match
tF/ tR Excludes First Transition
from Idle State
90.0
111.1
%
V
VCRS
Output Signal Crossover Voltage
Excludes First Transition from
Idle State see Waveform
1.3
2.0
(Note 17)
Driver Timing
tPLH
tPHL
tPHZ
tPLZ
tPZH
tPZL
Propagation Delay
Figures 5, 8
Figures 7, 9
Figures 7, 9
18.0
15.0
15.0
ns
ns
ns
(Vp/Vpo, Vm/Vmo to D+/D−)
Driver Disable Delay
(OE to D+/D−)
Driver Enable Delay
(OE to D+/D−)
Receiver Timing
tPLH
tPHL
tPLH
tPHL
Propagation Delay (Diff)
Figures 6, 10
Figures 6, 10
15.0
18.0
ns
ns
(D+/D− to Rev)
Single Ended Receiver Propagation Delay
(D+/D− to Vp/ Vpo, Vm/Vmo
)
Note 17: Not production tested, guaranteed by characterization.
9
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Typical Application Configurations
Upstream Connection in Bypass Mode with Differential Outputs
Downstream Connection in Normal Mode with Differential Outputs
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10
AC Waveforms
FIGURE 4. Rise and Fall Times
FIGURE 5. Vpo, Vmo to D+/D−
FIGURE 6. D+/D− to RCV, Vpo/Vp and Vmo/Vm
FIGURE 7. OE to D+/D−
Test Circuits and Waveforms
C
C
L = 50 pF Full Speed Propagation Delays
L = −125 pF Edge Rates only
V = 0 for tPZH, tPHZ
V = VREG for tPZL
FIGURE 8. Load for D+/D−
FIGURE 9. Load for Enable and Disable Times
FIGURE 10. Load for Vm/Vmo, Vp/Vpo and RCV
11
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Tape and Reel Specification
Tape Format for MLP
Package
Tape
Section
Number
Cavities
125 (typ)
2500/3000
75 (typ)
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
MP/MH
Sealed
Trailer (Hub End)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
A
B
C
D
N
W1
W2
13.0
330
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
7.008
(178)
0.488
(12.4)
0.724
(18.4)
12 mm
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12
Physical Dimensions inches (millimeters) unless otherwise noted
14-Terminal Molded Leadless Package (MLP), 2.5mm Square
MLP14D
13
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Package Number MLP16HB
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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14
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USB1T1103MPX
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T1103_06
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T1104
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T1104MHX
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T1105A
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T1105AMHX
Universal Serial Bus Peripheral Transceiver with Voltage RegulatorWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T11A
Universal Serial Bus TransceiverWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T11ABQ
Bus Transceiver, 1-Func, 1-Bit, True Output, 3 X 3 MM, MO-220, MLP-16Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
USB1T11ABQX
Universal Serial Bus TransceiverWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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FAIRCHILD
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