IDT74LVCR162245APV8 [IDT]

Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48;


型号：	IDT74LVCR162245APV8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48 光电二极管逻辑集成电路
文件：	总6页 (文件大小：130K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

IDT74LVCR162245A

3.3V CMOS 16-BIT

BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O

FEATURES:

DESCRIPTION:

tSK(0)

(Output Skew) < 250ps

–

Typical

This 16-bit bus transceiver is built using advanced dual metal CMOS

technology. This high-speed,lowpowertransceiveris idealforasynchro-

nous communication between two busses (A and B). The Direction and

OutputEnable controls are designedtooperate this device as eithertwo

independent 8-bit transceivers or one 16-bit transceiver. The direction

controlpin(DIR)controls the directionofdata flow. The outputenable pin

(OE)overrides thedirectioncontrolanddisables bothports. Allinputs are

designedwithhysteresis forimprovednoise margin.

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

0.635mm pitch SSOP, 0.50mm pitch TSSOP

and 0.40mm pitch TVSOP packages

Extended commercial range of -40°C to +85°C

VCC = 3.3V ±0.3V, Normal Range

VCC = 2.7V to 3.6V, Extended Range

CMOS power levels (0.4µW typ. static)

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

–

Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows

the use of this device as a translator in a mixed 3.3V/5V supply system.

Drive Features for LVCR162245A:

The LVCR162245Ahas series resistors inthe device output structure

which will significantly reduce line noise when used with light loads. The

driver has been designed to drive ±12mA at the designated threshold

levels.

–

Balanced Output Drivers: ±12 mA

Low switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

1DIR

2DIR

1OE

2OE

1A1

2A1

1B1

2B1

1A2

1A3

2A2

1B2

1B3

2B2

2A3

2B3

1A4

2A4

1B4

1B5

1B6

2B4

1A5

1A6

1A7

2A5

2B5

2A6

2B6

2A7

1B7

1B8

2B7

1A8

2A8

2B8

EXTENDED COMMERCIAL TEMPERATURE RANGE

APRIL 1999

1999 Integrated Device Technology, Inc.

DSC-4691/1

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

PINCONFIGURATION

Symbol

Description

Max.

Unit

(2)

VTERM

Terminal Voltage with Respect to GND

– 0.5 to +6.5

1DIR

1B1

1OE

1A1

(3)

VTERM

Terminal Voltage with Respect to GND

Storage Temperature

– 0.5 to +6.5

– 65 to +150

– 50 to +50

– 50

TSTG

IOUT

°C

DC Output Current

1B2

1A2

GND

1A3

1A4

IIK

Continuous Clamp Current,

VI < 0 or VO < 0

GND

1B3

IOK

ICC

Continuous Current through

±100

I_SS

each V_CCor GND

LVC Link

1B4

NOTES:

V^CC

1B5

V^CC

1A5

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. V^CCterminals.

1B6

GND

1B7

1A6

GND

1A7

1A8

2A1

3. All terminals except V^CC.

SO48-1

SO48-2

SO48-3

1B8

CAPACITANCE (T^A= +25^OC, f = 1.0MHz)

Symbol

2B1

Parameter⁽¹⁾

Conditions

Typ. Max. Unit

2B2

GND

2B3

2A2

GND

2A3

2A4

V^CC

CIN

Input Capacitance

VIN = 0V

4.5

COUT

CI/O

Output

Capacitance

I/O Port

VOUT = 0V

VIN = 0V

6.5

2B4

Capacitance

LVC Link

V^CC

NOTE:

2B5

1. As applicable to the device type.

2A5

2B6

2A6

PIN DESCRIPTION

GND

Pin Names

Description

2B7

2B8

2A7

2A8

2OE

xOE

xDIR

xAx

Output Enable Input (Active LOW)

Direction Control Input

2DIR

Side A Inputs or 3-State Outputs

Side B Inputs or 3-State Outputs

xBx

SSOP/ TSSOP/ TVSOP

TOP VIEW

(1)

FUNCTION TABLE

(each 8-bit section)

Inputs

xOE

xDIR

Outputs

Bus B Data to Bus A

Bus A Data to Bus B

Isolation

NOTE:

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

1998 Integrated Device Technology, Inc.

DSC-123456

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Operating Condition: T = –40 C to +85 C

Symbol

Parameter

Test Conditions

Min.

Typ.⁽¹⁾

Max. Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 3.6V

1.7

—

VIL

Input LOW Voltage Level

Input Leakage Current

—

0.7

0.8

±5

IIH

VI = 0 to 5.5V

µA

IIL

IOZH

High Impedance Output Current

(3-State Output pins)

VCC = 3.6V

VO = 0 to 5.5V

—

±10

IOZL

IOFF

VIK

Input/Output Power Off Leakage

Clamp Diode Voltage

VCC = 0V, VIN or VO ≤ 5.5V

VCC = 2.3V, IIN = – 18mA

VCC = 3.3V

—

– 0.7

100

—

±50

– 1.2

—

µA

Input Hysteresis

µA

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = 3.6V

VIN = GND or VCC

(2)

—

3.6 ≤ VIN ≤ 5.5V

∆ICC

Quiescent Power Supply

Current Variation

One input at VCC - 0.6V

other inputs at VCC or GND

500

µA

LVC Link

NOTES:

1. Typical values are at V^CC= 3.3V, +25°C ambient.

2. This applies in the disabled state only.

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

Output HIGH Voltage

Test Conditions⁽¹⁾

Min.

Max.

Unit

VOH

VCC = 2.3V to 3.6V

VCC = 2.3V

IOH = – 0.1mA

IOH = – 4mA

IOH = – 6mA

IOH = – 4mA

IOH = – 8mA

IOH = – 6mA

IOH = – 12mA

IOL = 0.1mA

IOL = 4mA

VCC – 0.2

1.9

1.7

2.2

—

VCC = 2.7V

VCC = 3.0V

—

2.4

—

VOL

Output LOW Voltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.55

0.4

0.6

0.55

0.8

—

IOL = 6mA

—

VCC = 2.7V

VCC = 3.0V

IOL = 4mA

—

IOL = 8mA

—

IOL = 6mA

—

IOL = 12mA

—

LVC Link

NOTE:

1. V^IHand V^ILmust be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the

appropriate V^CCrange. T^A= – 40°C to +85°C.

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

OPERATING CHARACTERISTICS, V

= 3.3V ± 0.3V, T = 25°C

Symbol

Parameter

Test Conditions

Typical

Unit

CPD

Power Dissipation Capacitance per Transceiver Outputs enabled

Power Dissipation Capacitance per Transceiver Outputs disabled

CL = 0pF, f = 10Mhz

CPD

SWITCHING CHARACTERISTICS ⁽¹⁾

VCC = 2.7V

VCC = 3.3V±0.3V

Symbol

tPLH

Parameter

Min.

Max.

Min.

Max.

Unit

Propagation Delay

—

5.7

1.5

2.2

—

4.8

tPHL

xAx to xBx, xBx to xAx

Output Enable Time

xOE to xAx or xBx

tPZH

—

7.9

8.3

—

6.3

7.4

500

tPZL

tPHZ

t_PLZ

Output Disable Time

xOE to xAx or xBx

(2)

tSK(o) Output Skew

NOTES:

1. See test circuits and waveforms. T^A= – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

TESTCIRCUITS ANDWAVEFORMS:

PROPAGATIONDELAY

TESTCONDITIONS

Symbol

(1)

(2)

VCC = 3.3V ±0.3V VCC = 2.7V VCC = 2.5V ±0.2V

Unit

VLOAD

2 xVcc

Vcc

VIH

SAME PHASE

INPUT TRANSITION

VIH

2.7

1.5

300

2.7

1.5

300

tPHL

VCC / 2

150

tPLH

VOH

OUTPUT

VLZ

VHZ

VOL

150

VIH

LVC Link

OPPOSITE PHASE

INPUT TRANSITION

LVC Link

TESTCIRCUITSFORALLOUTPUTS

VLOAD

ENABLEANDDISABLETIMES

VCC

Open

GND

DISABLE

ENABLE

VIH

500Ω

CONTROL

INPUT

VIN

VOUT

Pulse ^{(1, 2)}

Generator

tPZL

tPLZ

D.U.T.

VLOAD/2

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

500Ω

VOL+VLZ

VOL

tPHZ

tPZH

VOH

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

LVC Link

VOH-VHZ

DEFINITIONS:

C^L= Load capacitance: includes jig and probe capacitance.

R^T= Termination resistance: should be equal to Z^OUTof the Pulse

Generator.

LVC Link

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control

Disable-HIGH.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2.5ns; t^R≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2ns; t^R≤ 2ns.

SWITCHPOSITION

SET-UP, HOLD, AND RELEASE TIMES

Test

Switch

VIH

DATA

INPUT

Open Drain

Disable Low

Enable Low

Disable High

Enable High

All Other tests

VLOAD

tSU

VIH

TIMING

INPUT

GND

Open

tREM

VIH

ASYNCHRONOUS

CONTROL

LVC Link

VIH

SYNCHRONOUS

CONTROL

OUTPUT SKEW - tsk (x)

tSU

LVC Link

VIH

INPUT

PULSEWIDTH

tPLH1

tPHL1

VOH

LOW-HIGH-LOW

PULSE

OUTPUT 1

OUTPUT 2

VOL

tSK (x)

VOH

HIGH-LOW-HIGH

PULSE

VOL

LVC Link

tPLH2

tPHL2

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

LVC Link

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For t^SK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74LVCR162245A

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3VCMOS16-BITBUSTRANSCEIVERW/3-STATEOUTPUTS

ORDERINGINFORMATION

LVC

IDT

XXXX

Device Type Package

Bus-Hold

Family

Temp. Range

Shrink Small Outline Package (SO48-1)

Thin Shrink Small Outline Package (SO48-2)

Thin Very Small Outline Package (SO48-3)

16-Bit Bus Transceiver

245A

Double-Density with Resistors, ±12mA

R162

Blank

No Bus-hold

-40°C to +85°C

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www.idt.com*

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The IDT logo is a registered trademark of Integrated Device Technology, Inc.

IDT74LVCR162245APV8 [IDT]

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