AUIRFR1018ETRR [INFINEON]

Advanced Process Technology Ultra Low On-Resistance;
AUIRFR1018ETRR
型号: AUIRFR1018ETRR
厂家: Infineon    Infineon
描述:

Advanced Process Technology Ultra Low On-Resistance

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中文:  中文翻译
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PD - 97685  
AUTOMOTIVE GRADE  
AUIRFR1018E  
HEXFET® Power MOSFET  
Features  
D
S
VDSS  
RDS(on) typ.  
max.  
ID (Silicon Limited)  
ID (Package Limited)  
60V  
7.1m  
8.4m  
79A  
Advanced Process Technology  
Ultra Low On-Resistance  
175°C Operating Temperature  
Fast Switching  
Repetitive Avalanche Allowed up to Tjmax  
Lead-Free, RoHS Compliant  
Automotive Qualified *  
G
56A  
D
Description  
Specifically designed for Automotive applications, this HEXFET®  
Power MOSFET utilizes the latest processing techniques to achieve  
extremely low on-resistance per silicon area. Additional features of  
thisdesign area175°Cjunctionoperatingtemperature,fastswitching  
speed and improved repetitive avalanche rating . These features  
combine to make this design an extremely efficient and reliable  
device for use in Automotive applications and a wide variety of other  
S
G
D-Pak  
AUIRFR1018E  
applications.  
G
D
S
Gate  
Drain  
Source  
Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and  
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-  
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under  
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.  
Symbol  
Parameter  
Max.  
Units  
ID @ TC = 25°C  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)  
Pulsed Drain Current  
79  
ID @ TC = 100°C  
ID @ TC = 25°C  
IDM  
56  
A
56  
315  
PD @TC = 25°C  
W
110  
Maximum Power Dissipation  
0.76  
Linear Derating Factor  
W/°C  
V
VGS  
EAS  
IAR  
± 20  
Gate-to-Source Voltage  
Single Pulse Avalanche Energy (Thermally limited)  
88  
mJ  
A
Avalanche Current  
47  
Repetitive Avalanche Energy  
EAR  
mJ  
11  
21  
Peak Diode Recovery  
dv/dt  
TJ  
V/ns  
°C  
-55 to + 175  
Operating Junction and  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
(1.6mm from case)  
300  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
–––  
–––  
–––  
Max.  
1.32  
50  
Units  
Rθ  
Junction-to-Case  
JC  
RθJA  
°C/W  
Junction-to-Ambient (PCB Mount)  
Junction-to-Ambient  
RθJA  
110  
HEXFET® is a registered trademark of International Rectifier.  
*Qualification standards can be found at http://www.irf.com/  
www.irf.com  
1
06/17/11  
AUIRFR1018E  
Static Electrical @ TJ = 25°C (unless otherwise specified)  
Symbol  
V(BR)DSS  
Parameter  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
Min. Typ. Max. Units  
60 ––– –––  
––– 0.073 ––– V/°C Reference to 25°C, ID = 5mA  
Conditions  
VGS = 0V, ID = 250μA  
V
V
/ T  
(BR)DSS Δ  
Δ
J
RDS(on)  
VGS(th)  
gfs  
–––  
2.0  
7.1  
8.4  
4.0  
VGS = 10V, ID = 47A  
VDS = VGS, ID = 100μA  
VDS = 50V, ID = 47A  
m
V
Ω
–––  
Forward Transconductance  
110 ––– –––  
–––  
––– –––  
––– ––– 250  
––– ––– 100  
––– ––– -100  
S
RG(int)  
IDSS  
Internal Gate Resistance  
Drain-to-Source Leakage Current  
0.73 –––  
20  
Ω
μA  
V
V
DS = 60V, VGS = 0V  
DS = 48V, VGS = 0V, TJ = 125°C  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
nA VGS = 20V  
VGS = -20V  
Dynamic Electrical @ TJ = 25°C (unless otherwise specified)  
Symbol  
Parameter  
Total Gate Charge  
Min. Typ. Max. Units  
Conditions  
Qg  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
46  
10  
12  
34  
13  
35  
55  
46  
69  
nC ID = 47A  
DS = 30V  
VGS = 10V  
ID = 47A, VDS =0V, VGS = 10V  
ns VDD = 39V  
ID = 47A  
R = 10  
Qgs  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Total Gate Charge Sync. (Qg - Qgd)  
Turn-On Delay Time  
Rise Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
V
Qgd  
Qsync  
td(on)  
tr  
td(off)  
Turn-Off Delay Time  
Fall Time  
Ω
G
tf  
VGS = 10V  
Ciss  
Input Capacitance  
––– 2290 –––  
––– 270 –––  
––– 130 –––  
––– 390 –––  
––– 630 –––  
VGS = 0V  
Coss  
Crss  
Output Capacitance  
Reverse Transfer Capacitance  
V
DS = 50V  
pF ƒ = 1.0MHz  
Coss eff. (ER)  
Coss eff. (TR)  
V
GS = 0V, VDS = 0V to 60V  
Effective Output Capacitance (Energy Related)  
Effective Output Capacitance (Time Related)  
VGS = 0V, VDS = 0V to 60V  
Diode Characteristics  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
D
S
IS  
Continuous Source Current  
––– –––  
A
MOSFET symbol  
79  
(Body Diode)  
Pulsed Source Current  
(Body Diode)  
showing the  
integral reverse  
G
ISM  
––– ––– 315  
p-n junction diode.  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
––– –––  
1.3  
39  
V
TJ = 25°C, IS = 47A, VGS = 0V  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
VR = 51V,  
–––  
–––  
–––  
–––  
–––  
26  
31  
24  
35  
1.8  
ns  
IF = 47A  
di/dt = 100A/μs  
47  
Qrr  
Reverse Recovery Charge  
36  
nC  
A
53  
IRRM  
ton  
Reverse Recovery Current  
Forward Turn-On Time  
–––  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
Pulse width 400μs; duty cycle 2%.  
† Coss eff. (TR) is a fixed capacitance that gives the same charging time  
 Calculated continuous current based on maximum allowable junction  
temperature. Bond wire current limit is 56A. Note that current  
limitations arising from heating of the device leads may occur with  
as Coss while VDS is rising from 0 to 80% VDSS  
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as  
Coss while VDS is rising from 0 to 80% VDSS  
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom  
mended footprint and soldering techniques refer to application note #AN-994.  
‰ Rθ is measured at TJ approximately 90°C.  
.
some lead mounting arrangements.  
‚ Repetitive rating; pulse width limited by max. junction  
temperature.  
.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.08mH  
RG = 25Ω, IAS = 47A, VGS =10V. Part not recommended for  
use above this value.  
„ ISD 47A, di/dt 1668A/μs, VDD V(BR)DSS, TJ 175°C.  
2
www.irf.com  
AUIRFR1018E  
Qualification Information†  
Automotive  
††  
(per AEC-Q101)  
Qualification Level  
Comments: This part number(s) passed Automotive qualification.  
IR’s Industrial and Consumer qualification level is granted by  
extension of the higher Automotive level.  
Moisture Sensitivity Level  
D-PAK  
MSL1  
Class M4 (+/- 600V)†††  
Machine Model  
AEC-Q101-002  
Class H1C (+/- 1500V)†††  
AEC-Q101-001  
Human Body Model  
ESD  
Class C4 (+/- 1000V)†††  
AEC-Q101-005  
Charged Device  
Model  
RoHS Compliant  
Yes  
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/  
†† Exceptions to AEC-Q101 requirements are noted in the qualification report.  
††† Highest passing voltage.  
www.irf.com  
3
AUIRFR1018E  
1000  
1000  
100  
10  
VGS  
15V  
VGS  
15V  
TOP  
TOP  
10V  
10V  
8.0V  
6.0V  
5.5V  
5.0V  
4.8V  
4.5V  
8.0V  
6.0V  
5.5V  
5.0V  
4.8V  
4.5V  
100  
10  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60μs PULSE WIDTH  
Tj = 25°C  
60μs PULSE WIDTH  
Tj = 175°C  
1
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
1000  
100  
10  
2.5  
2.0  
1.5  
1.0  
0.5  
I
= 47A  
D
V
= 10V  
GS  
T
= 175°C  
J
T
= 25°C  
V
J
1
= 25V  
DS  
60μs PULSE WIDTH  
0.1  
2
3
4
5
6
7
8
9
-60 -40 -20 0 20 40 60 80 100120140160180  
, Junction Temperature (°C)  
T
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 4. Normalized On-Resistance vs. Temperature  
Fig 3. Typical Transfer Characteristics  
4000  
3000  
2000  
1000  
0
V
C
= 0V,  
f = 1 MHZ  
GS  
16  
= C + C , C SHORTED  
I = 47A  
D
iss  
gs  
gd ds  
C
= C  
rss  
gd  
V
V
V
= 48V  
= 30V  
= 12V  
DS  
DS  
DS  
C
= C + C  
oss  
ds  
gd  
12  
8
C
iss  
4
C
oss  
C
rss  
0
1
10  
100  
0
10  
20  
30  
40  
50  
60  
V
, Drain-to-Source Voltage (V)  
Q
Total Gate Charge (nC)  
DS  
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage  
4
www.irf.com  
AUIRFR1018E  
1000  
100  
10  
10000  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
T
= 175°C  
J
1msec  
100μsec  
T
= 25°C  
J
LIMITED BY PACKAGE  
10msec  
1
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
DC  
10  
GS  
0.1  
0.1  
0.1  
1
100  
0.0  
0.5  
1.0  
1.5  
2.0  
V
, Drain-toSource Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode Forward Voltage  
80  
80  
LIMITED BY PACKAGE  
Id = 5mA  
60  
40  
20  
0
75  
70  
65  
60  
25  
50  
75  
100  
125  
150  
175  
-60 -40 -20 0 20 40 60 80 100120140160180  
T , Case Temperature (°C)  
C
T
, Temperature ( °C )  
J
Fig 10. Drain-to-Source Breakdown Voltage  
Fig 9. Maximum Drain Current vs. Case Temperature  
0.8  
400  
I
D
350  
300  
250  
200  
150  
100  
50  
TOP  
5.3A  
11A  
47A  
0.6  
0.4  
0.2  
0.0  
BOTTOM  
0
0
10  
V
20  
30  
40  
50  
60  
25  
50  
75  
100  
125  
150  
175  
Drain-to-Source Voltage (V)  
Starting T , Junction Temperature (°C)  
DS,  
J
Fig 12. Maximum Avalanche Energy vs. DrainCurrent  
Fig 11. Typical COSS Stored Energy  
www.irf.com  
5
AUIRFR1018E  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
R1  
R1  
R2  
R2  
R3  
R3  
R4  
R4  
τι  
(sec)  
Ri (°C/W)  
0.1  
0.01  
τJ  
0.026741 0.000007  
0.28078 0.000091  
0.606685 0.000843  
0.406128 0.005884  
τC  
τJ  
τ1  
τ
τ
τ
3 τ3  
τ4  
2 τ2  
0.02  
0.01  
τ1  
τ4  
Ci= τi/Ri  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
100  
10  
1
Duty Cycle = Single Pulse  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
Δ
Tstart =25°C (Single Pulse)  
0.01  
0.05  
0.10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming ΔΤ j = 25°C and  
Tstart = 150°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14. Typical Avalanche Current vs.Pulsewidth  
100  
80  
60  
40  
20  
0
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of Tjmax. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. Iav = Allowable avalanche current.  
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as  
25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
TOP  
BOTTOM 10% Duty Cycle  
= 47A  
Single Pulse  
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
25  
50  
75  
100  
125  
150  
175  
Iav = 2DT/ [1.3·BV·Zth]  
EAS (AR) = PD (ave)·tav  
Starting T , Junction Temperature (°C)  
J
Fig 15. Maximum Avalanche Energy vs. Temperature  
6
www.irf.com  
AUIRFR1018E  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
14  
12  
10  
8
I
I
I
I
= 1.0A  
D
D
D
D
I
= 32A  
= 51V  
F
= 1.0mA  
= 250μA  
= 100μA  
V
R
T = 25°C  
J
T = 125°C  
J
6
4
2
0
-75 -50 -25  
0
J
25 50 75 100 125 150 175  
, Temperature ( °C )  
0
200  
400  
600  
800  
1000  
T
di /dt (A/μs)  
F
Fig. 17 - Typical Recovery Current vs. dif/dt  
Fig 16. Threshold Voltage vs. Temperature  
14  
12  
10  
8
320  
280  
240  
200  
160  
120  
80  
I
= 47A  
= 51V  
I
= 32A  
V = 51V  
R
F
F
V
R
T = 25°C  
T = 25°C  
J
J
T = 125°C  
J
T = 125°C  
J
6
4
2
40  
0
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/μs)  
di /dt (A/μs)  
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt  
Fig. 19 - Typical Stored Charge vs. dif/dt  
320  
I
= 47A  
= 51V  
F
280  
240  
200  
160  
120  
80  
V
R
T = 25°C  
J
T = 125°C  
J
40  
0
0
200  
400  
600  
800  
1000  
di /dt (A/μs)  
F
Fig. 20 - Typical Stored Charge vs. dif/dt  
www.irf.com  
7
AUIRFR1018E  
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
D.U.T  
+
***  
V
=10V  
GS  
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
*
VDD  
**  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Curent  
I
SD  
Ripple 5%  
* Use P-Channel Driver for P-Channel Measurements  
** Reverse Polarity for P-Channel  
*** VGS = 5V for Logic Level Devices  
Fig 21. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
2V0GVS  
Ω
0.01  
t
p
I
AS  
Fig 22b. Unclamped Inductive Waveforms  
Fig 22a. Unclamped Inductive Test Circuit  
RD  
VDS  
VDS  
90%  
VGS  
D.U.T.  
RG  
+VDD  
-
10%  
VGS  
10V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
td(on)  
td(off)  
tr  
tf  
Fig 23a. Switching Time Test Circuit  
Fig 23b. Switching Time Waveforms  
Id  
Vds  
Vgs  
L
VCC  
DUT  
0
Vgs(th)  
20K  
Qgs1  
Qgs2  
Qgodr  
Qgd  
Fig 24a. Gate Charge Test Circuit  
Fig 24b. Gate Charge Waveform  
8
www.irf.com  
AUIRFR1018E  
D-Pak (TO-252AA) Package Outline  
Dimensions are shown in millimeters (inches)  
D-Pak (TO-252AA) Part Marking Information  
Part Number  
AUFR1018E  
Date Code  
Y= Year  
WW= Work Week  
A= Automotive, LeadFree  
IR Logo  
YWWA  
XX or XX  
Lot Code  
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/  
www.irf.com  
9
AUIRFR1018E  
D-Pak (TO-252AA) Tape & Reel Information  
Dimensions are shown in millimeters (inches)  
TR  
TRL  
TRR  
16.3 ( .641 )  
15.7 ( .619 )  
16.3 ( .641 )  
15.7 ( .619 )  
12.1 ( .476 )  
11.9 ( .469 )  
8.1 ( .318 )  
7.9 ( .312 )  
FEED DIRECTION  
FEED DIRECTION  
NOTES :  
1. CONTROLLING DIMENSION : MILLIMETER.  
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).  
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.  
13 INCH  
16 mm  
NOTES :  
1. OUTLINE CONFORMS TO EIA-481.  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
10  
www.irf.com  
AUIRFR1018E  
Ordering Information  
Base part number Package Type  
Standard Pack  
Form  
Complete Part Number  
Quantity  
75  
2000  
3000  
3000  
AUIRFR1018E  
Dpak  
Tube  
AUIRFR1018E  
AUIRFR1018ETR  
AUIRFR1018ETRL  
AUIRFR1018ETRR  
Tape and Reel  
Tape and Reel Left  
Tape and Reel Right  
www.irf.com  
11  
AUIRFR1018E  
IMPORTANT NOTICE  
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make  
corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or  
services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards  
to product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order  
acknowledgment.  
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard warranty. Testing  
and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where mandated by government  
requirements, testing of all parameters of each product is not necessarily performed.  
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using IR  
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IRproductsarenotdesigned, intended, orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody, orinotherapplications  
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12  
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