AUIRFR120ZTRL [INFINEON]

Power Field-Effect Transistor, 8.7A I(D), 100V, 0.19ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3;


型号：	AUIRFR120ZTRL
厂家：	Infineon
描述：	Power Field-Effect Transistor, 8.7A I(D), 100V, 0.19ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3 局域网开关脉冲晶体管
文件：	总12页 (文件大小：692K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AUIRFR120Z

AUIRFU120Z

AUTOMOTIVE GRADE

Features

V_DSS

100V

150m

190m

8.7A

 Advanced Process Technology

 Ultra Low On-Resistance

 175°C Operating Temperature

 Fast Switching

R_DS(on)

typ.

max.

I_D

 Repetitive Avalanche Allowed up to Tjmax

 Lead-Free, RoHS Compliant

 Automotive Qualified *

Description

Specifically designed for Automotive applications, this HEXFET^®

Power MOSFET utilizes the latest processing techniques to

achieve extremely low on-resistance per silicon area. Additional

features of this design are a 175°C junction operating temperature,

fast switching speed and improved repetitive avalanche rating .

These features combine to make this design an extremely efficient

and reliable device for use in Automotive applications and a wide

variety of other applications.

I-Pak

AUIRFU120Z

D-Pak

AUIRFR120Z

Gate

Drain

Source

Standard Pack

Form

Tube

Base part number

AUIRFU120Z

Package Type

I-Pak

Orderable Part Number

Quantity

3000

AUIRFU120Z

AUIRFR120Z

AUIRFR120ZTRL

Tube

Tape and Reel Left

AUIRFR120Z

D-Pak

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress

ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance

and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless

otherwise specified.

Symbol

Parameter

Max.

Units

I_D@ T_C= 25°C

Continuous Drain Current, V_GS@ 10V

8.7

I_D@ T_C= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current 

6.1

P_D@T_C= 25°C

Maximum Power Dissipation

Linear Derating Factor

W/°C

0.23

V_GS

E_AS

Gate-to-Source Voltage

Single Pulse Avalanche Energy (Thermally Limited) 

± 20

E_AS(Tested)

Single Pulse Avalanche Energy Tested Value 

Avalanche Current 

I_AR

See Fig.15,16, 12a, 12b

E_AR

T_J

Repetitive Avalanche Energy 

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

-55 to + 175

300

T_STG

°C

Thermal Resistance

Symbol

Parameter

Junction-to-Case

Typ.

–––

Max.

4.28

Units

R_JC

R_JA

Junction-to-Ambient ( PCB Mount) 

Junction-to-Ambient

°C/W

110

HEXFET® is a registered trademark of Infineon.

*Qualification standards can be found at www.infineon.com

2017-10-05

AUIRFR/U120Z

Static @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

100 ––– –––

––– 0.084 ––– V/°C Reference to 25°C, I_D= 1mA

Conditions

V_(BR)DSS

V_(BR)DSS/T_J

R_DS(on)

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

V_GS= 0V, I_D= 250µA

––– 150 190

V_GS= 10V, I_D= 5.2A 

m

V_GS(th)

2.0

––– –––

–––

––– –––

4.0

V_DS= V_GS, I_D= 250µA

_DS= 25V, I_D= 5.2A

_DS= 100 V, V_GS= 0V

V_DS= 100V,V_GS= 0V,T_J=125°C

gfs

Forward Trans conductance

I_DSS

I_GSS

Drain-to-Source Leakage Current

µA

––– ––– 250

––– ––– 200

––– ––– -200

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

_GS= 20V

_GS= -20V

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Q_g

Q_gs

Q_gd

t_d(on)

t_r

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain Charge

Turn-On Delay Time

Rise Time

–––

6.9

1.6

3.1

8.3

I_D= 5.2A

nC V_DS= 80V

_GS= 10V

–––

V_DD= 50V

I_D= 5.2A

R_G= 53

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

V_GS= 10V

Between lead,

6mm (0.25in.)

from package

and center of die contact

L_D

L_S

Internal Drain Inductance

Internal Source Inductance

–––

4.5

7.5

–––

C_iss

Input Capacitance

––– 310 –––

V_GS= 0V

C_oss

C_rss

C_oss

C_{oss eff.}

Output Capacitance

Reverse Transfer Capacitance

Output Capacitance

Effective Output Capacitance

–––

V_DS= 25V

ƒ = 1.0MHz

V_GS= 0V, V_DS= 1.0V ƒ = 1.0MHz

V_GS= 0V, V_DS= 80V ƒ = 1.0MHz

V_GS= 0V, V_DS= 0V to 80V 

––– 150 –––

–––

Diode Characteristics

Parameter

Continuous Source Current

(Body Diode)

Pulsed Source Current

(Body Diode)

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Forward Turn-On Time

Min. Typ. Max. Units

Conditions

MOSFET symbol

showing the

integral reverse

p-n junction diode.

T_J= 25°C,I_S= 5.2A,V_GS= 0V 

I_S

––– –––

8.7

I_SM

––– –––

V_SD

t_rr

Q_rr

t_on

1.3

–––

ns T_J= 25°C ,I_F= 5.2A, V_DD= 50V

nC di/dt = 100A/µs

Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)

Notes:

 Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)

 Limited by T_{Jmax ,}starting T_J= 25°C, L = 1.29mH, R_G= 25, I_AS= 5.2A, V_GS=10V. Part not recommended for use above this value.

 Pulse width 1.0ms; duty cycle  2%.

C_osseff. is a fixed capacitance that gives the same charging time as C_osswhile V_DSis rising from 0 to 80% V_DSS

Limited by T_Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.

This value determined from sample failure population. 100% tested to this value in production.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to

application note #AN-994

2017-10-05

AUIRFR/U120Z

100

VGS

TOP

15V

10V

TOP

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

4.5V

0.1

0.01

60µs PULSE WIDTH

Tj = 175°C

60µs PULSE WIDTH

Tj = 25°C

0.1

100

0.1

100

, Drain-to-Source Voltage (V)

Fig. 2 Typical Output Characteristics

Fig. 1 Typical Output Characteristics

100.0

10.0

1.0

= 175°C

= 25°C

= 175°C

T = 25°C

= 25V

60µs PULSE WIDTH

= 10V

380µs PULSE WIDTH

0.1

4.0

5.0

6.0

7.0

8.0

, Gate-to-Source Voltage (V)

Drain-to-Source Current (A)

Fig. 4 Typical Forward Transconductance

Fig. 3 Typical Transfer Characteristics

Vs. Drain Current

2017-10-05

AUIRFR/U120Z

500

400

300

200

100

= 0V,

f = 1 MHZ

I = 5.2A

= C + C , C

SHORTED

iss

= 80V

= C

rss

oss

VDS= 50V

VDS= 20V

= C + C

Ciss

Coss

Crss

FOR TEST CIRCUIT

SEE FIGURE 13

, Drain-to-Source Voltage (V)

100

Total Gate Charge (nC)

Fig 5. Typical Capacitance vs.

Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage

Gate-to-Source Voltage

1000

100

100.0

10.0

1.0

OPERATION IN THIS AREA

LIMITED BY R

(on)

= 175°C

100µsec

= 25°C

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

= 0V

10msec

0.1

100

1000

0.0

0.5

1.0

1.5

, Drain-toSource Voltage (V)

, Source-toDrain Voltage (V)

Fig. 7 Typical Source-to-Drain Diode

Fig 8. Maximum Safe Operating Area

2017-10-05

Forward Voltage

AUIRFR/U120Z

3.0

2.5

2.0

1.5

1.0

0.5

= 5.2A

= 10V

-60 -40 -20

20 40 60 80 100 120 140 160 180

100

125

150

175

, Junction Temperature (°C)

Fig 9. Maximum Drain Current Vs.

Fig 10. Normalized On-Resistance

Case Temperature

Vs. Temperature

D = 0.50

0.20

R₁

R₂

R₃

0.10

0.05

Ri (°C/W)

i (sec)

0.000053

0.000125

0.000474

R₃



^J_J



^C_C

0.33747

1.793



¹₁



²₂

³₃

0.02

0.1

Ci= iRi

0.01

2.150

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

SINGLE PULSE

( THERMAL RESPONSE )

0.01

1E-006

1E-005

0.0001

, Rectangular Pulse Duration (sec)

0.001

0.01

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

2017-10-05

AUIRFR/U120Z

15V

DRIVER

TOP

0.9A

1.2

BOTTOM 5.2A

D.U.T

20V

0.01



Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

100

125

150

175

Starting T , Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

5.0

4.0

Vds

Vgs

Vgs(th)

= 250µA

3.0

2.0

Qgs1

Qgs2

Qgd

Qgodr

Fig 13a. Gate Charge Waveform

-75 -50 -25

25 50 75 100 125 150 175 200

, Temperature ( °C )

Fig 14. Threshold Voltage Vs. Temperature

Fig 13b. Gate Charge Test Circuit

2017-10-05

AUIRFR/U120Z

Duty Cycle = Single Pulse

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming Tj = 25°C due to

avalanche losses. Note: In no

case should Tj be allowed to

exceed Tjmax

0.01

0.05

0.10

0.1

0.01

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.infineon.com)

1. Avalanche failures assumption:

TOP

BOTTOM 1% Duty Cycle

= 5.2A

Single Pulse

Purely a thermal phenomenon and failure occurs at a temperature far in

excess of Tjmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. Iav = Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as

25°C in Figure 15, 16).

tav = Average time in avalanche.

100

125

150

175

D = Duty cycle in avalanche = tav ·f

Starting T , Junction Temperature (°C)

ZthJC(D, tav) = Transient thermal resistance, see Figures 13)

_{D (ave)}= 1/2 ( 1.3·BV·I_av) = T/ Z_thJC

_av= 2T/ [1.3·BV·Z_th]

E_{AS (AR)}= P_{D (ave)}·t_av

Fig 16. Maximum Avalanche Energy

Vs. Temperature

2017-10-05

AUIRFR/U120Z

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

Fig 18b. Switching Time Waveforms

Fig 18a. Switching Time Test Circuit

2017-10-05

AUIRFR/U120Z

D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))

D-Pak (TO-252AA) Part Marking Information

Part Number

AUIRFR120Z

Date Code

Y= Year

WW= Work Week

YWWA

IR Logo



Lot Code

2017-10-05

AUIRFR/U120Z

I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

Part Number

AUIRFU120Z

Date Code

YWWA

IR Logo

Y= Year

WW= Work Week



Lot Code

2017-10-05

AUIRFR/U120Z

D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))

TRL

TRR

16.3 ( .641 )

15.7 ( .619 )

16.3 ( .641 )

15.7 ( .619 )

12.1 ( .476 )

11.9 ( .469 )

8.1 ( .318 )

7.9 ( .312 )

FEED DIRECTION

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

2017-10-05

AUIRFR/U120Z

Qualification Information

Qualification Level

Automotive

(per AEC-Q101)

Comments: This part number(s) passed Automotive qualification. Infineon’s

Industrial and Consumer qualification level is granted by extension of the higher

Automotive level.

D-Pak

MSL1

I-Pak

Moisture Sensitivity Level

Class M1B (+/- 100V)^†

AEC-Q101-002

Class H0 (+/- 100V)^†

AEC-Q101-001

Class C5 (+/- 2000V)^†

AEC-Q101-005

Yes

Machine Model

Human Body Model

ESD

Charged Device Model

RoHS Compliant

† Highest passing voltage.

Revision History

Date

Comments

 Updated datasheet with corporate template

 Corrected ordering table on page 1.

10/12/2015

10/05/2017

 Corrected typo error on part marking on page 9 and 10.

Published by

Infineon Technologies AG

81726 München, Germany

IMPORTANT NOTICE

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics

(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any

information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and

liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third

party.

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this

document and any applicable legal requirements, norms and standards concerning customer’s products and any use of

the product of Infineon Technologies in customer’s applications.

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of

customer’s technical departments to evaluate the suitability of the product for the intended application and the

completeness of the product information given in this document with respect to such application.

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest

Infineon Technologies office (www.infineon.com).

WARNINGS

Due to technical requirements products may contain dangerous substances. For information on the types in question

please contact your nearest Infineon Technologies office.

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized

representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a

failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.

2017-10-05

AUIRFR120ZTRL [INFINEON]

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