IAUC100N10S5N040 [INFINEON]
车规级MOSFET;
| 型号： | IAUC100N10S5N040 |
| 厂家： | 
Infineon |
| 描述： | 车规级MOSFET |
| 文件： | 总9页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IAUC100N10S5N040
OptiMOSTM-5 Power-Transistor
Product Summary
VDS
RDS(on)
ID
100
4
V
m
A
100
Features
• N-channel - Enhancement mode - Normal level
PG-TDSON-8
• AEC qualified
• MSL1 up to 260°C peak reflow
• 100% Avalanche tested
• Feasible for automatic optical inspection (AOI)
1
Type
Package
Marking
IAUC100N10S5N040
PG-TDSON-8
5N1N040
Maximum ratings, at T j=25 °C, unless otherwise specified
Value
Parameter
Symbol
Conditions
Unit
Continuous drain current1)
I D
T C=25°C, VGS=10V
100
100
400
234
100
±20
A
T C=100°C, VGS=10V
Pulsed drain current2)
I D,pulse
EAS
I AS
T C=25°C
I D=50A
Avalanche energy, single pulse
Avalanche current, single pulse
Gate source voltage
mJ
A
-
VGS
-
V
T C=25°C,
T J =175°C
Ptot
Power dissipation
167
W
T j, T stg
Operating and storage temperature
-
-55 ... +175
°C
Rev. 1.0
page 1
2018-06-12
IAUC100N10S5N040
Values
typ.
Parameter
Symbol
Conditions
Unit
min.
max.
Thermal characteristics
R thJC
Thermal resistance, junction - case
-
-
-
0.9
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
V(BR)DSS VGS=0V, I D= 1mA
VGS(th) VDS=VGS, I D= 90µA
Drain-source breakdown voltage
Gate threshold voltage
100
2.2
-
-
V
3.0
3.8
VDS=100V, VGS=0V,
T j=25 °C
I DSS
Zero gate voltage drain current
-
0.1
1
µA
V
DS=100V, VGS=0V,
-
-
10
-
100
T j=125°C2)
I GSS
VGS=20V, VDS=0V
Gate-source leakage current
100 nA
R DS(on) VGS=6V, I D=25A
Drain-source on-state resistance
-
-
4.2
3.4
5.6
4
m
V
GS=10 V, I D=50 A
Gate resistance2)
R G
-
1.3
-
Rev. 1.0
page 2
2018-06-12
IAUC100N10S5N040
Values
typ.
Parameter
Symbol
Conditions
Unit
min.
max.
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C iss
C oss
Crss
t d(on)
t r
-
-
-
-
-
-
-
4000
660
28
5200 pF
860
V
GS=0 V, VDS=50V,
f =1MHz
42
10
-
-
-
-
ns
5
V
DD=50V, VGS=10V,
I D=100A, R G=3.5
t d(off)
t f
Turn-off delay time
Fall time
19
14
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Q gs
-
-
-
-
20
13
60
4.6
26
20
78
-
nC
Q gd
VDD=50V, I D=50A,
GS=0 to 10V
V
Q g
Vplateau
Gate plateau voltage
V
A
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
I S
-
-
-
-
100
400
T C=25°C
I S,pulse
VGS=0V, I F=50A,
T j=25°C
VSD
Diode forward voltage
-
0.9
1.1
V
Reverse recovery time2)
t rr
-
-
54
90
-
-
ns
VR=50V, I F=50A,
diF/dt =100A/µs
Reverse recovery charge2)
Q rr
nC
1) Current is limited by package; with an R thJC =0.9K/W the chip is able to carry 140A at 25°C.
2) Defined by design. Not subject to production test.
Rev. 1.0
page 3
2018-06-12
IAUC100N10S5N040
1 Power dissipation
2 Drain current
P
tot = f(T C); VGS ≥ 6 V
I D = f(T C); VGS ≥ 6 V
175
150
125
100
75
120
100
80
60
40
20
0
50
25
0
0
50
100
150
200
0
50
100
150
200
TC [°C]
TC [°C]
3 Safe operating area
4 Max. transient thermal impedance
Z thJC = f(t p)
I D = f(VDS); T C = 25 °C; D = 0
parameter: t p
parameter: D =t p/T
100
1000
100
10
0.5
1 µs
10 µs
0.1
100 µs
10-1
0.05
1 ms
0.01
10-2
single pulse
10-3
1
0.1
1
10
100
10-6
10-5
10-4
10-3
10-2
10-1
100
VDS [V]
tp [s]
Rev. 1.0
page 4
2018-06-12
IAUC100N10S5N040
5 Typ. output characteristics
I D = f(VDS); T j = 25 °C
parameter: VGS
6 Typ. drain-source on-state resistance
R DS(on) = (I D); T j = 25 °C
parameter: VGS
10
400
5.5 V
7 V
10 V
6.5 V
9
6 V
300
8
7
6 V
200
100
0
5.5 V
6
5
6.5 V
7 V
4
10 V
3
0
100
200
ID [A]
300
400
0
1
2
3
4
5
VDS [V]
7 Typ. transfer characteristics
I D = f(VGS); VDS = 6V
parameter: T j
8 Typ. drain-source on-state resistance
R DS(on) = f(T j);I D = 50 A; VGS = 10 V
ID = 25 A; VGS = 6 V
400
350
300
250
200
150
100
50
7
25 °C
6.5
175 °C
-55 °C
6V
6
5.5
5
10V
4.5
4
3.5
3
2.5
2
0
-60
-20
20
60
100
140
180
3
4
5
6
7
Tj [°C]
VGS [V]
Rev. 1.0
page 5
2018-06-12
IAUC100N10S5N040
9 Typ. gate threshold voltage
GS(th) = f(T j); VGS = VDS
10 Typ. capacitances
V
C = f(VDS); VGS = 0 V; f = 1 MHz
parameter: I D
104
4
Ciss
3.5
3
900 µA
103
102
101
90 µA
Coss
2.5
2
1.5
Crss
1
0
25
50
75
100
-60
-20
20
60
Tj [°C]
100
140
180
VDS [V]
11 Typical forward diode characteristicis
12 Typ. avalanche characteristics
I AS = f(t AV
IF = f(VSD)
)
parameter: T j
parameter: Tj(start)
1000
1000
100
100
175 °C
25 °C
25 °C
100 °C
150 °C
10
10
1
1
1
0.4
0.6
0.8
1
1.2
10
100
1000
VSD [V]
tAV [µs]
Rev. 1.0
page 6
2018-06-12
IAUC100N10S5N040
13 Typical avalanche energy
AS = f(T j)
14 Drain-source breakdown voltage
E
VBR(DSS) = f(T j); I D = 1 mA
parameter: I D
112
500
450
25 A
108
104
100
96
400
350
300
250
200
150
100
50
50 A
100 A
92
0
-60
-20
20
60
100
140
180
25
75
125
175
Tj [°C]
Tj [°C]
15 Typ. gate charge
GS = f(Q gate); I D = 50 A pulsed
16 Gate charge waveforms
V
parameter: VDD
10
9
8
7
6
5
4
3
2
1
VGS
20 V
80 V
Qg
50 V
Qgate
Qgd
Qgs
0
0
20
40
60
Qgate [nC]
Rev. 1.0
page 7
2018-06-12
IAUC100N10S5N040
Published by
Infineon Technologies AG
81726 Munich, Germany
©
Infineon Technologies AG 2018
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2018-06-12
IAUC100N10S5N040
Revision History
Version
Date
Changes
Final Data Sheet
Revision 1.0
2018-06-12
Rev. 1.0
page 9
2018-06-12
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