IAUC120N06S5L032 [INFINEON]
The new OptiMOS™ 5 technology for 60V MOSFET in the industry standard SSO8 (5x6mm2) small footprint package with leading performance providing low RDSon, QG and Gate capacitance and minimizing conduction and switching losses.;
| 型号： | IAUC120N06S5L032 |
| 厂家： | 
Infineon |
| 描述： | The new OptiMOS™ 5 technology for 60V MOSFET in the industry standard SSO8 (5x6mm2) small footprint package with leading performance providing low RDSon, QG and Gate capacitance and minimizing conduction and switching losses. 栅 |
| 文件： | 总10页 (文件大小：1010K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IAUC120N06S5L032
OptiMOS™-5 Power Transistor
Product Summary
VDS
60
3.2
120
V
RDS(on),max
ID
mW
A
Features
• OptiMOS™ power MOSFET for automotive applications
• N-channel - Enhancement mode - Logic level
• MSL1 up to 260°C peak reflow
• 175 °C operating temperature
• Green product (RoHS compliant)
• 100% Avalanche tested
PG-TDSON-8-34
Type
Package
Marking
IAUC120N06S5L032
PG-TDSON-8-34 5N06L032
Maximum ratings, at T j=25 °C, unless otherwise specified
Value
Parameter
Symbol
Conditions
Unit
VGS=10 V, Chip
limitation1,2)
I D
Drain current
129
A
VGS=10V, DC
current3)
T a=85 °C, VGS=10 V,
R thJA on 2s2p2,4)
120
21
Pulsed drain current2)
I D,pulse
EAS
T C=25 °C, t p= 100 µs
364
92
Avalanche energy, single pulse2)
Avalanche current, single pulse
Gate source voltage
I D=60 A
mJ
A
I AS
-
100
VGS
-
±16
V
Ptot
T C=25 °C
Power dissipation
94
W
°C
T j, T stg
Operating and storage temperature
-
-55 ... +175
Rev. 1.0
page 1
2020-05-05
IAUC120N06S5L032
Values
typ.
Parameter
Symbol
Conditions
Unit
min.
max.
Thermal characteristics2)
R thJC
Thermal resistance, junction - case
-
-
-
-
-
1.6
-
K/W
Thermal resistance, junction -
ambient4)
R thJA
24.2
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
V(BR)DSS VGS=0V, I D=1mA
VGS(th) VDS=VGS, I D=44µA
Drain-source breakdown voltage
Gate threshold voltage
60
-
-
V
1.2
1.7
2.2
VDS=60V, VGS=0V,
T j=25°C
I DSS
Zero gate voltage drain current
-
-
-
-
1
µA
VDS=60V, VGS=0V,
T j=125°C1)
100
I GSS
VGS=16V, VDS=0V
Gate-source leakage current
-
-
-
-
-
100 nA
R DS(on) VGS=4.5V, I D=60A
VGS=10V, I D=60A
Drain-source on-state resistance
3.6
2.5
1.2
4.4
3.2
-
mW
Gate resistance2)
R G
-
W
Rev. 1.0
page 2
2020-05-05
IAUC120N06S5L032
Values
typ.
Parameter
Symbol
Conditions
Unit
min.
max.
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Turn-off delay time
Rise time
C iss
C oss
Crss
t d(on)
t d(off)
t r
-
-
-
-
-
-
-
2941
557
24
3823 pF
725
VGS=0V, VDS=30V,
f =1MHz
36
3.6
-
-
-
-
ns
20.0
1.0
VDD=30V, VGS=10V,
I D=60A, R G,ext=3.5W
t f
Fall time
8.0
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Q gs
-
-
-
-
9.5
6.1
12.4 nC
9.2
Q gd
VDD=30V, I D=60A,
VGS=0 to 10V
Q g
39.6
3.2
51.5
Vplateau
Gate plateau voltage
-
V
A
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
I S
T C=25°C
-
-
-
-
120
364
I S,pulse
T C=25 °C, t p= 100 µs
VGS=0V, I F=60A,
T j=25°C
VSD
Diode forward voltage
-
0.8
1.1
V
Reverse recovery time2)
t rr
-
-
40
38
-
-
ns
VR=30V, I F=50A,
diF/dt =100A/µs
Reverse recovery charge2)
Q rr
nC
1) Practically the current is limited by the overall system design including the customer-specific PCB.
2) The parameter is not subject to production test - verified by design/characterization.
3) The product can operate at a specified current based on best practice to minimze electromigration at the solder
joint. For rare events and inrush currents, the value may be exceeded.
4) Device on a four-layer 2s2p FR4 PCB defined in accordance with JEDEC standards (JESD51-5-7). PCB is vertical
in still air.
Rev. 1.0
page 3
2020-05-05
IAUC120N06S5L032
1 Power dissipation
2 Drain current
Ptot = f(T C); VGS = 10 V
I D = f(T C); VGS = 10 V
100
80
60
40
20
0
140
120
100
80
60
40
20
0
0
50
100
150
200
0
50
100
150
200
TC [°C]
TC [°C]
3 Safe operating area
4 Max. transient thermal impedance
Z thJC = f(t p)
I D = f(VDS); T C = 25 °C; D = 0
parameter: t p
parameter: D =t p/T
101
1000
100
10
1 µs
100
10 µs
0.5
100 µs
150 µs
0.1
10-1
0.05
0.01
single pulse
10-2
10-3
1
0.1
1
10
100
10-6
10-5
10-4
10-3
10-2
10-1
100
VDS [V]
tp [s]
Rev. 1.0
page 4
2020-05-05
IAUC120N06S5L032
5 Typ. output characteristics
I D = f(VDS); T j = 25 °C
parameter: VGS
6 Typ. drain-source on-state resistance
R DS(on) = f(I D); T j = 25 °C
parameter: VGS
6
5.5
5
480
440
6 V
5 V
400
10 V
360
320
4 V
4.5
4
4.5 V
280
4.5 V
240
200
3.5
3
5 V
4 V
160
6 V
120
80
40
0
10 V
2.5
2
0
1
2
3
4
5
6
0
40
80
120
160
200
VDS [V]
ID [A]
7 Typ. transfer characteristics
I D = f(VGS); VDS = 6V
parameter: T j
8 Typ. drain-source on-state resistance
R DS(on) = f(T j);
parameter: ID, VGS
200
180
160
140
120
100
80
7
-55 °C
25 °C
6
VGS=4.5V, ID=60A
175 °C
5
4
3
60
VGS=10V, ID=60A
40
2
20
0
1
1
1.5
2
2.5
3
3.5
4
4.5
5
-60
-20
20
60
100
140
180
VGS [V]
Tj [°C]
Rev. 1.0
page 5
2020-05-05
IAUC120N06S5L032
9 Typ. gate threshold voltage
VGS(th) = f(T j); VGS = VDS
parameter: I D
10 Typ. capacitances
C = f(VDS); VGS = 0 V; f = 1 MHz
104
2.5
Ciss
2
440 µA
103
Coss
1.5
1
44 µA
102
Crss
0.5
0
101
0
10
20
30
40
50
60
-60
-20
20
60
Tj [°C]
100
140
180
VDS [V]
11 Typical forward diode characteristics
12 Avalanche characteristics
I AS= f(t AV
IF = f(VSD)
)
parameter: T j
parameter: Tj(start)
103
1000
102
100
25 °C
100 °C
150 °C
25 °C
175 °C
101
10
100
1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0.1
1
10
100
1000
VSD [V]
tAV [µs]
Rev. 1.0
page 6
2020-05-05
IAUC120N06S5L032
13 Avalanche energy
EAS = f(T j)
14 Drain-source breakdown voltage
VBR(DSS) = f(T j); I D = 1 mA
parameter: I D
66
200
175
64
62
60
58
56
30 A
150
125
100
60 A
75
50
100 A
25
0
-55
-15
25
65
105
145
25
75
125
175
Tj [°C]
Tj [°C]
15 Typ. gate charge
16 Gate charge waveforms
VGS = f(Q gate); I D = 60 A pulsed
parameter: VDD
10
9
8
7
6
5
4
3
2
1
0
V GS
12 V
Qg
30 V
48V
V gs(th)
Qg(th)
Qsw
Qgd
Qgate
Qgs
0
5
10
15
20
25
30
35
40
Qgate [nC]
Rev. 1.0
page 7
2020-05-05
IAUC120N06S5L032
Package Outline
Footprint
Packaging
Rev. 1.0
page 8
2020-05-05
IAUC120N06S5L032
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2020
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 9
2020-05-05
IAUC120N06S5L032
Revision History
Version
Date
Changes
Final Data Sheet
Revision 1.0
05.05.2020
Rev. 1.0
page 10
2020-05-05
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