IPB160N04S203ATMA4 [INFINEON]

Power Field-Effect Transistor, 160A I(D), 40V, 0.0029ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263, GREEN, PLASTIC PACKAGE-7/6;
IPB160N04S203ATMA4
型号: IPB160N04S203ATMA4
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor, 160A I(D), 40V, 0.0029ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263, GREEN, PLASTIC PACKAGE-7/6

脉冲 晶体管
文件: 总8页 (文件大小:147K)
中文:  中文翻译
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IPB160N04S2-03  
OptiMOS® - T Power-Transistor  
Product Summary  
Features  
V DS  
40  
2.9  
160  
V
• N-channel - Enhancement mode  
• Automotive AEC Q101 qualified  
R DS(on),max  
I D  
m  
A
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green package (lead free)  
• Ultra low Rds(on)  
PG-TO263-7-3  
• 100% Avalanche tested  
Type  
Package  
Ordering Code Marking  
SP0002-18151 P2N0403  
IPB160N04S2-03  
PG-TO263-7-3  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
I D  
T C=25 °C  
Continuous drain current  
160  
160  
A
T C=100 °C2)  
T C=25 °C  
I D=80A  
Pulsed drain current2)  
I D,pulse  
E AS  
640  
Avalanche energy, single pulse  
Gate source voltage  
810  
mJ  
V
V GS  
±20  
P tot  
T C=25 °C  
Power dissipation  
300  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... 175  
55/175/56  
Rev. 1.0  
page 1  
2006-03-02  
IPB160N04S2-03  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics2)  
R thJC  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
0.5  
62  
40  
K/W  
R thJA  
minimal footprint  
6 cm2 cooling area3)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS  
V GS(th)  
V
V
GS=0 V, I D=1 mA  
Drain-source breakdown voltage  
Gate threshold voltage  
40  
-
-
V
DS=V GS, I D=250 µA  
2.1  
3.0  
4
V
DS=40 V, V GS=0 V,  
I DSS  
Zero gate voltage drain current  
-
0.1  
1
µA  
T j=25 °C  
V
DS=40 V, V GS=0 V,  
-
-
-
10  
1
100  
T j=125 °C2)  
I GSS  
V
V
GS=20 V, V DS=0 V  
GS=10 V, I D=60 A,  
Gate-source leakage current  
100 nA  
R DS(on)  
Drain-source on-state resistance  
2.4  
2.9  
mΩ  
SMD version  
Rev. 1.0  
page 2  
2006-03-02  
IPB160N04S2-03  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
-
-
-
-
-
-
-
5300  
2150  
580  
27  
-
-
-
-
-
-
-
pF  
ns  
V
GS=0 V, V DS=25 V,  
C oss  
Crss  
t d(on)  
t r  
f =1 MHz  
45  
V
DD=20 V, V GS=10 V,  
I D=160 A, R G=2.2 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
52  
32  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
27  
46  
30  
75  
170  
-
nC  
Q gd  
V
V
DD=32 V, I D=160 A,  
GS=0 to 10 V  
Q g  
123  
5.2  
V plateau  
Gate plateau voltage  
V
A
Reverse Diode  
I S  
Diode continuous forward current  
Diode pulse current  
-
-
-
-
160  
640  
T C=25 °C  
I S,pulse  
V
GS=0 V, I F=80 A,  
V SD  
Diode forward voltage  
-
0.84  
1.3  
V
T j=25 °C  
1) Current is limited by bondwire; with an R thJC = 0.5K/W the chip is able to carry 235A at 25°C. For detailed  
information see Application Note ANPS071E at www.infineon.com/optimos  
2) Defined by design. Not subject to production test.  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2006-03-02  
IPB160N04S2-03  
1 Power dissipation  
2 Drain current  
P tot=f(T C)  
I D=f(T C); V GS10 V  
320  
280  
240  
200  
160  
120  
80  
160  
140  
120  
100  
80  
60  
40  
40  
20  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
I D=f(V DS); T C=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
thJC=f(t p)  
Z
parameter: D =t p/T  
1000  
1
1 µs  
limited by on-state  
resistance  
0.5  
10 µs  
100 µs  
0.2  
100  
10  
1
0.1  
0.1  
1 ms  
0.05  
0.02  
0.01  
0.01  
single pulse  
0
0
0
0
0
0
1
0.001  
0.1  
1
10  
100  
10-6  
10-5  
10-4  
10-3  
t p [s]  
10-2  
10-1  
100  
V
DS [V]  
Rev. 1.0  
page 4  
2006-03-02  
IPB160N04S2-03  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
6 Typ. drain-source on resistance  
DS(on)=f(I D); T j=25 °C  
R
parameter: V GS  
parameter: V GS  
10  
10.0V  
7.0V  
300  
250  
200  
150  
100  
50  
6.5V  
8
6
4
2
6.0V  
5.5V  
5.5V  
5.0V  
6.0V  
7.0V  
10.0V  
0
0
0
0
1
2
3
20  
40  
60  
80  
100  
V
DS [V]  
I D [A]  
7 Typ. transfer characteristics  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
parameter: T j  
8 Typ. forward transconductance  
g fs=f(I D); T j=25 °C  
320  
280  
240  
200  
160  
120  
80  
300  
250  
200  
150  
100  
50  
175°C  
40  
25°C  
0
0
2
3
4
5
6
7
0
80  
160  
240  
320  
I
D [A]  
V
GS [V]  
Rev. 1.0  
page 5  
2006-03-02  
IPB160N04S2-03  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
GS(th)=f(T j); V GS=V DS  
R
DS(on)=f(T j); I D=80 A; V GS=10 V  
V
parameter: I D  
4
5
3.5  
3
4
3
2
1
0
1000µA  
250µA  
2.5  
2
1.5  
-60  
-60  
-20  
20  
60  
100  
140  
180  
-20  
20  
60  
T j [°C]  
100  
140  
180  
T j [°C]  
11 Typ. capacitances  
12 Typ. Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz  
)
parameter: T j  
10000  
1000  
Ciss  
Coss  
25 °C  
100  
10  
175 °C  
1000  
Crss  
100  
1
0
5
10  
15  
DS [V]  
20  
25  
30  
0.0  
0.5  
1.0  
1.5  
V
V SD [V]  
Rev. 1.0  
page 6  
2006-03-02  
IPB160N04S2-03  
13 Typ. avalanche energy  
AS=f(TJ)  
14 Typ. gate charge  
GS=f(Q gate); I D=160A pulsed  
E
V
parameter: I D=80A, V DD=25V  
parameter: V DD  
900  
12  
800  
700  
600  
500  
400  
300  
200  
100  
0
8V  
32V  
10  
8
6
4
2
0
25  
75  
125  
175  
0
20  
40  
60  
80  
100  
120  
T
J [°C]  
Q
gate [nC]  
15 Drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS)=f(T j); I D=1 mA  
V GS  
47  
45  
43  
41  
39  
37  
35  
Q g  
V gs(th)  
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.0  
page 7  
2006-03-02  
IPB160N04S2-03  
Published by  
Infineon Technologies AG  
Bereich Kommunikation  
St.-Martin-Straße 53  
D-81541 München  
© Infineon Technologies AG 2004  
All Rights Reserved.  
• Pb-free lead plating; RoHS compliant  
Attention please!  
The information herein is given to describe certain components and shall not be considered as  
warranted characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Infineon Technologies is an approved CECC manufacturer.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your  
nearest Infineon Technologies office in Germany or our Infineon Technologies representatives worldwide  
(see address list).  
Warnings  
Infineon Technologies' components may only be used in life-support devices or systems with the  
expressed written approval of Infineon Technologies if a failure of such components can reasonably  
be expected to cause the failure of that life-support device or system, or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,  
it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2006-03-02  

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