IPC302N15N3 [INFINEON]
英飞凌的 OptiMOS ™100V、120V 和150V 系列导通电阻 (R DS (on))极低，具有极快的开关性能，可为各种工业和消费类应用提供出色的性能。从高电流电机控制应用到快速开关 DC-DC 转换器或 D 类音频放大器，英飞凌的产品性能卓越，效率极高，空间要求极小。;
| 型号： | IPC302N15N3 |
| 厂家： | 
Infineon |
| 描述： | 英飞凌的 OptiMOS ™100V、120V 和150V 系列导通电阻 (R DS (on))极低，具有极快的开关性能，可为各种工业和消费类应用提供出色的性能。从高电流电机控制应用到快速开关 DC-DC 转换器或 D 类音频放大器，英飞凌的产品性能卓越，效率极高，空间要求极小。 开关 放大器 电机 音频放大器 转换器 |
| 文件： | 总4页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor
BareꢀDie
OptiMOS™3ꢀPowerꢀMOSꢀTransistorꢀChip
IPC302N15N3
DataꢀSheet
Rev.ꢀ2.5
Final
Industrialꢀ&ꢀMultimarket
OptiMOS™3ꢀPowerꢀMOSꢀTransistorꢀChip
IPC302N15N3
PowerꢀMOSꢀTransistorꢀChip
1ꢀꢀꢀꢀꢀDescription
•ꢀN-channelꢀenhancementꢀmode
•ꢀForꢀadditionalꢀcharacterizationꢀandꢀmaxꢀratingsꢀreferꢀtoꢀtheꢀdatasheetꢀof
IPB072N15N3ꢀG
•ꢀAQLꢀ0.65ꢀforꢀvisualꢀinspectionꢀaccordingꢀtoꢀfailureꢀcatalogue
•ꢀElectrostaticꢀDischargeꢀSensitiveꢀDeviceꢀaccordingꢀtoꢀMIL-STDꢀ883C
•ꢀDieꢀbond:ꢀsolderedꢀorꢀglued
•ꢀBacksideꢀmetallization:ꢀNiVꢀsystem
•ꢀFrontsideꢀmetallization:ꢀAlCuꢀsystem
•ꢀPassivation:ꢀnitrideꢀ(onlyꢀonꢀedgeꢀstructure)
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Drain
Parameter
Value
Unit
V(BR)DSS
150
V
Gate
RDS(on)
7.21)
mΩ
mm2
µm
Die size
Thickness
6.7 x 4.5
250
Source
Typeꢀ/ꢀOrderingꢀCode
Package
Chip
Marking
RelatedꢀLinks
IPC302N15N3
not defined
-
2ꢀꢀꢀꢀꢀElectricalꢀCharacteristicsꢀonꢀWaferꢀLevel
atꢀTjꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀ
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
IDSS
150
-
V
VGS=0ꢀVꢀ,ID=1ꢀmA
VDS=VGS,ꢀID=270ꢀµA
VGS=0ꢀVꢀ,VDS=120ꢀV
VGS=20ꢀVꢀ,VDS=0ꢀV
2
-
3
4
V
Zero gate voltage drain current
Gate-source leakage current
Drain-source on- resistance
Reverse diode forward on-voltage
Avalanche energy, single pulse
0.1
1
µA
IGSS
-
1
100
nA
RDS(on)
VSD
-
4.92)
1.0
454)
1003) mΩ VGS=10ꢀVꢀ,ID=2.0ꢀA
-
1.2
-
V
VGS=0ꢀVꢀ,IF=1A
EAS
-
mJ
ID =30 A, RGS =25 Ω
1) packaged in a P-TO263-3 (see ref. product)
2)ꢀtypicalꢀbareꢀdieꢀRDS(on);ꢀVGS=10ꢀV
3) limited by wafer test-equipment
4) Wafer tested. For general avalanche capability refer to the datasheet of IPB072N15N3 G
Final Data Sheet
2
Rev.ꢀ2.5,ꢀꢀ2014-07-23
OptiMOS™3ꢀPowerꢀMOSꢀTransistorꢀChip
IPC302N15N3
3ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀChip,ꢀdimensionsꢀinꢀµm
Final Data Sheet
3
Rev.ꢀ2.5,ꢀꢀ2014-07-23
OptiMOS™3ꢀPowerꢀMOSꢀTransistorꢀChip
IPC302N15N3
RevisionꢀHistory
IPC302N15N3
Revision:ꢀ2014-07-23,ꢀRev.ꢀ2.5
Previous Revision
Revision Date
2.5
Subjects (major changes since last revision)
Release Final Version
2014-07-23
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Final Data Sheet
4
Rev.ꢀ2.5,ꢀꢀ2014-07-23
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