IPD22N08S2L-50 [INFINEON]
OptiMOS Power-Transistor; 的OptiMOS功率三极管
| 型号： | IPD22N08S2L-50 |
| 厂家： | 
Infineon |
| 描述： | OptiMOS Power-Transistor |
| 文件： | 总8页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IPD22N08S2L-50
OptiMOS® Power-Transistor
Product Summary
Features
VDS
75
50
25
V
• N-channel Logic Level - Enhancement mode
R DS(on),max
I D
mΩ
A
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green package (lead free)
• Ultra low Rds(on)
PG-TO252-3-11
• 100% Avalanche tested
Type
Package
Marking
IPD22N08S2L-50
PG-TO252-3-11 2N08L50
Maximum ratings, at T j=25 °C, unless otherwise specified
Value
Parameter
Symbol
Conditions
Unit
I D
T C=25 °C, VGS=10 V
T C=100 °C,
Continuous drain current
27
A
19
V
GS=10 V1)
Pulsed drain current1)
I D,pulse
EAS
T C=25 °C
I D=22A
108
94
Avalanche energy, single pulse
Gate source voltage
mJ
V
VGS
±20
Ptot
T C=25 °C
Power dissipation
75
W
°C
T j, T stg
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
-55 ... +175
55/175/56
Rev. 1.0
page 1
2006-07-18
IPD22N08S2L-50
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Thermal characteristics1)
R thJC
R thJA
R thJA
Thermal resistance, junction - case
-
-
-
-
2
K/W
Thermal resistance, junction -
ambient, leaded
100
SMD version, device on PCB
minimal footprint
-
-
-
-
75
50
6 cm2 cooling area2)
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
V(BR)DSS
VGS(th)
V
V
GS=0 V, I D= 1 mA
DS=VGS, I D=31 µA
Drain-source breakdown voltage
Gate threshold voltage
75
-
-
V
1.2
1.6
2.0
V
DS=75 V, VGS=0 V,
I DSS
Zero gate voltage drain current
-
-
0.01
1
1
µA
T j=25 °C
V
DS=75 V, VGS=0 V,
100
T j=125 °C2)
I GSS
V
V
V
GS=20 V, VDS=0 V
GS=5 V, I D=50 A
GS=10 V, I D=50 A,
Gate-source leakage current
Drain-source on-state resistance
Drain-source on-state resistance
-
-
-
1
100 nA
65
50.0 mΩ
R DS(on)
RDS(on)
58.0
38.5
mΩ
Rev. 1.0
page 2
2006-07-18
IPD22N08S2L-50
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics1)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C iss
C oss
Crss
t d(on)
t r
-
-
-
-
-
-
-
630
160
75
6
-
-
-
-
-
-
-
pF
ns
V
GS=0 V, VDS=25 V,
f =1 MHz
20
26
10
V
DD=37 V, VGS=10 V,
I D=22 A, R G=9.1 Ω
t d(off)
t f
Turn-off delay time
Fall time
Gate Charge Characteristics1)
Gate to source charge
Gate to drain charge
Gate charge total
Q gs
-
-
-
-
2
9
2.7
12
33
-
nC
Q gd
V
V
DD=60 V, I D=22 A,
GS=0 to 10 V
Q g
21
3.9
Vplateau
Gate plateau voltage
V
A
Reverse Diode
Diode continous forward current1)
Diode pulse current1)
I S
-
-
-
-
25
T C=25 °C
I S,pulse
100
V
GS=0 V, I F=22 A,
VSD
Diode forward voltage
Reverse recovery time1)
Reverse recovery charge1)
-
-
-
0.9
44
66
1.3
V
T j=25 °C
VR=40 V, I F=I S,
diF/dt =100 A/µs
t rr
-
-
ns
nC
VR=40 V, I F=I S,
diF/dt =100 A/µs
Q rr
1) Defined by design. Not subject to production test.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2006-07-18
IPD22N08S2L-50
1 Power dissipation
2 Drain current
P
tot = f(T C); VGS ≥ 6 V
I D = f(T C); VGS ≥ 10 V
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
0
0
50
100
150
200
0
50
100
150
200
T
C [°C]
T
C [°C]
3 Safe operating area
4 Max. transient thermal impedance
thJC = f(t p)
I D = f(VDS); T C = 25 °C; D = 0
parameter: t p
Z
parameter: D =t p/T
1000
100
10
0.5
100
1 µs
0.1
10 µs
0.05
10-1
100 µs
0.01
1 ms
10-2
single pulse
10-3
1
10-7
10-6
10-5
10-4
10-3
10-2
10-1
100
0.1
1
10
100
t p [s]
V
DS [V]
Rev. 1.0
page 4
2006-07-18
IPD22N08S2L-50
5 Typ. output characteristics
I D = f(VDS); T j = 25 °C
parameter: VGS
6 Typ. drain-source on-state resistance
DS(on) = (I D); T j = 25 °C
R
parameter: VGS
100
170
4 V
3.5 V
10 V
3 V
150
130
110
90
5 V
4.5 V
50
4.5 V
70
4 V
5 V
50
3.5 V
3 V
10 V
2.5 V
30
0
0
10
20
D [A]
30
40
0
2
4
6
8
10
I
V
DS [V]
7 Typ. transfer characteristics
I D = f(VGS); VDS = 6V
parameter: T j
8 Typ. Forward transconductance
g fs = f(I D); T j = 25°C
parameter: g fs
80
60
40
20
40
30
20
10
0
25 °C
175 °C
-55 °C
0
1
2
3
4
5
0
10
20
30
40
V
GS [V]
I
D [A]
Rev. 1.0
page 5
2006-07-18
IPD22N08S2L-50
9 Typ. Drain-source on-state resistance
DS(ON) = f(T j)
10 Typ. gate threshold voltage
GS(th) = f(T j); VGS = VDS
R
V
parameter: I D = 11 A; VGS = 10 V
parameter: I D
90
2.5
80
70
60
50
40
30
20
2
1.5
1
155 µA
31 µA
0.5
0
-60
-20
20
60
T j [°C]
100
140
180
-60
-20
20
60
T j [°C]
100
140
180
11 Typ. capacitances
12 Typical forward diode characteristicis
C = f(VDS); VGS = 0 V; f = 1 MHz
IF = f(VSD)
parameter: T j
104
103
102
101
103
Ciss
Coss
102
Crss
25 °C
175 °C
100
0
5
10
15
20
25
30
0
0.2 0.4 0.6 0.8
SD [V]
1
1.2 1.4 1.6
V
DS [V]
V
Rev. 1.0
page 6
2006-07-18
IPD22N08S2L-50
13 Typical avalanche energy
AS = f(T j)
14 Typ. gate charge
E
V
GS = f(Q gate); I D = 22 A pulsed
parameter: I D
400
12
10
8
5.5 A
350
300
250
60 V
15 V
200
6
11 A
150
4
100
22 A
2
50
0
0
25
75
125
175
0
10
20
30
T j [°C]
Q gate [nC]
15 Typ. drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS) = f(T j); I D = 1 mA
90
VGS
Qg
85
80
75
70
65
Qgate
Qgd
Qgs
-60
-20
20
60
100
140
180
T j [°C]
Rev. 1.0
page 7
2006-07-18
IPD22N08S2L-50
Published by
Infineon Technologies AG
Am Campeon 1-12
D-85579 Neubiberg
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices, please contact your
nearest Infineon Technologies Office (www.infineon.com)
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies Office.
Infineon Technologies' components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies, if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2006-07-18
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