IPTC007N06NM5 [INFINEON]

IPTC007N06NM5 is part of the OptiMOS™ 5 power MOSFET in TOLT family: the TO-Leaded top-side cooling package for superior thermal performance. This innovative package combined with the key features of OptiMOS™ 5 technology allows best-in-class products in 60 V as well as high current rating >400 A for high-power density designs.;
IPTC007N06NM5
型号: IPTC007N06NM5
厂家: Infineon    Infineon
描述:

IPTC007N06NM5 is part of the OptiMOS™ 5 power MOSFET in TOLT family: the TO-Leaded top-side cooling package for superior thermal performance. This innovative package combined with the key features of OptiMOS™ 5 technology allows best-in-class products in 60 V as well as high current rating >400 A for high-power density designs.

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IPTC007N06NM5  
MOSFET  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
PG-HDSOP-16  
16  
9
16  
Features  
9
•ꢀOptimizedꢀforꢀmotorꢀdrivesꢀandꢀbatteryꢀpoweredꢀapplications  
•ꢀOptimizedꢀforꢀtopꢀsideꢀcooling  
•ꢀHighꢀcurrentꢀcapability  
1
•ꢀ175°Cꢀrated  
•ꢀ100%ꢀavalancheꢀtested  
8
8
1
•ꢀSuperiorꢀthermalꢀperformance  
•ꢀN-Channel  
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Drain  
Pin 9-16, Tab  
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Gate  
Pin 8  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Source  
Pin 1-7  
Parameter  
Value  
Unit  
VDS  
60  
V
RDS(on),max  
ID  
0.75  
454  
219  
209  
m  
A
Qoss  
nC  
nC  
QG  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPTC007N06NM5  
PG-HDSOP-16  
07N06NM5  
-
Final Data Sheet  
1
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
-
-
-
-
454  
348  
321  
52  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
Continuous drain current1)  
ID  
A
VGS=6ꢀV,ꢀTC=100ꢀ°C  
VGS=10ꢀV,ꢀTA=25°C,RthJA=40°C/W2)  
Pulsed drain current3)  
Avalanche energy, single pulse4)  
ID,pulse  
EAS  
-
-
-
-
1816  
A
TA=25ꢀ°C  
-
1100 mJ  
ID=150ꢀA,ꢀRGS=25ꢀΩ  
Gate source voltage  
VGS  
-20  
20  
V
-
-
-
-
-
375  
3.8  
TC=25ꢀ°C  
Power dissipation  
Ptot  
W
°C  
TA=25ꢀ°C,ꢀRthJA=40ꢀ°C/W2)  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
-
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case,  
top  
RthJC  
ΨJL  
-
0.24  
9
0.4  
°C/W -  
°C/W -  
Thermal characterization parameter,  
junction to lead (Pin 1-7)5)  
-
-
Thermal characterization parameter,  
junction to lead (Pin 9-16)5)  
ΨJL  
-
-
3
-
-
°C/W -  
°C/W -  
Thermal resistance, junction-ambient2) RthJA  
40  
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature  
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual  
environmental conditions.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) See Diagram 3 for more detailed information  
4) See Diagram 13 for more detailed information  
5) ΨJL is a temperature characterization parameter according to JESD51-12 referring to the temperature difference between  
junction and leads in the case of natural convection. It can be used to estimate the component junction temperature in the  
application by measuring the temperature at the leads in the stated application environment  
Final Data Sheet  
3
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
60  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
2.1  
2.8  
3.3  
VDS=VGS,ꢀID=280ꢀµA  
-
-
0.5  
10  
1.0  
100  
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
0.66  
0.85  
0.75  
1.0  
VGS=10ꢀV,ꢀID=150ꢀA  
VGS=6ꢀV,ꢀID=75ꢀA  
RDS(on)  
mΩ  
Gate resistance1)  
Transconductance  
RG  
gfs  
-
1.8  
2.7  
-
-
165  
330  
S
|VDS|2|ID|RDS(on)max,ꢀID=100ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Output capacitance1)  
Reverse transfer capacitance1)  
Ciss  
Coss  
Crss  
-
-
-
16000 21000 pF  
3100 4000 pF  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
200  
38  
350  
-
pF  
ns  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
18  
76  
22  
-
-
-
ns  
ns  
ns  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Turn-off delay time  
Fall time  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ  
Values  
Typ.  
66  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge1)  
Switching charge  
Qgs  
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=30ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV  
Qg(th)  
Qgd  
44  
-
35  
53  
Qsw  
57  
-
Gate charge total1)  
Qg  
209  
4.2  
261  
Gate plateau voltage  
Gate charge total, sync. FET  
Output charge1)  
Vplateau  
Qg(sync)  
Qoss  
-
186  
219  
-
nC  
nC  
291  
VDS=30ꢀV,ꢀVGS=0ꢀV  
1) Defined by design. Not subject to production test.  
2) See Gate charge waveformsfor parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
308  
1816  
1.0  
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
trr  
-
A
TC=25ꢀ°C  
Diode forward voltage  
Reverse recovery time1)  
0.83  
87  
V
VGS=0ꢀV,ꢀIF=100ꢀA,ꢀTj=25ꢀ°C  
VR=30ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs  
VR=30ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs  
174  
-
ns  
nC  
Reverse recovery charge  
Qrr  
144  
1) Defined by design. Not subject to production test.  
Final Data Sheet  
5
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
400  
500  
350  
300  
250  
200  
150  
100  
50  
400  
300  
200  
100  
0
0
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
104  
101  
single pulse  
0.01  
0.02  
1 µs  
0.05  
0.1  
0.2  
0.5  
103  
102  
101  
100  
10-1  
10 µs  
100  
100 µs  
1 ms  
10-1  
10-2  
10-3  
10 ms  
DC  
10-1  
100  
101  
102  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
2000  
2.0  
8 V  
10 V  
1750  
1500  
1250  
1000  
750  
500  
250  
0
4.5 V  
7 V  
1.6  
5 V  
1.2  
6 V  
6 V  
7 V  
0.8  
0.4  
0.0  
8 V  
10 V  
5 V  
4.5 V  
0
1
2
3
4
5
6
0
100  
200  
300  
400  
500  
600  
700  
800  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
2000  
2.0  
1750  
1500  
1250  
1.6  
1.2  
0.8  
0.4  
0.0  
25 °C  
1000  
750  
500  
250  
0
175 °C  
175 °C  
25 °C  
0
1
2
3
4
5
6
7
8
0
2
4
6
8
10  
12  
14  
16  
VGSꢀ[V]  
VGSꢀ[V]  
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
RDS(on)=f(VGS),ꢀID=150ꢀA;ꢀparameter:ꢀTj  
Final Data Sheet  
7
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
2.0  
3.5  
3.0  
2.5  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
2800 µA  
280 µA  
1.5  
1.0  
0.5  
0.0  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj),ꢀID=150ꢀA,ꢀVGS=10ꢀV  
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
105  
104  
25 °C  
25 °C, max  
175 °C  
175 °C, max  
Ciss  
104  
103  
102  
103  
102  
101  
Coss  
Crss  
0
10  
20  
30  
40  
50  
60  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
103  
10  
12 V  
30 V  
48 V  
8
6
4
2
0
102  
25 °C  
100 °C  
150 °C  
101  
100  
100  
101  
102  
103  
0
40  
80  
120  
160  
200  
240  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀ;ꢀparameter:ꢀTj,start  
VGS=f(Qgate),ꢀID=100ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
65  
64  
63  
62  
61  
60  
59  
58  
57  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
PACKAGE - GROUP  
NUMBER:  
PG-HDSOP-16-U01  
DATE: 18.12.2020  
REVISION: 01  
MILLIMETERS  
DIMENSIONS  
MIN.  
MAX.  
2.35  
A
A1  
b
2.25  
0.01  
0.60  
0.40  
9.70  
8.20  
14.80  
10.00  
5.57  
0.16  
0.80  
c
0.60  
D
10.10  
8.40  
D1  
E
15.20  
10.30  
5.77  
E1  
E2  
e
1.20  
8.40  
e1  
L
1.40  
2.90  
1.60  
3.10  
P
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HDSOP-16,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.0,ꢀꢀ2022-09-27  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
IPTC007N06NM5  
RevisionꢀHistory  
IPTC007N06NM5  
Revision:ꢀ2022-09-27,ꢀRev.ꢀ2.0  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
Release of final version  
2.0  
2022-09-27  
Trademarks  
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Final Data Sheet  
11  
Rev.ꢀ2.0,ꢀꢀ2022-09-27  

相关型号:

IPTC011N08NM5

IPTC011N08NM5 属于TOLT 封装 OptiMOS™ 5 功率 MOSFET 系列:采用 TO-Leaded 顶部散热封装,热性能优越。这种创新型封装结合了 OptiMOS™ 5 技术的主要特征,使英飞凌的 80 V 产品成为同类产品中的佼佼者 >300 A 而且可以为高功率密度设计提供高额定电流。
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IPTC012N06NM5

IPTC012N06NM5 is part of the OptiMOS™ 5 power MOSFET in TOLT family: the TO-Leaded top-side cooling package for superior thermal performance. This innovative package combined with the key features of OptiMOS™ 5 technology allows best-in-class products in 60 V as well as high current rating >300 A for high-power density designs.
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IPTC014N10NM5

IPTC014N10NM5 属于TOLT 封装 OptiMOS™ 5 功率 MOSFET 系列:采用 TO-Leaded 顶部散热封装,热性能优越。这种创新型封装结合了 OptiMOS™ 5 技术的主要特征,使英飞凌的 100 V 产品成为同类产品中的佼佼者 >300 A 而且可以为高功率密度设计提供高额定电流。
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IPTC017N12NM6

This is a normal level 120 V MOSFET in TO-Leaded top-side cooling (TOLT) packaging with 1.7 mOhm on-resistance.  IPTC017N12NM6 is part of Infineon’s OptiMOS™ 6 power MOSFET family.
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IPTC039N15NM5

IPTC039N15NM5 属于TOLT 封装 OptiMOS™ 5 功率 MOSFET 系列:采用 TO-Leaded 顶部散热封装,热性能优越。这种创新型封装结合了 OptiMOS™ 5 技术的主要特征,使英飞凌的 150 V 产品成为同类产品中的佼佼者,而且可以为高功率密度设计提供高额定电流。
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IPTC063N15NM5

IPTC063N15NM5 属于TOLT 封装 OptiMOS™ 5 功率 MOSFET 系列:采用 TO-Leaded 顶部散热封装,热性能优越。这种创新型封装结合了 OptiMOS™ 5 技术的主要特征,使英飞凌的 150 V 产品成为同类产品中的佼佼者,而且可以为高功率密度设计提供高额定电流。
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IPTG007N06NM5

OptiMOS™ 功率 MOSFET IPTG007N06NM5 采用改良的翼型引脚 TO-Leadless 封装。TOLG 封装尺寸与 TO-Leaded 封装尺寸互相兼容,与 D2PAK 7 引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。这款 OptiMOS™ 5 - 60 V 的新型封装具有非常低的 RDS(on) ,而且经过优化,可处理大于 300 A 的高电流。
INFINEON

IPTG011N08NM5

OptiMOS™ 功率 MOSFET IPTG011N08NM5 采用改良的翼型引脚 TO-Leaded 封装。TOLG 封装尺寸与 TO-Leadless 封装尺寸互相兼容,与 D2PAK 7 引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。这款 OptiMOS™ 5 - 80 V 的新型封装具有非常低的 RDS(on) ,而且经过优化,可处理大于 300 A 的高电流。
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IPTG014N10NM5

OptiMOS™ 功率 MOSFET IPTG014N10NM5 采用改良的翼型引脚 TO-Leadless 封装。TOLG 封装尺寸与 TO-Leadless 封装尺寸互相兼容,与 D2PAK 7 引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。这款 OptiMOS™ 5 - 100 V 的新型封装具有非常低的 RDS(on) ,而且经过优化,可处理大于 300 A 的高电流。
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IPTG025N10NM5

OptiMOS™ 功率 MOSFETIPTG025N10NM5 采用改良型带翼型引线的 TO-Leaded 封装。TOLG 封装尺寸与 TO-Leadless 封装尺寸互相兼容,与 D2PAK 7-引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。
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IPTG039N15NM5

OptiMOS™ 功率 MOSFET IPTG039N15NM5 采用改良型鸥翼式TO引脚  封装。TOLG 封装尺寸与无引脚 TO 封装尺寸互相兼容,与 D2PAK 7 封装相比,TOLG 封装具有出色的电气性能,同时减少了约 60% 的电路板空间。这款新型封装的OptiMOS™ 5 150 V的 RDS(on) 非常低,而且经过优化,可承受大电流。
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IPTG044N15NM5

OptiMOS™ 功率 MOSFET IPTG044N15NM5 采用改良型鸥翼式TO引脚  封装。TOLG 封装尺寸与无引脚 TO 封装尺寸互相兼容,与 D2PAK 7 封装相比,TOLG 封装具有出色的电气性能,同时减少了约 60% 的电路板空间。这款新型封装的OptiMOS™ 5 150 V的 RDS(on) 非常低,而且经过优化,可承受大电流。
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